]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
rockchip: rk35xx: Enable eMMC HS200 mode by default
authorJonas Karlman <jonas@kwiboo.se>
Sun, 4 Feb 2024 20:53:06 +0000 (20:53 +0000)
committerKever Yang <kever.yang@rock-chips.com>
Mon, 5 Feb 2024 07:00:51 +0000 (15:00 +0800)
Testing has shown that writing to eMMC using a slower mode then HS200
typically generate an ERROR on first attempt on RK3588.

  # Rescan using MMC legacy mode
  => mmc rescan 0

  # Write a single block to sector 0x4000 fails with ERROR
  => mmc write 20000000 4000 1

  # Write a single block to sector 0x4000 now works
  => mmc write 20000000 4000 1

With the MMC_SPEED_MODE_SET Kconfig option enabled.

Writing to eMMC using HS200 mode work more reliably than slower modes on
RK35xx boards. Enable MMC_HS200_SUPPORT Kconfig option by default to
prefer use of HS200 mode on RK356x and RK3588.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
arch/arm/mach-rockchip/Kconfig
configs/nanopi-r5c-rk3568_defconfig
configs/nanopi-r5s-rk3568_defconfig
configs/radxa-e25-rk3568_defconfig

index fee4a0e9a604f8c04782b28e7b5a7c17409520ca..1bc7ee90427583dd2a56dd5a3c1166375735c990 100644 (file)
@@ -293,6 +293,8 @@ config ROCKCHIP_RK3568
        imply OF_LIBFDT_OVERLAY
        imply ROCKCHIP_OTP
        imply MISC_INIT_R
+       imply MMC_HS200_SUPPORT if MMC_SDHCI_ROCKCHIP
+       imply SPL_MMC_HS200_SUPPORT if SPL_MMC && MMC_HS200_SUPPORT
        help
          The Rockchip RK3568 is a ARM-based SoC with quad-core Cortex-A55,
          including NEON and GPU, 512K L3 cache, Mali-G52 based graphics,
@@ -318,6 +320,8 @@ config ROCKCHIP_RK3588
        imply OF_LIBFDT_OVERLAY
        imply ROCKCHIP_OTP
        imply MISC_INIT_R
+       imply MMC_HS200_SUPPORT if MMC_SDHCI_ROCKCHIP
+       imply SPL_MMC_HS200_SUPPORT if SPL_MMC && MMC_HS200_SUPPORT
        imply CLK_SCMI
        imply SCMI_FIRMWARE
        imply BOOTSTD_FULL
index 833cff0e457de0eb3c114f22bd0586bcb1a52ea3..f5a472d03d786d36810c718ce205ee5c1e411974 100644 (file)
@@ -58,8 +58,6 @@ CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_MISC=y
 CONFIG_SUPPORT_EMMC_RPMB=y
-CONFIG_MMC_HS200_SUPPORT=y
-CONFIG_SPL_MMC_HS200_SUPPORT=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_MMC_SDHCI=y
index 2736d382a3521abdd3c1b6f1ec29896959ad2b30..99692d341f44e9a0a3b406e91b2e40332fdffac7 100644 (file)
@@ -58,8 +58,6 @@ CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_MISC=y
 CONFIG_SUPPORT_EMMC_RPMB=y
-CONFIG_MMC_HS200_SUPPORT=y
-CONFIG_SPL_MMC_HS200_SUPPORT=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_MMC_SDHCI=y
index 5a613abe0d2d29e60a1a0d2ffd783871be5911f8..fedb137877ab23ba584981679b83028831e8887d 100644 (file)
@@ -60,8 +60,6 @@ CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_MISC=y
 CONFIG_SUPPORT_EMMC_RPMB=y
-CONFIG_MMC_HS200_SUPPORT=y
-CONFIG_SPL_MMC_HS200_SUPPORT=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_MMC_SDHCI=y