]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
ARM: imx: imx8m: Introduce and use UART_BASE_ADDR(n)
authorMarek Vasut <marex@denx.de>
Sun, 24 Apr 2022 21:44:03 +0000 (23:44 +0200)
committerStefano Babic <sbabic@denx.de>
Fri, 20 May 2022 07:03:01 +0000 (09:03 +0200)
Introduce helper macro UART_BASE_ADDR(n), which returns Nth UART base
address. Convert all board configurations to this new macro. This is the
first step toward switching CONFIG_MXC_UART_BASE to Kconfig. This is a
clean up, no functional change.

The new macro contains compile-time test to verify N is in suitable
range. The test works such that it multiplies constant N by constant
double-negation of size of a non-empty structure, i.e. it multiplies
constant N by constant 1 in each successful compilation case.

The non-empty structure may contain C11 _Static_assert(), make use of
this and place the kernel variant of static assert in there, so that
it performs the compile-time check for N in the correct range. Note
that it is not possible to directly use static_assert in compound
statements, hence this convoluted construct.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
22 files changed:
arch/arm/include/asm/arch-imx8m/imx-regs.h
include/configs/imx8mm-cl-iot-gate.h
include/configs/imx8mm_beacon.h
include/configs/imx8mm_evk.h
include/configs/imx8mm_icore_mx8mm.h
include/configs/imx8mm_venice.h
include/configs/imx8mn_beacon.h
include/configs/imx8mn_evk.h
include/configs/imx8mn_var_som.h
include/configs/imx8mn_venice.h
include/configs/imx8mp_evk.h
include/configs/imx8mp_rsb3720.h
include/configs/imx8mq_cm.h
include/configs/imx8mq_evk.h
include/configs/imx8mq_phanbell.h
include/configs/kontron-sl-mx8mm.h
include/configs/kontron_pitx_imx8m.h
include/configs/phycore_imx8mm.h
include/configs/phycore_imx8mp.h
include/configs/pico-imx8mq.h
include/configs/verdin-imx8mm.h
include/configs/verdin-imx8mp.h

index b2a8ad77ae17c0c7975975005fb3a9fdb390d2d0..1da75528d46d4cd2f12cb8521bb75104ad396bf5 100644 (file)
 #ifdef CONFIG_IMX8MM
 #define USDHC3_BASE_ADDR       0x30B60000
 #endif
+#define UART_BASE_ADDR(n)      (                       \
+       !!sizeof(struct {                               \
+               static_assert((n) >= 1 && (n) <= 4);    \
+               int pad;                                \
+               }) * (                                  \
+       (n) == 1 ? UART1_BASE_ADDR :                    \
+       (n) == 2 ? UART2_BASE_ADDR :                    \
+       (n) == 3 ? UART3_BASE_ADDR :                    \
+       UART4_BASE_ADDR)                                \
+       )
 
 #define TZASC_BASE_ADDR                0x32F80000
 
index c20c32b6951f5e68a58b90982cafff8f0a03eb88..60746588b739b64ad02a8629895cff1dc7ec1b9c 100644 (file)
 #define PHYS_SDRAM                     0x40000000
 #define PHYS_SDRAM_SIZE                        0x80000000 /* 2GB DDR */
 
-#define CONFIG_MXC_UART_BASE           UART3_BASE_ADDR
+#define CONFIG_MXC_UART_BASE           UART_BASE_ADDR(3)
 
 /* Monitor Command Prompt */
 #define CONFIG_SYS_CBSIZE              2048
index 7c17f14964fbeca2497ada37cbbb2779495fbab5..573ddaf29526a8b651d603977cb8a7e4481bcbd9 100644 (file)
@@ -91,7 +91,7 @@
 #define PHYS_SDRAM                     0x40000000
 #define PHYS_SDRAM_SIZE                0x80000000 /* 2GB DDR */
 
-#define CONFIG_MXC_UART_BASE           UART2_BASE_ADDR
+#define CONFIG_MXC_UART_BASE           UART_BASE_ADDR(2)
 
 /* Monitor Command Prompt */
 #define CONFIG_SYS_CBSIZE              2048
index 42b78485cfcfdf80a9d7305be90dd2ad428a7291..bd10406d79d47c92dad39ae4a6fdb55bac733c5f 100644 (file)
@@ -68,7 +68,7 @@
 #define PHYS_SDRAM                      0x40000000
 #define PHYS_SDRAM_SIZE                        0x80000000 /* 2GB DDR */
 
-#define CONFIG_MXC_UART_BASE           UART2_BASE_ADDR
+#define CONFIG_MXC_UART_BASE           UART_BASE_ADDR(2)
 
 /* Monitor Command Prompt */
 #define CONFIG_SYS_CBSIZE              2048
index f521add5b0462391262dbfbd9229ad8b59ab20c2..b9b24a8c51df50b835414fc8120c27e46c548d92 100644 (file)
@@ -66,7 +66,7 @@
 #define CONFIG_SYS_BOOTM_LEN           SZ_256M
 
 /* UART */
-#define CONFIG_MXC_UART_BASE           UART2_BASE_ADDR
+#define CONFIG_MXC_UART_BASE           UART_BASE_ADDR(2)
 
 /* Monitor Command Prompt */
 #define CONFIG_SYS_CBSIZE              2048
index 1b26e0280e1c2f2e4c195218bd00a7577aea0c13..f3dad2561009b11d0723310eaa5c1dd27f1b36ca 100644 (file)
 #define CONFIG_SYS_BOOTM_LEN           SZ_256M
 
 /* UART */
-#define CONFIG_MXC_UART_BASE           UART2_BASE_ADDR
+#define CONFIG_MXC_UART_BASE           UART_BASE_ADDR(2)
 
 /* Monitor Command Prompt */
 #define CONFIG_SYS_CBSIZE              SZ_2K
index 41ce3c1c8ce579e57f428f9b33a84fe05635fde4..79c6b1076ff32a6b439e0ddd7a05ba9b1757680a 100644 (file)
 #define PHYS_SDRAM_SIZE                0x40000000 /* 1GB DDR */
 #endif
 
-#define CONFIG_MXC_UART_BASE           UART2_BASE_ADDR
+#define CONFIG_MXC_UART_BASE           UART_BASE_ADDR(2)
 
 /* Monitor Command Prompt */
 #define CONFIG_SYS_CBSIZE              2048
index 034132225c6e5acae89ebcd03395da4d16ff2053..805ae2a7518990740115ce6480a89126786cb5a4 100644 (file)
@@ -75,7 +75,7 @@
 #define PHYS_SDRAM                      0x40000000
 #define PHYS_SDRAM_SIZE                        0x80000000 /* 2GB DDR */
 
-#define CONFIG_MXC_UART_BASE           UART2_BASE_ADDR
+#define CONFIG_MXC_UART_BASE           UART_BASE_ADDR(2)
 
 /* Monitor Command Prompt */
 #define CONFIG_SYS_CBSIZE              2048
index 318289b76bcd7ba2b1de06e4deecdb09bb48d2ed..00358892b2840764b388ab5728289b73101ac97d 100644 (file)
@@ -64,7 +64,7 @@
 #define PHYS_SDRAM                     0x40000000
 #define PHYS_SDRAM_SIZE                        SZ_1G /* 1GB DDR */
 
-#define CONFIG_MXC_UART_BASE           UART4_BASE_ADDR
+#define CONFIG_MXC_UART_BASE           UART_BASE_ADDR(4)
 
 /* Monitor Command Prompt */
 #define CONFIG_SYS_CBSIZE              SZ_2K
index a4826779022a6779ae33e2be804e1edad38dab8e..dcb5baf6eb49659c51a629d68d51f186d99425e4 100644 (file)
@@ -98,7 +98,7 @@
 #define CONFIG_SYS_BOOTM_LEN           SZ_256M
 
 /* UART */
-#define CONFIG_MXC_UART_BASE           UART2_BASE_ADDR
+#define CONFIG_MXC_UART_BASE           UART_BASE_ADDR(2)
 
 /* Monitor Command Prompt */
 #define CONFIG_SYS_CBSIZE              SZ_2K
index cc8d65cb54ed8234fb93b35fb4e1c2f7854cefdd..908ed76f39e6f165bf1fd5ee587ad2e4385577a3 100644 (file)
@@ -80,7 +80,7 @@
 #define PHYS_SDRAM_2                   0x100000000
 #define PHYS_SDRAM_2_SIZE              0xC0000000      /* 3 GB */
 
-#define CONFIG_MXC_UART_BASE           UART2_BASE_ADDR
+#define CONFIG_MXC_UART_BASE           UART_BASE_ADDR(2)
 
 /* Monitor Command Prompt */
 #define CONFIG_SYS_CBSIZE              2048
index c5dd545471e17830e1599affc25cf0e6f81c8301..c0f2824fd4ceb5c31bddb704be2c30459a39b35c 100644 (file)
 #define PHYS_SDRAM_2_SIZE              0x80000000      /* 2 GB */
 #endif
 
-#define CONFIG_MXC_UART_BASE           UART3_BASE_ADDR
+#define CONFIG_MXC_UART_BASE           UART_BASE_ADDR(3)
 
 /* Monitor Command Prompt */
 #define CONFIG_SYS_CBSIZE              2048
index 989486aa6dcb7d3f5582ffa2f916f63c9d18db97..6eecfc813a4337433410731e9b3a73e536e20c6f 100644 (file)
@@ -71,7 +71,7 @@
 #define PHYS_SDRAM                      0x40000000
 #define PHYS_SDRAM_SIZE                                        0x40000000 /* 1 GB DDR */
 
-#define CONFIG_MXC_UART_BASE           UART1_BASE_ADDR
+#define CONFIG_MXC_UART_BASE           UART_BASE_ADDR(1)
 
 /* Monitor Command Prompt */
 #define CONFIG_SYS_CBSIZE              1024
index f7929e5867e938d12d934ecadde9a644e8ffbb84..8596d9992579d11d41d371e5f9a6ff256fe5d94a 100644 (file)
@@ -78,7 +78,7 @@
 #define PHYS_SDRAM                      0x40000000
 #define PHYS_SDRAM_SIZE                        0xC0000000 /* 3GB DDR */
 
-#define CONFIG_MXC_UART_BASE           UART1_BASE_ADDR
+#define CONFIG_MXC_UART_BASE           UART_BASE_ADDR(1)
 
 /* Monitor Command Prompt */
 #define CONFIG_SYS_CBSIZE              1024
index f6410114b765b656381462ca26765d626aa23cb9..9cf779b0752c36a94542d3d2bf3823a5fc10f67c 100644 (file)
 #define PHYS_SDRAM                      0x40000000
 #define PHYS_SDRAM_SIZE                        0x40000000 /* 1GB DDR */
 
-#define CONFIG_MXC_UART_BASE           UART1_BASE_ADDR
+#define CONFIG_MXC_UART_BASE           UART_BASE_ADDR(1)
 
 /* Monitor Command Prompt */
 #define CONFIG_SYS_CBSIZE              1024
index 1b429f7dbe2211dd291c1c0b199caeb9e2dc8b13..8b2a10dda1f6367db04768492a350c85880ce86f 100644 (file)
@@ -28,7 +28,7 @@
        (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 
 /* Board and environment settings */
-#define CONFIG_MXC_UART_BASE           UART3_BASE_ADDR
+#define CONFIG_MXC_UART_BASE           UART_BASE_ADDR(3)
 #define CONFIG_HOSTNAME                        "kontron-mx8mm"
 
 #ifdef CONFIG_USB_EHCI_HCD
index e8e92920dcbca832136ad99c4284bcba17e15327..182ee590318e27d311fae2f57f5376940ded4f70 100644 (file)
@@ -84,7 +84,7 @@
 #define PHYS_SDRAM                      0x40000000
 #define PHYS_SDRAM_SIZE                        0xC0000000 /* 3GB DDR */
 
-#define CONFIG_MXC_UART_BASE           UART3_BASE_ADDR
+#define CONFIG_MXC_UART_BASE           UART_BASE_ADDR(3)
 
 #define CONFIG_SYS_FSL_USDHC_NUM       2
 #define CONFIG_SYS_FSL_ESDHC_ADDR       0
index 71f0c42ec0ccace07c9972224953e505ac22aacd..46fadd56106adbd91b13570acf136f0a6e1752cd 100644 (file)
@@ -84,7 +84,7 @@
 #define PHYS_SDRAM_SIZE                 SZ_2G /* 2GB DDR */
 
 /* UART */
-#define CONFIG_MXC_UART_BASE           UART3_BASE_ADDR
+#define CONFIG_MXC_UART_BASE           UART_BASE_ADDR(3)
 
 /* Monitor Command Prompt */
 #define CONFIG_SYS_CBSIZE              SZ_2K
index 0c963b62b3b5f86146368abd362af5dff36785f1..eb92c423392abf8bc1e49e0e44be00d9bf0346d1 100644 (file)
@@ -84,7 +84,7 @@
 #define PHYS_SDRAM_SIZE                        0x80000000
 
 /* UART */
-#define CONFIG_MXC_UART_BASE           UART1_BASE_ADDR
+#define CONFIG_MXC_UART_BASE           UART_BASE_ADDR(1)
 
 /* Monitor Command Prompt */
 #define CONFIG_SYS_CBSIZE              SZ_2K
index 95845276e7b42af328d507784ebaf482ef7e4a14..567b06c4f5d82fa23a3f84358b9bb191022f669b 100644 (file)
@@ -85,7 +85,7 @@
 #define PHYS_SDRAM                     0x40000000
 #define PHYS_SDRAM_SIZE                        0x80000000      /* 2 GiB DDR */
 
-#define CONFIG_MXC_UART_BASE           UART1_BASE_ADDR
+#define CONFIG_MXC_UART_BASE           UART_BASE_ADDR(1)
 
 /* Monitor Command Prompt */
 #define CONFIG_SYS_CBSIZE              1024
index da3dc95f9ee1d6b27bd1ee5029a19c156cfe458f..130a1ed54d1de30a05166dd12e72dd27a67f71a5 100644 (file)
@@ -84,7 +84,7 @@
 #define PHYS_SDRAM_SIZE                        SZ_2G /* 2GB DDR */
 
 /* UART */
-#define CONFIG_MXC_UART_BASE           UART1_BASE_ADDR
+#define CONFIG_MXC_UART_BASE           UART_BASE_ADDR(1)
 
 /* Monitor Command Prompt */
 #define CONFIG_SYS_CBSIZE              SZ_2K
index 7b7407752c15c7b1e1dba2f6bf7f32b81146b178..33cfd3d2d73689818e7bb0b91861adb59e45774d 100644 (file)
 #define PHYS_SDRAM_2_SIZE              (SZ_4G + SZ_1G)
 
 /* UART */
-#define CONFIG_MXC_UART_BASE           UART3_BASE_ADDR
+#define CONFIG_MXC_UART_BASE           UART_BASE_ADDR(3)
 
 /* Monitor Command Prompt */
 #define CONFIG_SYS_CBSIZE              SZ_2K