x86: coral: Allow init of debug UART in U-Boot proper

At present the debug UART is only set up in SPL, on the assumption that
the boot flow will always pass through there. When booting from coreboot,
SPL is not used, so the debug UART is not available.

Move the code into a common place so that it can be used in U-Boot proper
also. Add the required init to start_from_spl.S as well.

Signed-off-by: Simon Glass <sjg@chromium.org>

diff --git a/arch/x86/cpu/apollolake/cpu_common.c b/arch/x86/cpu/apollolake/cpu_common.c
index 63f6999b02472639d1373b67585855db667c2fd0..5d7d26b140fca3b2811442f709f2a09084b1a68c 100644 (file)
--- a/arch/x86/cpu/apollolake/cpu_common.c
+++ b/arch/x86/cpu/apollolake/cpu_common.c
@@ -7,11 +7,17 @@
 #include <dm.h>
 #include <log.h>
 #include <asm/cpu_common.h>
+#include <asm/io.h>
 #include <asm/msr.h>
+#include <asm/pci.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/iomap.h>
+#include <asm/arch/uart.h>
 #include <power/acpi_pmc.h>
 
+/* Define this here to avoid referencing any drivers for the debug UART 1 */
+#define PCH_DEV_P2SB   PCI_BDF(0, 0x0d, 0)
+
 void cpu_flush_l1d_to_l2(void)
 {
        struct msr_t msr;
@@ -40,3 +46,57 @@ void enable_pm_timer_emulation(const struct udevice *pmc)
        debug("PM timer %x %x\n", msr.hi, msr.lo);
        msr_write(MSR_EMULATE_PM_TIMER, msr);
 }
+
+static void pch_uart_init(void)
+{
+       /*
+        * Set up the pinmux so that the UART rx/tx signals are connected
+        * outside the SoC.
+        *
+        * There are about 500 lines of code required to program the GPIO
+        * configuration for the UARTs. But it boils down to four writes, and
+        * for the debug UART we want the minimum possible amount of code before
+        * the UART is running. So just add the magic writes here. See
+        * apl_hostbridge_early_init_pinctrl() for the full horror.
+        */
+       if (PCI_FUNC(PCH_DEV_UART) == 1) {
+               writel(0x40000402, 0xd0c50650);
+               writel(0x3c47, 0xd0c50654);
+               writel(0x40000400, 0xd0c50658);
+               writel(0x3c48, 0xd0c5065c);
+       } else { /* UART2 */
+               writel(0x40000402, 0xd0c50670);
+               writel(0x3c4b, 0xd0c50674);
+               writel(0x40000400, 0xd0c50678);
+               writel(0x3c4c, 0xd0c5067c);
+       }
+
+#ifdef CONFIG_DEBUG_UART
+       apl_uart_init(PCH_DEV_UART, CONFIG_DEBUG_UART_BASE);
+#endif
+}
+
+static void p2sb_enable_bar(ulong bar)
+{
+       /* Enable PCR Base address in PCH */
+       pci_x86_write_config(PCH_DEV_P2SB, PCI_BASE_ADDRESS_0, bar,
+                            PCI_SIZE_32);
+       pci_x86_write_config(PCH_DEV_P2SB, PCI_BASE_ADDRESS_1, 0, PCI_SIZE_32);
+
+       /* Enable P2SB MSE */
+       pci_x86_write_config(PCH_DEV_P2SB, PCI_COMMAND,
+                            PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY,
+                            PCI_SIZE_8);
+}
+
+/*
+ * board_debug_uart_init() - Init the debug UART ready for use
+ *
+ * This is the minimum init needed to get the UART running. It avoids any
+ * drivers or complex code, so that the UART is running as soon as possible.
+ */
+void board_debug_uart_init(void)
+{
+       p2sb_enable_bar(IOMAP_P2SB_BAR);
+       pch_uart_init();
+}

diff --git a/arch/x86/cpu/apollolake/cpu_spl.c b/arch/x86/cpu/apollolake/cpu_spl.c
index 9a18476b22c8cf3aec446633062d7e7f82a3fa3f..8f48457ee2209e656510cc06b1ef355f52103617 100644 (file)
--- a/arch/x86/cpu/apollolake/cpu_spl.c
+++ b/arch/x86/cpu/apollolake/cpu_spl.c
@@ -31,68 +31,10 @@
 #include <asm/arch/lpc.h>
 #include <asm/arch/pch.h>
 #include <asm/arch/systemagent.h>
-#include <asm/arch/uart.h>
 #include <asm/fsp2/fsp_api.h>
 #include <linux/sizes.h>
 #include <power/acpi_pmc.h>
 
-/* Define this here to avoid referencing any drivers for the debug UART 1 */
-#define PCH_DEV_P2SB   PCI_BDF(0, 0x0d, 0)
-
-static void pch_uart_init(void)
-{
-       /*
-        * Set up the pinmux so that the UART rx/tx signals are connected
-        * outside the SoC.
-        *
-        * There are about 500 lines of code required to program the GPIO
-        * configuration for the UARTs. But it boils down to four writes, and
-        * for the debug UART we want the minimum possible amount of code before
-        * the UART is running. So just add the magic writes here. See
-        * apl_hostbridge_early_init_pinctrl() for the full horror.
-        */
-       if (PCI_FUNC(PCH_DEV_UART) == 1) {
-               writel(0x40000402, 0xd0c50650);
-               writel(0x3c47, 0xd0c50654);
-               writel(0x40000400, 0xd0c50658);
-               writel(0x3c48, 0xd0c5065c);
-       } else { /* UART2 */
-               writel(0x40000402, 0xd0c50670);
-               writel(0x3c4b, 0xd0c50674);
-               writel(0x40000400, 0xd0c50678);
-               writel(0x3c4c, 0xd0c5067c);
-       }
-
-#ifdef CONFIG_DEBUG_UART
-       apl_uart_init(PCH_DEV_UART, CONFIG_DEBUG_UART_BASE);
-#endif
-}
-
-static void p2sb_enable_bar(ulong bar)
-{
-       /* Enable PCR Base address in PCH */
-       pci_x86_write_config(PCH_DEV_P2SB, PCI_BASE_ADDRESS_0, bar,
-                            PCI_SIZE_32);
-       pci_x86_write_config(PCH_DEV_P2SB, PCI_BASE_ADDRESS_1, 0, PCI_SIZE_32);
-
-       /* Enable P2SB MSE */
-       pci_x86_write_config(PCH_DEV_P2SB, PCI_COMMAND,
-                            PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY,
-                            PCI_SIZE_8);
-}
-
-/*
- * board_debug_uart_init() - Init the debug UART ready for use
- *
- * This is the minimum init needed to get the UART running. It avoids any
- * drivers or complex code, so that the UART is running as soon as possible.
- */
-void board_debug_uart_init(void)
-{
-       p2sb_enable_bar(IOMAP_P2SB_BAR);
-       pch_uart_init();
-}
-
 static int fast_spi_cache_bios_region(void)
 {
        uint map_size, offset;

diff --git a/arch/x86/cpu/start_from_spl.S b/arch/x86/cpu/start_from_spl.S
index 905c825cdc44d05189dd17451c433a6df6a74582..abfd4abb6239b1bc342fec106c9edd112dfe25ac 100644 (file)
--- a/arch/x86/cpu/start_from_spl.S
+++ b/arch/x86/cpu/start_from_spl.S
@@ -43,6 +43,10 @@ use_existing_stack:
 
        call    board_init_f_init_reserve
 
+#ifdef CONFIG_DEBUG_UART
+       call    debug_uart_init
+#endif
+
        call    x86_cpu_reinit_f
        xorl    %eax, %eax
        call    board_init_f

diff --git a/arch/x86/include/asm/arch-apollolake/uart.h b/arch/x86/include/asm/arch-apollolake/uart.h
index 38335b04903d6b950e605924f8a0d29c991ab6d8..c3ca171b83ba1ca263b653aa53af77ed7a7271dd 100644 (file)
--- a/arch/x86/include/asm/arch-apollolake/uart.h
+++ b/arch/x86/include/asm/arch-apollolake/uart.h
@@ -6,6 +6,7 @@
 #ifndef _ASM_ARCH_UART_H
 #define _ASM_ARCH_UART_H
 
+#include <dt-structs.h>
 #include <ns16550.h>
 
 /**