]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
ARM: socfpga: Actually put bridges into reset on Gen5 in bridge disable
authorMarek Vasut <marex@denx.de>
Wed, 20 Nov 2019 21:34:30 +0000 (22:34 +0100)
committerMarek Vasut <marex@denx.de>
Mon, 25 Nov 2019 12:12:55 +0000 (13:12 +0100)
On Gen5, the 'bridge disable' command write 0x0 to brgmodrst register,
which releases all bridges from reset, instead of putting all bridges
into reset. Fix this by inverting the mask and actually putting the
bridges into reset.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dalon Westergreen <dwesterg@gmail.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
arch/arm/mach-socfpga/misc_gen5.c

index 31681b799d4624b244d6147dc0017e8703bfac16..36f00aee31a970430f967eae49f7f6ca15be767f 100644 (file)
@@ -231,7 +231,7 @@ void do_bridge_reset(int enable, unsigned int mask)
        } else {
                writel(0, &sysmgr_regs->fpgaintfgrp_module);
                writel(0, &sdr_ctrl->fpgaport_rst);
-               writel(0, &reset_manager_base->brg_mod_reset);
+               writel(0x7, &reset_manager_base->brg_mod_reset);
                writel(1, &nic301_regs->remap);
        }
 }