board: mediatek: Add support for UniElec U7623 board

This is an MT7623A-based board, very similar to the Banana Pi R2.

http://www.unielecinc.com/q/news/cn/p/product/detail.html?qd_guid=OjXwKCaRlN

Signed-off-by: David Woodhouse <dwmw2@infradead.org>

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index a3a1e3fbe48ddeed83109be42a3b680d0ec557ba..caa7756c5d5527c2fa65a24be895c7f623f29bd4 100644 (file)
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -949,6 +949,7 @@ dtb-$(CONFIG_SOC_K3_J721E) += k3-j721e-common-proc-board.dtb \
 
 dtb-$(CONFIG_ARCH_MEDIATEK) += \
        mt7622-rfb.dtb \
+       mt7623a-unielec-u7623-02-emmc.dtb \
        mt7623n-bananapi-bpi-r2.dtb \
        mt7629-rfb.dtb \
        mt8512-bm1-emmc.dtb \

diff --git a/arch/arm/dts/mt7623a-unielec-u7623-02-emmc.dts b/arch/arm/dts/mt7623a-unielec-u7623-02-emmc.dts
new file mode 100644 (file)
index 0000000..fdeec75
--- /dev/null
+++ b/arch/arm/dts/mt7623a-unielec-u7623-02-emmc.dts
@@ -0,0 +1,211 @@
+/*
+ * Copyright (C) 2018 MediaTek Inc.
+ * Author: Ryder Lee <ryder.lee@mediatek.com>
+ *
+ * SPDX-License-Identifier: (GPL-2.0 OR MIT)
+ */
+
+/dts-v1/;
+#include "mt7623.dtsi"
+#include "mt7623-u-boot.dtsi"
+
+/ {
+       model = "UniElec U7623-02 eMMC";
+       compatible = "unielec,u7623-02-emmc", "mediatek,mt7623";
+
+       memory@80000000 {
+               device_type = "memory";
+               reg = <0 0x80000000 0 0x20000000>;
+       };
+
+       chosen {
+               stdout-path = &uart2;
+               tick-timer = &timer0;
+       };
+
+       reg_1p8v: regulator-1p8v {
+               compatible = "regulator-fixed";
+               regulator-name = "fixed-1.8V";
+               regulator-min-microvolt = <1800000>;
+               regulator-max-microvolt = <1800000>;
+               regulator-boot-on;
+               regulator-always-on;
+       };
+
+       reg_3p3v: regulator-3p3v {
+               compatible = "regulator-fixed";
+               regulator-name = "fixed-3.3V";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               regulator-boot-on;
+               regulator-always-on;
+       };
+
+       reg_5v: regulator-5v {
+               compatible = "regulator-fixed";
+               regulator-name = "fixed-5V";
+               regulator-min-microvolt = <5000000>;
+               regulator-max-microvolt = <5000000>;
+               regulator-boot-on;
+               regulator-always-on;
+       };
+
+       leds {
+               compatible = "gpio-leds";
+
+               led3 {
+                       label = "u7623-01:green:led3";
+                       gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
+                       default-state = "off";
+               };
+
+               led4 {
+                       label = "u7623-01:green:led4";
+                       gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
+                       default-state = "off";
+               };
+       };
+};
+
+&eth {
+       status = "okay";
+       mediatek,gmac-id = <0>;
+       phy-mode = "rgmii";
+       mediatek,switch = "mt7530";
+       mediatek,mcm;
+
+       fixed-link {
+               speed = <1000>;
+               full-duplex;
+       };
+};
+
+&mmc0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&mmc0_pins_default>;
+       status = "okay";
+       bus-width = <8>;
+       max-frequency = <50000000>;
+       cap-mmc-highspeed;
+       vmmc-supply = <&reg_3p3v>;
+       vqmmc-supply = <&reg_1p8v>;
+       non-removable;
+};
+
+&pinctrl {
+       ephy_default: ephy_default {
+               mux {
+                       function = "eth";
+                       groups = "mdc_mdio", "ephy";
+               };
+
+               conf {
+                       pins = "G2_TXEN", "G2_TXD0", "G2_TXD1", "G2_TXD2",
+                              "G2_TXD3", "G2_TXC", "G2_RXC", "G2_RXD0",
+                              "G2_RXD1", "G2_RXD2", "G2_RXD3", "G2_RXDV",
+                              "MDC", "MDIO";
+                       drive-strength = <12>;
+                       mediatek,tdsel = <5>;
+               };
+       };
+
+       mmc0_pins_default: mmc0default {
+               mux {
+                       function = "msdc";
+                       groups =  "msdc0";
+               };
+
+               conf-cmd-data {
+                       pins = "MSDC0_CMD", "MSDC0_DAT0", "MSDC0_DAT1",
+                              "MSDC0_DAT2", "MSDC0_DAT3", "MSDC0_DAT4",
+                              "MSDC0_DAT5", "MSDC0_DAT6", "MSDC0_DAT7";
+                       input-enable;
+                       bias-pull-up;
+               };
+
+               conf-clk {
+                       pins = "MSDC0_CLK";
+                       bias-pull-down;
+               };
+
+               conf-rst {
+                       pins = "MSDC0_RSTB";
+                       bias-pull-up;
+               };
+       };
+
+       pcie_default: pcie-default {
+               mux {
+                       function = "pcie";
+                       groups =  "pcie0_0_perst", "pcie1_0_perst";
+               };
+       };
+
+       uart0_pins_a: uart0-default {
+               mux {
+                       function = "uart";
+                       groups =  "uart0_0_txd_rxd";
+               };
+       };
+
+       uart1_pins_a: uart1-default {
+               mux {
+                       function = "uart";
+                       groups =  "uart1_0_txd_rxd";
+               };
+       };
+
+       uart2_pins_a: uart2-default {
+               mux {
+                       function = "uart";
+                       groups =  "uart2_0_txd_rxd";
+               };
+       };
+
+       uart2_pins_b: uart2-alt {
+               mux {
+                       function = "uart";
+                       groups =  "uart2_1_txd_rxd";
+               };
+       };
+};
+
+&pcie {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pcie_default>;
+       status = "okay";
+
+       pcie@0,0 {
+               status = "okay";
+       };
+
+       pcie@1,0 {
+               status = "okay";
+       };
+};
+
+&pcie0_phy {
+       status = "okay";
+};
+
+&pcie1_phy {
+       status = "okay";
+};
+
+&uart0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&uart0_pins_a>;
+       status = "okay";
+};
+
+&uart1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&uart1_pins_a>;
+       status = "okay";
+};
+
+&uart2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&uart2_pins_b>;
+       status = "okay";
+};

diff --git a/board/mediatek/mt7623/MAINTAINERS b/board/mediatek/mt7623/MAINTAINERS
index eeb0375d70871e5d1a9db46a9acc9743333c7182..1a8d796bd3f0452f49269ed1c8f812032b64d0a1 100644 (file)
--- a/board/mediatek/mt7623/MAINTAINERS
+++ b/board/mediatek/mt7623/MAINTAINERS
@@ -5,3 +5,10 @@ S:     Maintained
 F:     board/mediatek/mt7623
 F:     include/configs/mt7623.h
 F:     configs/mt7623n_bpir2_defconfig
+
+UNIELEC U7623
+M:     Ryder Lee <ryder.lee@mediatek.com>
+M:     David Woodhouse <dwmw2@infradead.org>
+S:     Maintained
+F:     arch/arm/dts/mt7623a-unielec-u7623-02-emmc.dts
+F:     configs/mt7623a_unielec_u7623_02_defconfig

diff --git a/configs/mt7623a_unielec_u7623_02_defconfig b/configs/mt7623a_unielec_u7623_02_defconfig
new file mode 100644 (file)
index 0000000..72b5f31
--- /dev/null
+++ b/configs/mt7623a_unielec_u7623_02_defconfig
@@ -0,0 +1,54 @@
+CONFIG_ARM=y
+CONFIG_SYS_THUMB_BUILD=y
+CONFIG_ARCH_MEDIATEK=y
+CONFIG_SYS_TEXT_BASE=0x81e00000
+CONFIG_SYS_MALLOC_F_LEN=0x4000
+CONFIG_ENV_SIZE=0x1000
+CONFIG_ENV_OFFSET=0x100000
+CONFIG_TARGET_MT7623=y
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_BOOTDELAY=3
+CONFIG_SYS_CONSOLE_IS_IN_ENV=y
+CONFIG_DEFAULT_FDT_FILE="mt7623a-unielec-u7623-02-emmc.dtb"
+# CONFIG_DISPLAY_BOARDINFO is not set
+CONFIG_SYS_PROMPT="U-Boot> "
+CONFIG_CMD_BOOTMENU=y
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_XIMG is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_READ=y
+# CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_NFS is not set
+CONFIG_DEFAULT_DEVICE_TREE="mt7623a-unielec-u7623-02-emmc"
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_CLK=y
+CONFIG_DM_MMC=y
+# CONFIG_MMC_QUIRKS is not set
+CONFIG_SUPPORT_EMMC_BOOT=y
+CONFIG_MMC_HS400_SUPPORT=y
+CONFIG_MMC_MTK=y
+CONFIG_PHY_FIXED=y
+CONFIG_DM_ETH=y
+CONFIG_MEDIATEK_ETH=y
+CONFIG_PINCTRL=y
+CONFIG_PINCONF=y
+CONFIG_PINCTRL_MT7623=y
+CONFIG_POWER_DOMAIN=y
+CONFIG_MTK_POWER_DOMAIN=y
+CONFIG_DM_SERIAL=y
+CONFIG_MTK_SERIAL=y
+CONFIG_SYSRESET=y
+CONFIG_SYSRESET_WATCHDOG=y
+CONFIG_TIMER=y
+CONFIG_MTK_TIMER=y
+CONFIG_WDT_MTK=y
+CONFIG_LZMA=y