]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
rockchip: rk3308: Fix loading FIT from SD-card when booting from eMMC
authorJonas Karlman <jonas@kwiboo.se>
Mon, 8 Apr 2024 18:14:03 +0000 (18:14 +0000)
committerKever Yang <kever.yang@rock-chips.com>
Fri, 26 Apr 2024 07:47:03 +0000 (15:47 +0800)
When RK3308 boards run SPL from eMMC and fail to load FIT from eMMC due
to it being missing or checksum validation fails there can be a fallback
to read FIT from SD-card. However, without proper pinctrl configuration
reading FIT from SD-card may fail:

  U-Boot SPL 2024.04-rc4 (Mar 16 2024 - 12:36:12 +0000)
  Trying to boot from MMC2
  mmc_load_image_raw_sector: mmc block read error
  Trying to boot from MMC1
  Card did not respond to voltage select! : -110
  mmc_init: -95, time 12
  spl: mmc init failed with error: -95
  Trying to boot from MMC2
  mmc_load_image_raw_sector: mmc block read error
  SPL: failed to boot from all boot devices (err=-6)
  ### ERROR ### Please RESET the board ###

Fix this by tagging related emmc and sdmmc pinctrl nodes with bootph
props. Also sort and move common nodes shared by all boards to the SoC
u-boot.dtsi.

Imply SPL_PINCTRL and SPL_DM_SEQ_ALIAS to apply correct pinconf before
trying to load FIT from a device.

Move u-boot,spl-boot-order to soc u-boot.dtsi and define both sdmmc and
emmc nodes as fallback.

Also fix boot from eMMC (SD NAND) on ROCK Pi S by using correct pinctrl.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
arch/arm/dts/rk3308-evb-u-boot.dtsi
arch/arm/dts/rk3308-roc-cc-u-boot.dtsi
arch/arm/dts/rk3308-rock-pi-s-u-boot.dtsi
arch/arm/dts/rk3308-u-boot.dtsi
arch/arm/mach-rockchip/Kconfig
configs/evb-rk3308_defconfig
configs/roc-cc-rk3308_defconfig
configs/rock-pi-s-rk3308_defconfig

index d15ba94d37b608f8b4fe3d03f83ee96b2928b209..007a69f9a60e888027aedec1ee151853a4a0cb7c 100644 (file)
@@ -4,14 +4,11 @@
  */
 #include "rk3308-u-boot.dtsi"
 
-/ {
-       chosen {
-               u-boot,spl-boot-order = "same-as-spl", &emmc;
-       };
-};
-
 &uart4 {
        bootph-all;
        clock-frequency = <24000000>;
-       status = "okay";
+};
+
+&uart4_xfer {
+       bootph-all;
 };
index 97d922c435d4cc0fa4f3eca4f020bafb7f139d9c..d823ac00c77131790d481f5d271e6b556ba48609 100644 (file)
@@ -4,14 +4,19 @@
  */
 #include "rk3308-u-boot.dtsi"
 
-/ {
-       chosen {
-               u-boot,spl-boot-order = "same-as-spl", &emmc;
-       };
+&gpio4 {
+       bootph-pre-ram;
 };
 
 &uart2 {
        bootph-all;
        clock-frequency = <24000000>;
-       status = "okay";
+};
+
+&uart2m0_xfer {
+       bootph-all;
+};
+
+&vcc_sd {
+       bootph-pre-ram;
 };
index d88dee80573e5746a9861e2ea220a71b821dc266..e458fb3142ee998aa80a612aa6c4500bb84b9f00 100644 (file)
@@ -4,39 +4,30 @@
  */
 #include "rk3308-u-boot.dtsi"
 
-/ {
-       chosen {
-               u-boot,spl-boot-order = "same-as-spl", &emmc, &sdmmc;
-       };
+&emmc {
+       cap-sd-highspeed;
+       pinctrl-names = "default";
+       pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus4>;
 };
 
-&uart0 {
-       bootph-all;
-};
-
-&pinctrl {
+&emmc_bus4 {
+       bootph-pre-ram;
        bootph-some-ram;
-
-       uart0 {
-               bootph-some-ram;
-       };
-       rtc {
-               bootph-some-ram;
-       };
 };
 
-&uart0_xfer {
-       bootph-some-ram;
+&uart0 {
+       bootph-all;
+       clock-frequency = <24000000>;
 };
 
 &uart0_cts {
-       bootph-some-ram;
+       bootph-all;
 };
 
 &uart0_rts {
-       bootph-some-ram;
+       bootph-all;
 };
 
-&rtc_32k {
-       bootph-some-ram;
+&uart0_xfer {
+       bootph-all;
 };
index fa31c838d34dba6303704be61de7300557a73c8f..26e1a94f2e1a9c57121a0139aeff78456dff28ad 100644 (file)
                mmc1 = &sdmmc;
        };
 
+       chosen {
+               u-boot,spl-boot-order = "same-as-spl", &sdmmc, &emmc;
+       };
+
        otp: nvmem@ff210000 {
                compatible = "rockchip,rk3308-otp";
                reg = <0x0 0xff210000 0x0 0x4000>;
 };
 
 &emmc {
+       bootph-pre-ram;
+       bootph-some-ram;
+
        /* mmc to sram can't do dma, prevent aborts transferring TF-A parts */
        u-boot,spl-fifo-mode;
+};
+
+&emmc_bus8 {
+       bootph-pre-ram;
+       bootph-some-ram;
+};
+
+&emmc_clk {
+       bootph-pre-ram;
+       bootph-some-ram;
+};
+
+&emmc_cmd {
+       bootph-pre-ram;
+       bootph-some-ram;
+};
+
+&grf {
        bootph-all;
 };
 
-&sdmmc {
+&pcfg_pull_none {
        bootph-all;
-       u-boot,spl-fifo-mode;
 };
 
-&grf {
+&pcfg_pull_none_4ma {
+       bootph-pre-ram;
+       bootph-some-ram;
+};
+
+&pcfg_pull_none_8ma {
+       bootph-pre-ram;
+       bootph-some-ram;
+};
+
+&pcfg_pull_up {
+       bootph-all;
+};
+
+&pcfg_pull_up_4ma {
+       bootph-pre-ram;
+       bootph-some-ram;
+};
+
+&pcfg_pull_up_8ma {
+       bootph-pre-ram;
+       bootph-some-ram;
+};
+
+&pinctrl {
        bootph-all;
 };
 
-&saradc {
+&rtc_32k {
        bootph-all;
-       status = "okay";
+};
+
+&sdmmc {
+       bootph-pre-ram;
+       bootph-some-ram;
+
+       /* mmc to sram can't do dma, prevent aborts transferring TF-A parts */
+       u-boot,spl-fifo-mode;
+};
+
+&sdmmc_bus4 {
+       bootph-pre-ram;
+       bootph-some-ram;
+};
+
+&sdmmc_clk {
+       bootph-pre-ram;
+       bootph-some-ram;
+};
+
+&sdmmc_cmd {
+       bootph-pre-ram;
+       bootph-some-ram;
+};
+
+&sdmmc_det {
+       bootph-pre-ram;
+       bootph-some-ram;
 };
index c17dbb615c2afbb19e9ca411378cc99e21f7d53d..36ff3db9cd3328d45e592345c0d32b407bb6e15f 100644 (file)
@@ -170,7 +170,9 @@ config ROCKCHIP_RK3308
        imply ROCKCHIP_COMMON_BOARD
        imply ROCKCHIP_OTP
        imply SPL_CLK
+       imply SPL_DM_SEQ_ALIAS
        imply SPL_FIT_SIGNATURE
+       imply SPL_PINCTRL
        imply SPL_RAM
        imply SPL_REGMAP
        imply SPL_ROCKCHIP_COMMON_BOARD
index 6a6d2540317dfac33af431c9d6d9472a3a35b1db..9dc7d9c0caea81dc7146fceb640a84a754b58d7e 100644 (file)
@@ -40,7 +40,7 @@ CONFIG_CMD_USB_MASS_STORAGE=y
 CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_LIVE=y
-CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_REGMAP=y
 CONFIG_SYSCON=y
index 2f4a160acc24214fbe4bafd75663457f15c2b3fc..041fa75b96590891a402a2105a5276679ff4e999 100644 (file)
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_SKIP_LOWLEVEL_INIT=y
 CONFIG_COUNTER_FREQUENCY=24000000
 CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_GPIO=y
 CONFIG_DEFAULT_DEVICE_TREE="rk3308-roc-cc"
 CONFIG_DM_RESET=y
 CONFIG_ROCKCHIP_RK3308=y
@@ -40,7 +41,7 @@ CONFIG_CMD_USB_MASS_STORAGE=y
 CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_LIVE=y
-CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_REGMAP=y
 CONFIG_SYSCON=y
@@ -57,6 +58,7 @@ CONFIG_PHY=y
 CONFIG_PINCTRL=y
 CONFIG_REGULATOR_PWM=y
 CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_SPL_DM_REGULATOR_FIXED=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
 CONFIG_BAUDRATE=1500000
index b0ad4d6ce35490703323dd4d84f3800a9060759b..27ee24a62290ccdb7bd63cc302e966a84a4f3d9a 100644 (file)
@@ -41,7 +41,7 @@ CONFIG_CMD_USB_MASS_STORAGE=y
 CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_LIVE=y
-CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_REGMAP=y
 CONFIG_SYSCON=y