]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
arm64: dts: imx8mp: Describe M24C32-D write-lockable page in DH i.MX8MP DHCOM DT
authorMarek Vasut <marex@denx.de>
Mon, 16 Oct 2023 00:05:25 +0000 (02:05 +0200)
committerStefano Babic <sbabic@denx.de>
Wed, 18 Oct 2023 19:29:59 +0000 (21:29 +0200)
The i.MX8MP DHCOM SoM production rev.200 is populated with M24C32-D
EEPROMs which have Additional Write lockable page at separate I2C
address. Describe the page in DT to make it available.

Disable the additional page in rev.100 SoM DTO as those devices
contain EEPROM without an Additional Write lockable page.

Signed-off-by: Marek Vasut <marex@denx.de>
arch/arm/dts/imx8mp-dhcom-som-overlay-rev100.dts
arch/arm/dts/imx8mp-dhcom-som.dtsi

index 5d9a00c942931dfcad8081e4e17aed596fecaa7e..0e5d329b1499da02773aad299171bdc954d860e9 100644 (file)
        pagesize = <16>;
 };
 
+&eeprom0wl {
+       status = "disabled";
+};
+
+&eeprom1wl {
+       status = "disabled";
+};
+
 &ethphy0f { /* SMSC LAN8740Ai */
        pinctrl-0 = <&pinctrl_ethphy0 &pinctrl_ioexp>;
        reset-gpios = <&gpio3 20 GPIO_ACTIVE_LOW>;
index ea2a567447a2af592ec431ff6bf56b54cddff744..b504d36818b572ca66d11b744d98fb739321e075 100644 (file)
                reg = <0x53>;
        };
 
+       eeprom0wl: eeprom@58 {
+               compatible = "atmel,24c32d-wl"; /* M24C32-D WL page of 0x50 */
+               pagesize = <32>;
+               reg = <0x58>;
+       };
+
+       eeprom1wl: eeprom@5b {
+               compatible = "atmel,24c32d-wl"; /* M24C32-D WL page of 0x53 */
+               pagesize = <32>;
+               reg = <0x5b>;
+       };
+
        ioexp: gpio@74 {
                compatible = "nxp,pca9539";
                reg = <0x74>;