clk: rockchip: rk356x: Add CLK_USB3OTGx_REF support

The CLK_USB3OTGx_REF clocks is used as reference clock for USB3 block.

Add simple support to get rate of CLK_USB3OTGx_REF clocks to fix
reference clock period configuration.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Acked-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_rk3568.c b/drivers/clk/rockchip/clk_rk3568.c
index 57ef27dda893d3380ed2267f06e85bbf0b9f9237..999f48ea4b4e2c21d0f18623728c4f71f31b10db 100644 (file)
--- a/drivers/clk/rockchip/clk_rk3568.c
+++ b/drivers/clk/rockchip/clk_rk3568.c
@@ -2417,6 +2417,8 @@ static ulong rk3568_clk_get_rate(struct clk *clk)
        case BCLK_EMMC:
                rate = rk3568_emmc_get_bclk(priv);
                break;
+       case CLK_USB3OTG0_REF:
+       case CLK_USB3OTG1_REF:
        case TCLK_EMMC:
                rate = OSC_HZ;
                break;
@@ -2596,6 +2598,8 @@ static ulong rk3568_clk_set_rate(struct clk *clk, ulong rate)
        case BCLK_EMMC:
                ret = rk3568_emmc_set_bclk(priv, rate);
                break;
+       case CLK_USB3OTG0_REF:
+       case CLK_USB3OTG1_REF:
        case TCLK_EMMC:
                ret = OSC_HZ;
                break;