]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
pci_ep: layerscape: Add the workaround for errata A-009460
authorXiaowei Bao <xiaowei.bao@nxp.com>
Thu, 9 Jul 2020 15:31:37 +0000 (23:31 +0800)
committerPriyanka Jain <priyanka.jain@nxp.com>
Mon, 27 Jul 2020 08:54:15 +0000 (14:24 +0530)
The VF_BARn_REG register's Prefetchable and Type bit fields
are overwritten by a write to VF's BAR Mask register.
workaround: Before writing to the VF_BARn_MASK_REG register,
write 0b to the PCIE_MISC_CONTROL_1_OFF register.

Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
drivers/pci/pcie_layerscape_ep.c

index e609607c3a9d5cdb4ba3f4d94f475a4c37c3c7b1..3f22c5ef7aab0c4cb40999935647cf9f6cad0140 100644 (file)
@@ -164,6 +164,15 @@ static void ls_pcie_setup_ep(struct ls_pcie_ep *pcie_ep)
        if (PCI_EXT_CAP_ID(sriov) == PCI_EXT_CAP_ID_SRIOV) {
                pcie_ep->sriov_flag = 1;
                for (pf = 0; pf < PCIE_PF_NUM; pf++) {
+                       /*
+                        * The VF_BARn_REG register's Prefetchable and Type bit
+                        * fields are overwritten by a write to VF's BAR Mask
+                        * register. Before writing to the VF_BARn_MASK_REG
+                        * register, write 0b to the PCIE_MISC_CONTROL_1_OFF
+                        * register.
+                        */
+                       writel(0, pcie->dbi + PCIE_MISC_CONTROL_1_OFF);
+
                        if (pcie_ep->cfg2_flag) {
                                for (vf = 0; vf <= PCIE_VF_NUM; vf++) {
                                        ctrl_writel(pcie,