arm: socfpga: Add base address for Intel N5X device

Reuse base_addr_soc64.h for Intel N5X device, the address is the
same as Agilex.

Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>

diff --git a/arch/arm/mach-socfpga/include/mach/base_addr_soc64.h b/arch/arm/mach-socfpga/include/mach/base_addr_soc64.h
index f89066d77171a6d7f8beb1e88339ac3d0a5c9216..3f899fcfa3acccd651ec24a7a9db0cff1d6e1cd2 100644 (file)
--- a/arch/arm/mach-socfpga/include/mach/base_addr_soc64.h
+++ b/arch/arm/mach-socfpga/include/mach/base_addr_soc64.h
@@ -10,7 +10,8 @@
 #define SOCFPGA_SDR_SCHEDULER_ADDRESS          0xf8000400
 #define SOCFPGA_HMC_MMR_IO48_ADDRESS           0xf8010000
 #define SOCFPGA_SDR_ADDRESS                    0xf8011000
-#ifdef CONFIG_TARGET_SOCFPGA_AGILEX
+#if IS_ENABLED(CONFIG_TARGET_SOCFPGA_AGILEX) || \
+       IS_ENABLED(CONFIG_TARGET_SOCFPGA_N5X)
 #define SOCFPGA_FW_MPU_DDR_SCR_ADDRESS         0xf8020200
 #else
 #define SOCFPGA_FW_MPU_DDR_SCR_ADDRESS         0xf8020100