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(parent: ba50fee) | patch
powerpc/p2041rdb: set sysclk according to status of physical switch SW1
authorShaohui Xie <Shaohui.Xie@freescale.com>
Tue, 13 Sep 2011 09:55:11 +0000 (17:55 +0800)
committerKumar Gala <galak@kernel.crashing.org>
Mon, 3 Oct 2011 13:30:02 +0000 (08:30 -0500)
commit44d50f0b54ef14534440bc5d789ec65240dfc0f8
tree3abda67a24ea3aca853e69ef631d6837c6346329tree | snapshot
parentba50fee6ae7e626bb2eda9d28403d7d3950f407acommit | diff
powerpc/p2041rdb: set sysclk according to status of physical switch SW1

P2041RDB supports 3 sysclk frequencies, it's selected by SW1[6~8],
software need to read the SW1 status to decide what the sysclk needs.

SW1[8~6] : frequency
0 0 1 : 83.3MHz
0 1 0 : 100MHz
others: 66.667MHz

Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
board/freescale/p2041rdb/cpld.h diff | blob | history
board/freescale/p2041rdb/p2041rdb.c diff | blob | history
include/configs/P2041RDB.h diff | blob | history
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