From 60b03f1cc408ffd2360303da4c5d09bec47b8cc2 Mon Sep 17 00:00:00 2001
From: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Date: Wed, 3 Feb 2021 03:10:47 -0700
Subject: [PATCH] clk: versal: Add support to enable clocks
Add clock enable functionality in versal clock driver to enable
clocks from peripheral drivers using clk_ops.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---
drivers/clk/clk_versal.c | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/drivers/clk/clk_versal.c b/drivers/clk/clk_versal.c
index 908bc7519c..62523d2909 100644
--- a/drivers/clk/clk_versal.c
+++ b/drivers/clk/clk_versal.c
@@ -718,9 +718,20 @@ static ulong versal_clk_set_rate(struct clk *clk, ulong rate)
return clk_rate;
}
+static int versal_clk_enable(struct clk *clk)
+{
+ struct versal_clk_priv *priv = dev_get_priv(clk->dev);
+ u32 clk_id;
+
+ clk_id = priv->clk[clk->id].clk_id;
+
+ return xilinx_pm_request(PM_CLOCK_ENABLE, clk_id, 0, 0, 0, NULL);
+}
+
static struct clk_ops versal_clk_ops = {
.set_rate = versal_clk_set_rate,
.get_rate = versal_clk_get_rate,
+ .enable = versal_clk_enable,
};
static const struct udevice_id versal_clk_ids[] = {
--
2.39.5