From: Fabio Estevam <festevam@denx.de>
Date: Fri, 2 Feb 2024 16:04:05 +0000 (-0300)
Subject: mx6sabresd: Remove board_phy_config()
X-Git-Tag: v2025.01-rc5-pxa1908~660^2~4
X-Git-Url: http://git.dujemihanovic.xyz/img/static//%22brlog.php?a=commitdiff_plain;h=450af2495e4cfb085b9850653ca498479c4bdb18;p=u-boot.git

mx6sabresd: Remove board_phy_config()

With Ethernet DM in place, there is no longer the need for having
the board_phy_config() anymore.

Remove it.

Confirmed that TFTP transfer still works fine without board_phy_config().

Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Igor Opaniuk <igor.opaniuk@foundries.io>
---

diff --git a/board/freescale/mx6sabresd/mx6sabresd.c b/board/freescale/mx6sabresd/mx6sabresd.c
index b558a596df..bb066a5d36 100644
--- a/board/freescale/mx6sabresd/mx6sabresd.c
+++ b/board/freescale/mx6sabresd/mx6sabresd.c
@@ -7,7 +7,6 @@
 
 #include <image.h>
 #include <init.h>
-#include <net.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/iomux.h>
@@ -254,39 +253,6 @@ int board_mmc_init(struct bd_info *bis)
 }
 #endif
 
-static int ar8031_phy_fixup(struct phy_device *phydev)
-{
-	unsigned short val;
-
-	/* To enable AR8031 ouput a 125MHz clk from CLK_25M */
-	phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x7);
-	phy_write(phydev, MDIO_DEVAD_NONE, 0xe, 0x8016);
-	phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x4007);
-
-	val = phy_read(phydev, MDIO_DEVAD_NONE, 0xe);
-	val &= 0xffe3;
-	val |= 0x18;
-	phy_write(phydev, MDIO_DEVAD_NONE, 0xe, val);
-
-	/* introduce tx clock delay */
-	phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x5);
-	val = phy_read(phydev, MDIO_DEVAD_NONE, 0x1e);
-	val |= 0x0100;
-	phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, val);
-
-	return 0;
-}
-
-int board_phy_config(struct phy_device *phydev)
-{
-	ar8031_phy_fixup(phydev);
-
-	if (phydev->drv->config)
-		phydev->drv->config(phydev);
-
-	return 0;
-}
-
 #if defined(CONFIG_VIDEO_IPUV3)
 static void disable_lvds(struct display_info_t const *dev)
 {