From: Michal Simek <michal.simek@amd.com>
Date: Fri, 24 Jun 2022 12:14:59 +0000 (+0200)
Subject: microblaze: Fix stack protection behavior
X-Git-Tag: v2025.01-rc5-pxa1908~1353^2~13^2~52
X-Git-Url: http://git.dujemihanovic.xyz/img/static//%22brlog.php?a=commitdiff_plain;h=16a18471bbdeb051d6905c1cba5a1bb84a2fbe49;p=u-boot.git

microblaze: Fix stack protection behavior

When U-Boot starts stack protection can be already enabled that's why setup
the lowest possible SLR value which is address 0. And the highest possible
stack in front of U-Boot. That's why you should never load U-Boot to the
beginning of DDR. There must be some space reserved. Code is using this
location for early malloc space, early global data and stack.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/86b9748bad12142659804d6381bc6bbf20be44f1.1655299267.git.michal.simek@amd.com
---

diff --git a/arch/microblaze/cpu/start.S b/arch/microblaze/cpu/start.S
index 9e00eef1f4..715ef37b39 100644
--- a/arch/microblaze/cpu/start.S
+++ b/arch/microblaze/cpu/start.S
@@ -15,8 +15,9 @@
 _start:
 	mts	rmsr, r0	/* disable cache */
 
-	addi	r8, r0, _end
-	mts	rslr, r8
+	mts	rslr, r0
+	addi	r8, r0, _start
+	mts	rshr, r8
 
 #if defined(CONFIG_SPL_BUILD)
 	addi	r1, r0, CONFIG_SPL_STACK_ADDR