From 1251d51ca587431d07fb37fecb86b21db682e250 Mon Sep 17 00:00:00 2001
From: Simon Glass <sjg@chromium.org>
Date: Tue, 2 Jun 2015 11:08:20 -0600
Subject: [PATCH] arm: Add ENTRY/ENDPROC to private libgcc functions
When CONFIG_SYS_THUMB_BUILD is defined these functions may be called from
Thumb code. Add the required ENTRY and ENDPROC bracketing so that BLX is
used to call these ARM functions, instead of plain BL, which will fail.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Pavel Machek <pavel@denx.de>
---
arch/arm/lib/_ashldi3.S | 6 ++++--
arch/arm/lib/_ashrdi3.S | 6 ++++--
arch/arm/lib/_divsi3.S | 6 ++++--
arch/arm/lib/_lshrdi3.S | 6 ++++--
arch/arm/lib/_modsi3.S | 7 ++++---
arch/arm/lib/_udivsi3.S | 10 ++++++----
arch/arm/lib/_umodsi3.S | 6 ++++--
7 files changed, 30 insertions(+), 17 deletions(-)
diff --git a/arch/arm/lib/_ashldi3.S b/arch/arm/lib/_ashldi3.S
index 2c26f84ac7..9c34c212cb 100644
--- a/arch/arm/lib/_ashldi3.S
+++ b/arch/arm/lib/_ashldi3.S
@@ -4,6 +4,8 @@
* SPDX-License-Identifier: GPL-2.0+
*/
+#include <linux/linkage.h>
+
#ifdef __ARMEB__
#define al r1
#define ah r0
@@ -13,9 +15,8 @@
#endif
.globl __ashldi3
-.globl __aeabi_llsl
__ashldi3:
-__aeabi_llsl:
+ENTRY(__aeabi_llsl)
subs r3, r2, #32
rsb ip, r2, #32
@@ -24,3 +25,4 @@ __aeabi_llsl:
orrmi ah, ah, al, lsr ip
mov al, al, lsl r2
mov pc, lr
+ENDPROC(__aeabi_llsl)
diff --git a/arch/arm/lib/_ashrdi3.S b/arch/arm/lib/_ashrdi3.S
index 4d93c8a5e6..c74fd64499 100644
--- a/arch/arm/lib/_ashrdi3.S
+++ b/arch/arm/lib/_ashrdi3.S
@@ -4,6 +4,8 @@
* SPDX-License-Identifier: GPL-2.0+
*/
+#include <linux/linkage.h>
+
#ifdef __ARMEB__
#define al r1
#define ah r0
@@ -13,9 +15,8 @@
#endif
.globl __ashrdi3
-.globl __aeabi_lasr
__ashrdi3:
-__aeabi_lasr:
+ENTRY(__aeabi_lasr)
subs r3, r2, #32
rsb ip, r2, #32
@@ -24,3 +25,4 @@ __aeabi_lasr:
orrmi al, al, ah, lsl ip
mov ah, ah, asr r2
mov pc, lr
+ENDPROC(__aeabi_lasr)
diff --git a/arch/arm/lib/_divsi3.S b/arch/arm/lib/_divsi3.S
index 601549304e..c463c68f85 100644
--- a/arch/arm/lib/_divsi3.S
+++ b/arch/arm/lib/_divsi3.S
@@ -1,3 +1,5 @@
+#include <linux/linkage.h>
+
.macro ARM_DIV_BODY dividend, divisor, result, curbit
#if __LINUX_ARM_ARCH__ >= 5
@@ -95,9 +97,8 @@
.align 5
.globl __divsi3
-.globl __aeabi_idiv
__divsi3:
-__aeabi_idiv:
+ENTRY(__aeabi_idiv)
cmp r1, #0
eor ip, r0, r1 @ save the sign of the result.
beq Ldiv0
@@ -139,3 +140,4 @@ Ldiv0:
bl __div0
mov r0, #0 @ About as wrong as it could be.
ldr pc, [sp], #4
+ENDPROC(__aeabi_idiv)
diff --git a/arch/arm/lib/_lshrdi3.S b/arch/arm/lib/_lshrdi3.S
index 33296a0a93..1f9b916464 100644
--- a/arch/arm/lib/_lshrdi3.S
+++ b/arch/arm/lib/_lshrdi3.S
@@ -4,6 +4,8 @@
* SPDX-License-Identifier: GPL-2.0+
*/
+#include <linux/linkage.h>
+
#ifdef __ARMEB__
#define al r1
#define ah r0
@@ -13,9 +15,8 @@
#endif
.globl __lshrdi3
-.globl __aeabi_llsr
__lshrdi3:
-__aeabi_llsr:
+ENTRY(__aeabi_llsr)
subs r3, r2, #32
rsb ip, r2, #32
@@ -24,3 +25,4 @@ __aeabi_llsr:
orrmi al, al, ah, lsl ip
mov ah, ah, lsr r2
mov pc, lr
+ENDPROC(__aeabi_llsr)
diff --git a/arch/arm/lib/_modsi3.S b/arch/arm/lib/_modsi3.S
index 3d31a559f8..c5e1c229df 100644
--- a/arch/arm/lib/_modsi3.S
+++ b/arch/arm/lib/_modsi3.S
@@ -1,3 +1,5 @@
+#include <linux/linkage.h>
+
.macro ARM_MOD_BODY dividend, divisor, order, spare
#if __LINUX_ARM_ARCH__ >= 5
@@ -69,8 +71,7 @@
.endm
.align 5
-.globl __modsi3
-__modsi3:
+ENTRY(__modsi3)
cmp r1, #0
beq Ldiv0
rsbmi r1, r1, #0 @ loops below use unsigned.
@@ -88,7 +89,7 @@ __modsi3:
10: cmp ip, #0
rsbmi r0, r0, #0
mov pc, lr
-
+ENDPROC(__modsi3)
Ldiv0:
diff --git a/arch/arm/lib/_udivsi3.S b/arch/arm/lib/_udivsi3.S
index 1309802610..3b653bed99 100644
--- a/arch/arm/lib/_udivsi3.S
+++ b/arch/arm/lib/_udivsi3.S
@@ -1,3 +1,5 @@
+#include <linux/linkage.h>
+
/* # 1 "libgcc1.S" */
@ libgcc1 routines for ARM cpu.
@ Division routines, written by Richard Earnshaw, (rearnsha@armltd.co.uk)
@@ -72,8 +74,7 @@ Ldiv0:
ldmia sp!, {pc}
.size __udivsi3 , . - __udivsi3
-.globl __aeabi_uidivmod
-__aeabi_uidivmod:
+ENTRY(__aeabi_uidivmod)
stmfd sp!, {r0, r1, ip, lr}
bl __aeabi_uidiv
@@ -81,9 +82,9 @@ __aeabi_uidivmod:
mul r3, r0, r2
sub r1, r1, r3
mov pc, lr
+ENDPROC(__aeabi_uidivmod)
-.globl __aeabi_idivmod
-__aeabi_idivmod:
+ENTRY(__aeabi_idivmod)
stmfd sp!, {r0, r1, ip, lr}
bl __aeabi_idiv
@@ -91,3 +92,4 @@ __aeabi_idivmod:
mul r3, r0, r2
sub r1, r1, r3
mov pc, lr
+ENDPROC(__aeabi_idivmod)
diff --git a/arch/arm/lib/_umodsi3.S b/arch/arm/lib/_umodsi3.S
index 8465ef09d2..b1667376c5 100644
--- a/arch/arm/lib/_umodsi3.S
+++ b/arch/arm/lib/_umodsi3.S
@@ -1,3 +1,5 @@
+#include <linux/linkage.h>
+
/* # 1 "libgcc1.S" */
@ libgcc1 routines for ARM cpu.
@ Division routines, written by Richard Earnshaw, (rearnsha@armltd.co.uk)
@@ -11,10 +13,9 @@ curbit .req r3
/* lr .req r14 */
/* pc .req r15 */
.text
- .globl __umodsi3
.type __umodsi3 ,function
.align 0
- __umodsi3 :
+ ENTRY(__umodsi3)
cmp divisor, #0
beq Ldiv0
mov curbit, #1
@@ -86,3 +87,4 @@ Ldiv0:
/* # 456 "libgcc1.S" */
/* # 500 "libgcc1.S" */
/* # 580 "libgcc1.S" */
+ENDPROC(__umodsi3)
--
2.39.5