From fe2f284270718c6cfbe7f87e7e1f378c2b172bf5 Mon Sep 17 00:00:00 2001 From: Billy Tsai Date: Wed, 13 Apr 2022 13:34:51 +0800 Subject: [PATCH] gpio: aspeed: Fix incorrect offset of read back register. The offset of the current read back register is the value of the gpio pin, not the value written for the gpio output. This patch fix it to avoid the other gpio output value controlled by the same register being set incorrectly. Fixes: 7ad889b0f37a ("gpio: Add Aspeed GPIO driver") Signed-off-by: Billy Tsai --- drivers/gpio/gpio-aspeed.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpio/gpio-aspeed.c b/drivers/gpio/gpio-aspeed.c index a8a2afcb5c..2c5415c671 100644 --- a/drivers/gpio/gpio-aspeed.c +++ b/drivers/gpio/gpio-aspeed.c @@ -211,7 +211,7 @@ static int aspeed_gpio_direction_output(struct udevice *dev, unsigned int offset struct aspeed_gpio_priv *priv = dev_get_priv(dev); const struct aspeed_gpio_bank *bank = to_bank(offset); u32 dir = readl(bank_reg(priv, bank, reg_dir)); - u32 output = readl(bank_reg(priv, bank, reg_val)); + u32 output = readl(bank_reg(priv, bank, reg_rdata)); dir |= GPIO_BIT(offset); writel(dir, bank_reg(priv, bank, reg_dir)); @@ -239,7 +239,7 @@ aspeed_gpio_set_value(struct udevice *dev, unsigned int offset, int value) { struct aspeed_gpio_priv *priv = dev_get_priv(dev); const struct aspeed_gpio_bank *bank = to_bank(offset); - u32 data = readl(bank_reg(priv, bank, reg_val)); + u32 data = readl(bank_reg(priv, bank, reg_rdata)); if (value) data |= GPIO_BIT(offset); -- 2.39.5