From de14a5a95c14b0a5349c430ea35b8b07975f7ce5 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Pali=20Roh=C3=A1r?= Date: Sun, 3 Apr 2022 00:05:09 +0200 Subject: [PATCH] powerpc: mpc85xx: Rename _start_e500 symbol to _start MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit The real entry point is _start_e500. There is no _start symbol at all. So rename _start_e500 to _start for convension that _start symbol is used as entry point. Signed-off-by: Pali Rohár Reviewed-by: Priyanka Jain --- arch/powerpc/cpu/mpc85xx/resetvec.S | 2 +- arch/powerpc/cpu/mpc85xx/start.S | 4 ++-- arch/powerpc/cpu/mpc85xx/u-boot.lds | 2 +- doc/README.mpc85xx | 4 ++-- 4 files changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/powerpc/cpu/mpc85xx/resetvec.S b/arch/powerpc/cpu/mpc85xx/resetvec.S index 29555d4a00..9a552f6624 100644 --- a/arch/powerpc/cpu/mpc85xx/resetvec.S +++ b/arch/powerpc/cpu/mpc85xx/resetvec.S @@ -1,2 +1,2 @@ .section .resetvec,"ax" - b _start_e500 + b _start diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S index 07e855e89b..2b2ad97359 100644 --- a/arch/powerpc/cpu/mpc85xx/start.S +++ b/arch/powerpc/cpu/mpc85xx/start.S @@ -70,9 +70,9 @@ */ .section .bootpg,"ax" - .globl _start_e500 + .globl _start -_start_e500: +_start: /* Enable debug exception */ li r1,MSR_DE mtmsr r1 diff --git a/arch/powerpc/cpu/mpc85xx/u-boot.lds b/arch/powerpc/cpu/mpc85xx/u-boot.lds index 22bbac51aa..17a0e631ca 100644 --- a/arch/powerpc/cpu/mpc85xx/u-boot.lds +++ b/arch/powerpc/cpu/mpc85xx/u-boot.lds @@ -16,7 +16,7 @@ #endif OUTPUT_ARCH(powerpc) -ENTRY(_start_e500) +ENTRY(_start) PHDRS { diff --git a/doc/README.mpc85xx b/doc/README.mpc85xx index 8464e7f4d8..3c6ebbdb0e 100644 --- a/doc/README.mpc85xx +++ b/doc/README.mpc85xx @@ -45,7 +45,7 @@ Note: Sequence number is in order of execution A) defined(CONFIG_SYS_RAMBOOT) i.e. SD, SPI, NAND RAMBOOT & NAND_SPL boot 1) TLB entry to overcome e500 v1/v2 debug restriction - Location : Label "_start_e500" + Location : Label "_start" TLB Entry : CONFIG_SYS_PPC_E500_DEBUG_TLB EPN -->RPN : CONFIG_SYS_MONITOR_BASE --> CONFIG_SYS_MONITOR_BASE Properties : 256K, AS0, I, IPROT @@ -91,7 +91,7 @@ A) defined(CONFIG_SYS_RAMBOOT) i.e. SD, SPI, NAND RAMBOOT & NAND_SPL boot B) !defined(CONFIG_SYS_RAMBOOT) i.e. NOR boot 1) TLB entry to overcome e500 v1/v2 debug restriction - Location : Label "_start_e500" + Location : Label "_start" TLB Entry : CONFIG_SYS_PPC_E500_DEBUG_TLB #if defined(CONFIG_NXP_ESBC) EPN -->RPN : CONFIG_SYS_MONITOR_BASE --> CONFIG_SYS_PBI_FLASH_WINDOW -- 2.39.5