From bde237368adb421a39c418ee57c7bd9c330a2ef9 Mon Sep 17 00:00:00 2001 From: Alexey Brodkin Date: Tue, 4 Feb 2014 12:56:21 +0400 Subject: [PATCH] arc: add README for architecture Signed-off-by: Alexey Brodkin Cc: Vineet Gupta Cc: Francois Bedard Cc: Wolfgang Denk Cc: Heiko Schocher --- doc/README.ARC | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) create mode 100644 doc/README.ARC diff --git a/doc/README.ARC b/doc/README.ARC new file mode 100644 index 0000000000..5f414fb2fa --- /dev/null +++ b/doc/README.ARC @@ -0,0 +1,27 @@ +Synopsys' DesignWare(r) ARC(r) Processors are a family of 32-bit CPUs +that SoC designers can optimize for a wide range of uses, from deeply embedded +to high-performance host applications. + +More information on ARC cores avaialble here: +http://www.synopsys.com/IP/ProcessorIP/ARCProcessors/Pages/default.aspx + +Designers can differentiate their products by using patented configuration +technology to tailor each ARC processor instance to meet specific performance, +power and area requirements. + +The DesignWare ARC processors are also extendable, allowing designers to add +their own custom instructions that dramatically increase performance. + +Synopsys' ARC processors have been used by over 170 customers worldwide who +collectively ship more than 1 billion ARC-based chips annually. + +All DesignWare ARC processors utilize a 16-/32-bit ISA that provides excellent +performance and code density for embedded and host SoC applications. + +The RISC microprocessors are synthesizable and can be implemented in any foundry +or process, and are supported by a complete suite of development tools. + +The ARC GNU toolchain with support for all ARC Processors can be downloaded +from here (available pre-built toolchains as well): + +https://github.com/foss-for-synopsys-dwc-arc-processors/toolchain/releases -- 2.39.5