From b5a2a764547d478a3ea513bcc8c463c041ca8696 Mon Sep 17 00:00:00 2001 From: Ricardo Salveti Date: Tue, 31 Aug 2021 14:53:42 +0300 Subject: [PATCH] mx7ulp: add getting a board serial number Get Unique ID of SoC iMX7ULP, using the logic described in Fusemap (IMX7ULPRMB2_Rev0_Fusemap) attached in the i.MX 7ULP APRM [1]. [1] https://www.nxp.com/docs/en/reference-manual/IMX7ULPRMB2.pdf Signed-off-by: Ricardo Salveti Co-developed-by: Oleksandr Suvorov Signed-off-by: Oleksandr Suvorov Reviewed-by: Fabio Estevam --- arch/arm/mach-imx/mx7ulp/soc.c | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/arch/arm/mach-imx/mx7ulp/soc.c b/arch/arm/mach-imx/mx7ulp/soc.c index 7f097d6850..c90ce22404 100644 --- a/arch/arm/mach-imx/mx7ulp/soc.c +++ b/arch/arm/mach-imx/mx7ulp/soc.c @@ -13,6 +13,7 @@ #include #include #include +#include #include #define PMC0_BASE_ADDR 0x410a1000 @@ -380,3 +381,25 @@ enum boot_device get_boot_device(void) return boot_dev; } + +#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG +/* + * OCOTP_CFG (SJC CHALLENGE, Unique ID) + * i.MX 7ULP Applications Processor Reference Manual, Rev. 0, 09/2020 + * + * OCOTP_CFG0 offset 0x4B0: 15:0 -> 15:0 bits of Unique ID + * OCOTP_CFG1 offset 0x4C0: 15:0 -> 31:16 bits of Unique ID + * OCOTP_CFG2 offset 0x4D0: 15:0 -> 47:32 bits of Unique ID + * OCOTP_CFG3 offset 0x4E0: 15:0 -> 63:48 bits of Unique ID + */ +void get_board_serial(struct tag_serialnr *serialnr) +{ + struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR; + struct fuse_bank *bank = &ocotp->bank[1]; + struct fuse_bank1_regs *fuse = + (struct fuse_bank1_regs *)bank->fuse_regs; + + serialnr->low = (fuse->cfg0 & 0xFFFF) + ((fuse->cfg1 & 0xFFFF) << 16); + serialnr->high = (fuse->cfg2 & 0xFFFF) + ((fuse->cfg3 & 0xFFFF) << 16); +} +#endif /* CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG */ -- 2.39.5