From a30ac34ca8967cb318d4a435258dea78242d9d45 Mon Sep 17 00:00:00 2001 From: Venkatesh Yadav Abbarapu Date: Thu, 8 Jun 2023 08:51:52 +0530 Subject: [PATCH] arm64: zynqmp: Fix lockstep mode cpu release functionality For lockstep mode, cpu_release function is expecting to execute on R5 core 0, if there is attempt to pass other than R5 core 0, through an error saying "Lockstep mode should run on R5 core 0 only". Signed-off-by: Venkatesh Yadav Abbarapu Link: https://lore.kernel.org/r/20230608032152.980-3-venkatesh.abbarapu@amd.com Signed-off-by: Michal Simek --- arch/arm/mach-zynqmp/mp.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/mach-zynqmp/mp.c b/arch/arm/mach-zynqmp/mp.c index 7a12f4b2b6..b06c867e57 100644 --- a/arch/arm/mach-zynqmp/mp.c +++ b/arch/arm/mach-zynqmp/mp.c @@ -326,6 +326,10 @@ int cpu_release(u32 nr, int argc, char *const argv[]) flush_dcache_all(); if (!strncmp(argv[1], "lockstep", 8)) { + if (nr != ZYNQMP_CORE_RPU0) { + printf("Lockstep mode should run on ZYNQMP_CORE_RPU0\n"); + return 1; + } printf("R5 lockstep mode\n"); set_r5_reset(nr, LOCK); set_r5_tcm_mode(LOCK); -- 2.39.5