From a03174cbfaef9cc8b51429bbde6e27539f428a83 Mon Sep 17 00:00:00 2001 From: Christian Marangi Date: Fri, 28 Jun 2024 19:40:49 +0200 Subject: [PATCH] clk: mediatek: add support for gate ID at offset Add support to clk_gate ops to reference the clk ID at an offset by using the just introduced gates_offs value from the unified muxes + gates implementation. Gate clock that doesn't have gates_offs set won't be affected as the offset will simply be 0 and won't be offset of any value. Signed-off-by: Christian Marangi --- drivers/clk/mediatek/clk-mtk.c | 18 +++++++++++++++--- 1 file changed, 15 insertions(+), 3 deletions(-) diff --git a/drivers/clk/mediatek/clk-mtk.c b/drivers/clk/mediatek/clk-mtk.c index 986e73542d..1d5ae8f236 100644 --- a/drivers/clk/mediatek/clk-mtk.c +++ b/drivers/clk/mediatek/clk-mtk.c @@ -530,8 +530,12 @@ static int mtk_gate_enable(void __iomem *base, const struct mtk_gate *gate) static int mtk_clk_gate_enable(struct clk *clk) { struct mtk_cg_priv *priv = dev_get_priv(clk->dev); - const struct mtk_gate *gate = &priv->gates[clk->id]; + const struct mtk_gate *gate; + + if (clk->id < priv->tree->gates_offs) + return -EINVAL; + gate = &priv->gates[clk->id - priv->tree->gates_offs]; return mtk_gate_enable(priv->base, gate); } @@ -576,8 +580,12 @@ static int mtk_gate_disable(void __iomem *base, const struct mtk_gate *gate) static int mtk_clk_gate_disable(struct clk *clk) { struct mtk_cg_priv *priv = dev_get_priv(clk->dev); - const struct mtk_gate *gate = &priv->gates[clk->id]; + const struct mtk_gate *gate; + if (clk->id < priv->tree->gates_offs) + return -EINVAL; + + gate = &priv->gates[clk->id - priv->tree->gates_offs]; return mtk_gate_disable(priv->base, gate); } @@ -597,8 +605,12 @@ static int mtk_clk_infrasys_disable(struct clk *clk) static ulong mtk_clk_gate_get_rate(struct clk *clk) { struct mtk_cg_priv *priv = dev_get_priv(clk->dev); - const struct mtk_gate *gate = &priv->gates[clk->id]; + const struct mtk_gate *gate; + + if (clk->id < priv->tree->gates_offs) + return -EINVAL; + gate = &priv->gates[clk->id - priv->tree->gates_offs]; /* * Assume xtal_rate to be declared if some gates have * XTAL as parent -- 2.39.5