From 8ee4ffcd0bf684ade6eccffec796a49ee15b3333 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Fri, 19 Aug 2022 13:02:53 +0200 Subject: [PATCH] ARM: imx: Update DDR frequency on i.MX8M Plus DHCOM Commit 99c7cc58e12 ("ddr: imx: Add i.MX9 DDR controller driver") contains an inobvious side-effect which renders all systems using DRAM controller at 3732 MT/s unbootable. The change is located in ddrphy_init_set_dfi_clk(), where the switch case statement entry 3732 changed to entry 3733, so any board with DDR calibration data for 3732 MT/s operations needs to be updated to 3733 MT/s to match the change. Since there is currently only one such board, update the board instead of handling both 3732 and 3733 options in the driver. It is likely the NXP MX8MP RPA update will follow and use the later value too. Signed-off-by: Marek Vasut Cc: Fabio Estevam Cc: Peng Fan Cc: Stefano Babic Cc: Ye Li Cc: uboot-imx Reviewed-by: Fabio Estevam --- board/dhelectronics/dh_imx8mp/lpddr4_timing_4G_32.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/board/dhelectronics/dh_imx8mp/lpddr4_timing_4G_32.c b/board/dhelectronics/dh_imx8mp/lpddr4_timing_4G_32.c index 2eda4a5956..a4c1b121c2 100644 --- a/board/dhelectronics/dh_imx8mp/lpddr4_timing_4G_32.c +++ b/board/dhelectronics/dh_imx8mp/lpddr4_timing_4G_32.c @@ -1799,8 +1799,8 @@ static struct dram_cfg_param ddr_phy_pie[] = { static struct dram_fsp_msg ddr_dram_fsp_msg[] = { { - /* P0 3732mts 1D */ - .drate = 3732, + /* P0 3733mts 1D */ + .drate = 3733, .fw_type = FW_1D_IMAGE, .fsp_cfg = ddr_fsp0_cfg, .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_cfg), @@ -1820,8 +1820,8 @@ static struct dram_fsp_msg ddr_dram_fsp_msg[] = { .fsp_cfg_num = ARRAY_SIZE(ddr_fsp2_cfg), }, { - /* P0 3732mts 2D */ - .drate = 3732, + /* P0 3733mts 2D */ + .drate = 3733, .fw_type = FW_2D_IMAGE, .fsp_cfg = ddr_fsp0_2d_cfg, .fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_2d_cfg), @@ -1840,5 +1840,5 @@ struct dram_timing_info dh_imx8mp_dhcom_dram_timing_32g_x32 = { .ddrphy_trained_csr_num = ARRAY_SIZE(ddr_ddrphy_trained_csr), .ddrphy_pie = ddr_phy_pie, .ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie), - .fsp_table = { 3732, 400, 100, }, + .fsp_table = { 3733, 400, 100, }, }; -- 2.39.5