From 77dd7c6854f3bd8ddc422f0cb1953071fe00dc6c Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Fri, 6 Dec 2019 21:41:49 -0700 Subject: [PATCH] x86: timer: use a timer base of 0 On x86 platforms the timer is reset to 0 when the SoC is reset. Having this as the timer base is useful since it provides an indication of how long it takes before U-Boot is running. When U-Boot sets the timer base to something else, time is lost and we no-longer have an accurate account of the time since reset. This particularly affects bootstage. Change the default to not read the timer base, leaving it at 0. Add an option for when U-Boot is the secondary bootloader. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- arch/x86/cpu/coreboot/Kconfig | 1 + arch/x86/cpu/slimbootloader/Kconfig | 1 + drivers/timer/Kconfig | 14 ++++++++++++++ drivers/timer/tsc_timer.c | 3 ++- lib/efi/Kconfig | 1 + 5 files changed, 19 insertions(+), 1 deletion(-) diff --git a/arch/x86/cpu/coreboot/Kconfig b/arch/x86/cpu/coreboot/Kconfig index 93f61f2fa4..c8e6a889d0 100644 --- a/arch/x86/cpu/coreboot/Kconfig +++ b/arch/x86/cpu/coreboot/Kconfig @@ -24,5 +24,6 @@ config SYS_COREBOOT imply CMD_CBFS imply FS_CBFS imply CBMEM_CONSOLE + imply X86_TSC_READ_BASE endif diff --git a/arch/x86/cpu/slimbootloader/Kconfig b/arch/x86/cpu/slimbootloader/Kconfig index 3ea4c9958c..58a9ca01a9 100644 --- a/arch/x86/cpu/slimbootloader/Kconfig +++ b/arch/x86/cpu/slimbootloader/Kconfig @@ -17,3 +17,4 @@ config SYS_SLIMBOOTLOADER imply USB_EHCI_HCD imply USB_XHCI_HCD imply E1000 + imply X86_TSC_READ_BASE diff --git a/drivers/timer/Kconfig b/drivers/timer/Kconfig index 5f4bc6edb6..41f9755133 100644 --- a/drivers/timer/Kconfig +++ b/drivers/timer/Kconfig @@ -174,6 +174,20 @@ config X86_TSC_TIMER help Select this to enable Time-Stamp Counter (TSC) timer for x86. +config X86_TSC_READ_BASE + bool "Read the TSC timer base on start-up" + depends on X86_TSC_TIMER + help + On x86 platforms the TSC timer tick starts at the value 0 on reset. + This it makes no sense to read the timer on boot and use that as the + base, since we will miss some time taken to load U-Boot, etc. This + delay is controlled by the SoC and we cannot reduce it, but for + bootstage we want to record the time since reset as accurately as + possible. + + The only exception is when U-Boot is used as a secondary bootloader, + where this option should be enabled. + config MTK_TIMER bool "MediaTek timer support" depends on TIMER diff --git a/drivers/timer/tsc_timer.c b/drivers/timer/tsc_timer.c index 0df551f94c..813817f467 100644 --- a/drivers/timer/tsc_timer.c +++ b/drivers/timer/tsc_timer.c @@ -397,7 +397,8 @@ static void tsc_timer_ensure_setup(bool early) { if (gd->arch.tsc_inited) return; - gd->arch.tsc_base = rdtsc(); + if (IS_ENABLED(CONFIG_X86_TSC_READ_BASE)) + gd->arch.tsc_base = rdtsc(); if (!gd->arch.clock_rate) { unsigned long fast_calibrate; diff --git a/lib/efi/Kconfig b/lib/efi/Kconfig index 919e314a0c..93b8564492 100644 --- a/lib/efi/Kconfig +++ b/lib/efi/Kconfig @@ -1,6 +1,7 @@ config EFI bool "Support running U-Boot from EFI" depends on X86 + imply X86_TSC_READ_BASE help U-Boot can be started from EFI on certain platforms. This allows EFI to perform most of the system init and then jump to U-Boot for -- 2.39.5