From 6d8cdfd15367b9ed0f8c9458a0f9a9962a767000 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sat, 17 Feb 2024 12:34:04 +0000 Subject: [PATCH] rockchip: spl: Enable caches to speed up checksum validation FIT checksum validation is very slow in SPL due to D-cache not being enabled. Enable caches in SPL on ARM64 SoCs to speed up FIT checksum validation, from seconds to milliseconds. This change enables caches in SPL on all Rockchip ARM64 boards, the Kconfig options SPL_SYS_ICACHE_OFF and SPL_SYS_DCACHE_OFF can be used to disable caches for a specific board or SoC if needed. Signed-off-by: Jonas Karlman Reviewed-by: Kever Yang --- arch/arm/mach-rockchip/spl.c | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/mach-rockchip/spl.c index 87280e2ba7..1586a093fc 100644 --- a/arch/arm/mach-rockchip/spl.c +++ b/arch/arm/mach-rockchip/spl.c @@ -3,7 +3,7 @@ * (C) Copyright 2019 Rockchip Electronics Co., Ltd */ -#include +#include #include #include #include @@ -136,6 +136,20 @@ void board_init_f(ulong dummy) } gd->ram_top = gd->ram_base + get_effective_memsize(); gd->ram_top = board_get_usable_ram_top(gd->ram_size); + + if (IS_ENABLED(CONFIG_ARM64) && !CONFIG_IS_ENABLED(SYS_DCACHE_OFF)) { + gd->relocaddr = gd->ram_top; + arch_reserve_mmu(); + enable_caches(); + } #endif preloader_console_init(); } + +void spl_board_prepare_for_boot(void) +{ + if (!IS_ENABLED(CONFIG_ARM64) || CONFIG_IS_ENABLED(SYS_DCACHE_OFF)) + return; + + cleanup_before_linux(); +} -- 2.39.5