From 6664a0e5f3694592966c92ec4a0547ad77b84a9a Mon Sep 17 00:00:00 2001 From: Baruch Siach Date: Sun, 3 Feb 2019 15:15:39 +0200 Subject: [PATCH] pcie: designware: mvebu: fix reset release polarity The dm_gpio_set_value() routine sets signal logical level, with GPIO_ACTIVE_LOW/HIGH value taken into account. Reset active value is 1 (asserted), while reset inactive value is 0 (de-asserted). Fix the reset toggle code to set the correct reset logic value. Reported-by: Sven Auhagen Signed-off-by: Baruch Siach Reviewed-by: Stefan Roese Signed-off-by: Stefan Roese --- drivers/pci/pcie_dw_mvebu.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/pci/pcie_dw_mvebu.c b/drivers/pci/pcie_dw_mvebu.c index 8081005c27..95fb41966f 100644 --- a/drivers/pci/pcie_dw_mvebu.c +++ b/drivers/pci/pcie_dw_mvebu.c @@ -489,7 +489,9 @@ static int pcie_dw_mvebu_probe(struct udevice *dev) * using this GPIO. */ if (dm_gpio_is_valid(&reset_gpio)) { - dm_gpio_set_value(&reset_gpio, 1); + dm_gpio_set_value(&reset_gpio, 1); /* assert */ + mdelay(200); + dm_gpio_set_value(&reset_gpio, 0); /* de-assert */ mdelay(200); } #else -- 2.39.5