From 646a1522478a30889354a378b2617b4c08d2c9fb Mon Sep 17 00:00:00 2001 From: =?utf8?q?Pali=20Roh=C3=A1r?= Date: Thu, 23 Sep 2021 11:07:18 +0200 Subject: [PATCH] arm: a37xx: pci: Increase PCIe IO size from 64 KiB to 1 MiB MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Commit 079b35a26111 ("arm: a37xx: pci: Increase PCIe MEM size from 16 MiB to 127 MiB") increased size of PCIe MEM to 127 MiB, which is the maximal possible size for allocated 128 MiB PCIe window. PCIe IO size in that commit was unchanged. Armada 3720 PCIe controller supports 32-bit IO space mapping so it is possible to assign more than 64 KiB if address space for IO. Currently controller has assigned 127 MiB + 64 KiB memory and therefore there is 960 KiB of unused memory. So assign it to IO space by increasing IO window from 64 KiB to 1 MiB. Signed-off-by: Pali Rohár Fixes: 079b35a26111 ("arm: a37xx: pci: Increase PCIe MEM size from 16 MiB to 127 MiB") Reviewed-by: Stefan Roese --- arch/arm/dts/armada-37xx.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/dts/armada-37xx.dtsi b/arch/arm/dts/armada-37xx.dtsi index 2615b8c748..fec34609cf 100644 --- a/arch/arm/dts/armada-37xx.dtsi +++ b/arch/arm/dts/armada-37xx.dtsi @@ -335,14 +335,14 @@ /* * The 128 MiB address range [0xe8000000-0xf0000000] is * dedicated for PCIe and can be assigned to 8 windows - * with size a power of two. Use one 64 KiB window for + * with size a power of two. Use one 1 MiB window for * IO at the end and the remaining seven windows * (totaling 127 MiB) for MEM. */ ranges = <0x82000000 0 0xe8000000 0 0xe8000000 0 0x7f00000 /* Port 0 MEM */ - 0x81000000 0 0xefff0000 - 0 0xefff0000 0 0x10000>; /* Port 0 IO*/ + 0x81000000 0 0xeff00000 + 0 0xeff00000 0 0x100000>; /* Port 0 IO*/ }; }; }; -- 2.39.5