From 52a86e69e2043fb488be67f5cfbbdeb30a02ddae Mon Sep 17 00:00:00 2001 From: Joao Paulo Goncalves Date: Mon, 13 Nov 2023 16:07:21 -0300 Subject: [PATCH] arm: k3: Enable instruction cache for main domain SPL Change spl_enable_dcache so it also enable icache on SPL initialization for the main domain part of the boot flow. This improves bootloader booting time. Link: https://lore.kernel.org/all/20231109140958.1093235-1-joao.goncalves@toradex.com/ Signed-off-by: Joao Paulo Goncalves Tested-by: Nishanth Menon --- arch/arm/mach-k3/am625_init.c | 2 +- arch/arm/mach-k3/am654_init.c | 2 +- arch/arm/mach-k3/common.c | 4 ++-- arch/arm/mach-k3/common.h | 2 +- arch/arm/mach-k3/j721e_init.c | 2 +- arch/arm/mach-k3/j721s2_init.c | 2 +- 6 files changed, 7 insertions(+), 7 deletions(-) diff --git a/arch/arm/mach-k3/am625_init.c b/arch/arm/mach-k3/am625_init.c index 8fa36f7b91..1d4ef35e7b 100644 --- a/arch/arm/mach-k3/am625_init.c +++ b/arch/arm/mach-k3/am625_init.c @@ -209,7 +209,7 @@ void board_init_f(ulong dummy) if (ret) panic("DRAM init failed: %d\n", ret); } - spl_enable_dcache(); + spl_enable_cache(); } u32 spl_mmc_boot_mode(struct mmc *mmc, const u32 boot_device) diff --git a/arch/arm/mach-k3/am654_init.c b/arch/arm/mach-k3/am654_init.c index 4235296774..7c2a143ed1 100644 --- a/arch/arm/mach-k3/am654_init.c +++ b/arch/arm/mach-k3/am654_init.c @@ -258,7 +258,7 @@ void board_init_f(ulong dummy) if (ret) panic("DRAM init failed: %d\n", ret); #endif - spl_enable_dcache(); + spl_enable_cache(); } u32 spl_mmc_boot_mode(struct mmc *mmc, const u32 boot_device) diff --git a/arch/arm/mach-k3/common.c b/arch/arm/mach-k3/common.c index 4c7b03fe6e..fd400e7e3d 100644 --- a/arch/arm/mach-k3/common.c +++ b/arch/arm/mach-k3/common.c @@ -521,7 +521,7 @@ void remove_fwl_configs(struct fwl_data *fwl_data, size_t fwl_data_size) } } -void spl_enable_dcache(void) +void spl_enable_cache(void) { #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) phys_addr_t ram_top = CFG_SYS_SDRAM_BASE; @@ -542,7 +542,7 @@ void spl_enable_dcache(void) gd->arch.tlb_addr + gd->arch.tlb_size); gd->relocaddr = gd->arch.tlb_addr; - dcache_enable(); + enable_caches(); #endif } diff --git a/arch/arm/mach-k3/common.h b/arch/arm/mach-k3/common.h index 04f3c0b85b..e9db9fbfb6 100644 --- a/arch/arm/mach-k3/common.h +++ b/arch/arm/mach-k3/common.h @@ -37,7 +37,7 @@ void disable_linefill_optimization(void); void remove_fwl_configs(struct fwl_data *fwl_data, size_t fwl_data_size); int load_firmware(char *name_fw, char *name_loadaddr, u32 *loadaddr); void k3_sysfw_print_ver(void); -void spl_enable_dcache(void); +void spl_enable_cache(void); void mmr_unlock(uintptr_t base, u32 partition); bool is_rom_loaded_sysfw(struct rom_extended_boot_data *data); enum k3_device_type get_device_type(void); diff --git a/arch/arm/mach-k3/j721e_init.c b/arch/arm/mach-k3/j721e_init.c index 8738f91ee3..c2976c4ea0 100644 --- a/arch/arm/mach-k3/j721e_init.c +++ b/arch/arm/mach-k3/j721e_init.c @@ -286,7 +286,7 @@ void board_init_f(ulong dummy) if (ret) panic("DRAM init failed: %d\n", ret); #endif - spl_enable_dcache(); + spl_enable_cache(); } u32 spl_mmc_boot_mode(struct mmc *mmc, const u32 boot_device) diff --git a/arch/arm/mach-k3/j721s2_init.c b/arch/arm/mach-k3/j721s2_init.c index 39499be271..fb0708bae1 100644 --- a/arch/arm/mach-k3/j721s2_init.c +++ b/arch/arm/mach-k3/j721s2_init.c @@ -231,7 +231,7 @@ void k3_mem_init(void) if (ret) panic("DRAM 1 init failed: %d\n", ret); } - spl_enable_dcache(); + spl_enable_cache(); } /* Support for the various EVM / SK families */ -- 2.39.5