From 41d7a7da80ec7461cf57828db2c7ad5b29bbba33 Mon Sep 17 00:00:00 2001 From: Dario Binacchi Date: Sat, 22 Apr 2023 16:11:17 +0200 Subject: [PATCH] imx6: clock: improve calculations to get the PLL video rate During some tests to check the pixel clock rate in the transition from U-Boot to the Linux kernel, I noticed that with the same configuration of the registers the debug messages reported different rates. The same Linux kernel calculations are now used to get the PLL video rate. Signed-off-by: Dario Binacchi Reviewed-by: Michael Trimarchi --- arch/arm/mach-imx/mx6/clock.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-imx/mx6/clock.c b/arch/arm/mach-imx/mx6/clock.c index cb9d629be4..17d8dcd5c8 100644 --- a/arch/arm/mach-imx/mx6/clock.c +++ b/arch/arm/mach-imx/mx6/clock.c @@ -213,6 +213,7 @@ int enable_spi_clk(unsigned char enable, unsigned spi_num) static u32 decode_pll(enum pll_clocks pll, u32 infreq) { u32 div, test_div, pll_num, pll_denom; + u64 temp64; switch (pll) { case PLL_SYS: @@ -272,7 +273,10 @@ static u32 decode_pll(enum pll_clocks pll, u32 infreq) } test_div = 1 << (2 - test_div); - return infreq * (div + pll_num / pll_denom) / test_div; + temp64 = (u64)infreq; + temp64 *= pll_num; + do_div(temp64, pll_denom); + return infreq * div + (unsigned long)temp64; default: return 0; } -- 2.39.5