From 40d7f3c8d111d4e4b6c1df105d5a4cedf5b7d6c1 Mon Sep 17 00:00:00 2001 From: Rasmus Villemoes Date: Fri, 13 Mar 2020 17:04:58 +0100 Subject: [PATCH] watchdog: honour hw_margin_ms DT property Some watchdog devices, e.g. external gpio-triggered ones, must be reset more often than once per second, which means that the current rate-limiting logic in watchdog_reset() fails to keep the board alive. gpio-wdt.txt in the linux source tree defines a "hw_margin_ms" property used to specifiy the maximum time allowed between resetting the device. Allow any watchdog device to specify such a property, and then use a reset period of one quarter of that. We keep the current default of resetting once every 1000ms. Signed-off-by: Rasmus Villemoes Reviewed-by: Stefan Roese --- drivers/watchdog/wdt-uclass.c | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/drivers/watchdog/wdt-uclass.c b/drivers/watchdog/wdt-uclass.c index c96a596f08..4cdb7bd64c 100644 --- a/drivers/watchdog/wdt-uclass.c +++ b/drivers/watchdog/wdt-uclass.c @@ -16,6 +16,12 @@ DECLARE_GLOBAL_DATA_PTR; #define WATCHDOG_TIMEOUT_SECS (CONFIG_WATCHDOG_TIMEOUT_MSECS / 1000) +/* + * Reset every 1000ms, or however often is required as indicated by a + * hw_margin_ms property. + */ +static ulong reset_period = 1000; + int initr_watchdog(void) { u32 timeout = WATCHDOG_TIMEOUT_SECS; @@ -37,6 +43,9 @@ int initr_watchdog(void) if (CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)) { timeout = dev_read_u32_default(gd->watchdog_dev, "timeout-sec", WATCHDOG_TIMEOUT_SECS); + reset_period = dev_read_u32_default(gd->watchdog_dev, + "hw_margin_ms", + 4 * reset_period) / 4; } wdt_start(gd->watchdog_dev, timeout * 1000, 0); @@ -118,7 +127,7 @@ void watchdog_reset(void) /* Do not reset the watchdog too often */ now = get_timer(0); if (time_after(now, next_reset)) { - next_reset = now + 1000; /* reset every 1000ms */ + next_reset = now + reset_period; wdt_reset(gd->watchdog_dev); } } -- 2.39.5