From 2a9cf320afb051f40a4bbb98aa9a6b1a94332d27 Mon Sep 17 00:00:00 2001 From: Michael Walle Date: Mon, 30 May 2022 23:02:05 +0200 Subject: [PATCH] armv8: layerscape: add missing RCW source defines A board might need to get the source of the RCW word, which is also the boot source in most cases. These defines are taken from the LS1028A and I expect they are the same across the SoCs with the same chassis, after all, there was already a reset source for NOR flash. Signed-off-by: Michael Walle --- arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h index 863618a5f3..304cd7980a 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h @@ -230,6 +230,10 @@ #define DCFG_BASE 0x01e00000 #define DCFG_PORSR1 0x000 #define DCFG_PORSR1_RCW_SRC 0xff800000 +#define DCFG_PORSR1_RCW_SRC_SDHC1 0x04000000 +#define DCFG_PORSR1_RCW_SRC_SDHC2 0x04800000 +#define DCFG_PORSR1_RCW_SRC_I2C 0x05000000 +#define DCFG_PORSR1_RCW_SRC_FSPI_NOR 0x07800000 #define DCFG_PORSR1_RCW_SRC_NOR 0x12f00000 #define DCFG_RCWSR12 0x12c #define DCFG_RCWSR12_SDHC_SHIFT 24 -- 2.39.5