From 01c35f269f21398fa9d1db1b90b73f7e95a3bf22 Mon Sep 17 00:00:00 2001 From: Claudiu Beznea Date: Thu, 1 Oct 2020 13:27:25 +0300 Subject: [PATCH] cpu: at91: add driver for CPU Add basic CPU driver use to retrieve information about CPU itself. Signed-off-by: Claudiu Beznea --- MAINTAINERS | 1 + drivers/cpu/Makefile | 1 + drivers/cpu/at91_cpu.c | 123 +++++++++++++++++++++++++++++++++++++++++ 3 files changed, 125 insertions(+) create mode 100644 drivers/cpu/at91_cpu.c diff --git a/MAINTAINERS b/MAINTAINERS index 85e51855c4..91b06b49bd 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -291,6 +291,7 @@ S: Maintained T: git https://gitlab.denx.de/u-boot/custodians/u-boot-atmel.git F: arch/arm/mach-at91/ F: board/atmel/ +F: drivers/cpu/at91_cpu.c F: drivers/misc/microchip_flexcom.c F: drivers/timer/mchp-pit64b-timer.c diff --git a/drivers/cpu/Makefile b/drivers/cpu/Makefile index 0b5dbc7c88..c8532637ca 100644 --- a/drivers/cpu/Makefile +++ b/drivers/cpu/Makefile @@ -8,6 +8,7 @@ obj-$(CONFIG_CPU) += cpu-uclass.o obj-$(CONFIG_ARCH_BMIPS) += bmips_cpu.o obj-$(CONFIG_ARCH_IMX8) += imx8_cpu.o +obj-$(CONFIG_ARCH_AT91) += at91_cpu.o obj-$(CONFIG_CPU_MPC83XX) += mpc83xx_cpu.o obj-$(CONFIG_CPU_RISCV) += riscv_cpu.o obj-$(CONFIG_SANDBOX) += cpu_sandbox.o diff --git a/drivers/cpu/at91_cpu.c b/drivers/cpu/at91_cpu.c new file mode 100644 index 0000000000..058ae3a811 --- /dev/null +++ b/drivers/cpu/at91_cpu.c @@ -0,0 +1,123 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2020 Microchip Technology Inc. and its subsidiaries + * + * Author: Claudiu Beznea + */ + +#include +#include +#include +#include +#include + +struct at91_cpu_platdata { + const char *name; + ulong cpufreq_mhz; + ulong mckfreq_mhz; + ulong xtalfreq_mhz; +}; + +extern char *get_cpu_name(void); + +const char *at91_cpu_get_name(void) +{ + return get_cpu_name(); +} + +int at91_cpu_get_desc(const struct udevice *dev, char *buf, int size) +{ + struct at91_cpu_platdata *plat = dev_get_platdata(dev); + + snprintf(buf, size, "%s\n" + "Crystal frequency: %8lu MHz\n" + "CPU clock : %8lu MHz\n" + "Master clock : %8lu MHz\n", + plat->name, plat->xtalfreq_mhz, plat->cpufreq_mhz, + plat->mckfreq_mhz); + + return 0; +} + +static int at91_cpu_get_info(const struct udevice *dev, struct cpu_info *info) +{ + struct at91_cpu_platdata *plat = dev_get_platdata(dev); + + info->cpu_freq = plat->cpufreq_mhz * 1000000; + info->features = BIT(CPU_FEAT_L1_CACHE); + + return 0; +} + +static int at91_cpu_get_count(const struct udevice *dev) +{ + return 1; +} + +static int at91_cpu_get_vendor(const struct udevice *dev, char *buf, int size) +{ + snprintf(buf, size, "Microchip Technology Inc."); + + return 0; +} + +static const struct cpu_ops at91_cpu_ops = { + .get_desc = at91_cpu_get_desc, + .get_info = at91_cpu_get_info, + .get_count = at91_cpu_get_count, + .get_vendor = at91_cpu_get_vendor, +}; + +static const struct udevice_id at91_cpu_ids[] = { + { .compatible = "arm,cortex-a7" }, + { /* Sentinel. */ } +}; + +static int at91_cpu_probe(struct udevice *dev) +{ + struct at91_cpu_platdata *plat = dev_get_platdata(dev); + struct clk clk; + ulong rate; + int ret; + + ret = clk_get_by_index(dev, 0, &clk); + if (ret) + return ret; + + rate = clk_get_rate(&clk); + if (!rate) + return -ENOTSUPP; + plat->cpufreq_mhz = DIV_ROUND_CLOSEST_ULL(rate, 1000000); + + ret = clk_get_by_index(dev, 1, &clk); + if (ret) + return ret; + + rate = clk_get_rate(&clk); + if (!rate) + return -ENOTSUPP; + plat->mckfreq_mhz = DIV_ROUND_CLOSEST_ULL(rate, 1000000); + + ret = clk_get_by_index(dev, 2, &clk); + if (ret) + return ret; + + rate = clk_get_rate(&clk); + if (!rate) + return -ENOTSUPP; + plat->xtalfreq_mhz = DIV_ROUND_CLOSEST_ULL(rate, 1000000); + + plat->name = get_cpu_name(); + + return 0; +} + +U_BOOT_DRIVER(cpu_at91_drv) = { + .name = "at91-cpu", + .id = UCLASS_CPU, + .of_match = at91_cpu_ids, + .ops = &at91_cpu_ops, + .probe = at91_cpu_probe, + .platdata_auto_alloc_size = sizeof(struct at91_cpu_platdata), + .flags = DM_FLAG_PRE_RELOC, +}; -- 2.39.5