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imx: spl: Update NAND bootmode detection bit
authorJagan Teki <jagan@openedev.com>
Fri, 24 Feb 2017 10:15:13 +0000 (15:45 +0530)
committerStefano Babic <sbabic@denx.de>
Fri, 17 Mar 2017 08:27:08 +0000 (09:27 +0100)
commit20f147141698b9f302c3382fcc45a1ef1a341cec
tree5c24fcd2e6ddedbbcd18feb41e6828ca2c4c6de7tree | snapshot
parentcba586b40093990d89892e7704f5e6b71f437520commit | diff
imx: spl: Update NAND bootmode detection bit

BOOT_CFG1[7:4] the NAND boot mode selection is done
only when BOOT_CFG1[7] is 1 hence update the NAND
boot mode detection bit case. This information available
on Table 8-11. NAND Boot eFUSE Descriptions, from IMX6DQRM.

Cc: Tim Harvey <tharvey@gateworks.com>
Reviewed by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Jagan Teki <jagan@openedev.com>
arch/arm/imx-common/spl.c diff | blob | history
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