include: configs: am**x/j721e/j721s2_evm.h: Move the stack pointer init address in arm64
Currently, in case of arm64 bootloader and U-Boot the stack pointer is
initialized at an offset of NON_SECURE_MSRAM_SIZE from arm64 SPL's text
base address. After jumping to arm64, execution is done out of DDR.
Therefore, having an offset corresponding to the size of MSRAM does not
have any significance.
Instead, initialize the stack pointer after an offset of 4MB from the SPL
text base address. This helps in allocating larger memory for stack.
Sam Shih [Thu, 21 Apr 2022 06:23:53 +0000 (14:23 +0800)]
pinctrl: mediatek: add support for different types of IO pins
There are many pins in an SoC, and register usage may vary by pins.
This patch introduces a concept of "io type" and "io type group"
to mediatek pinctrl drivers. This can provide different pinconf
handlers implementation (eg: "bias-pull-up/down", "driving" and
"input-enable") for IO pins that belong to different types.
Sam Shih [Thu, 21 Apr 2022 06:23:52 +0000 (14:23 +0800)]
pinctrl: mediatek: introduce multiple memory bases support
Pinctrl design of some mediatek SoC need to access registers that
distribute in multiple memory base address. this patch introduce new
mechanism in mediatek pinctrl driver to support the chips which have
the new design.
This patch add a member 'base_calc' in pinctrl private data, and changed
original 'base' private data to an array of *iomem.
When 'base_calc' attribute is set, it will requests multiplue regs base
from the DT, if 'base_calc' attribute is not set, it only use legacy way
to request single reg resource from the DT.
Sam Shih [Thu, 21 Apr 2022 06:23:51 +0000 (14:23 +0800)]
pinctrl: mediatek: rewrite mtk_pinconf_set and related functions
There are many pins in a SoCs, and different pin may belong
to different "io_type", For example: some pins of MT7622 belongs
to "io_type A", the other belongs to "io_type B", and pinctrl "V0"
means handle pinconf via "io_type A" or "io_type B", so SoCs that
contain "io_type A" and "io_type B" pins, use "V0" in pinctrl driver.
This patch separates the implementation of register operations
(e.g: "bias-pull-up/down", "driving" and "input-enable") into
different functions, and lets the original V0/V1
ops to call the new functions.
Simon Glass [Wed, 27 Apr 2022 19:47:57 +0000 (13:47 -0600)]
sandbox: Avoid binman error when run without device tree
With sandbox, U-Boot can be run without a device tree (i.e. no -d or -T
parameter). In this case an empty device tree is created for convenience.
With a recent change this causes an error due to the missing '/binman'
node.
Add this node to avoid the problem, as well as a test that U-Boot can
be run without a device tree.
Fixes: 059df5624b ("arch: Kconfig: imply BINMAN for SANDBOX") Fixes: https://source.denx.de/u-boot/u-boot/-/issues/11 Signed-off-by: Simon Glass <sjg@chromium.org>
Sean Anderson [Thu, 28 Apr 2022 16:39:49 +0000 (12:39 -0400)]
ls10xxx: Use a sane SPL_SYS_MALLOC_F_LEN default
SPL_SYS_MALLOC_F_LEN defaults to SYS_MALLOC_F_LEN. 0x10000 is 64 KiB, or
around half of the total OCRAM size. Revert to the default of 0x2000. This
fixes SPL boot.
Fixes: 545eceb520 ("imx8/ls10xx: Use a sane SYS_MALLOC_F_LEN default") Signed-off-by: Sean Anderson <sean.anderson@seco.com> Reviewed-by: Fabio Estevam <festevam@denx.de>
Marek Behún [Wed, 27 Apr 2022 10:42:02 +0000 (12:42 +0200)]
net: mvneta: Drop unneeded macro
Macro MVNETA_GMAC_FORCE_LINK_UP can be dropped from value assignment in
fixed link case, since it's value is written into the register later in
the function for link-down-to-link-up case. The value is written as
MVNETA_GMAC_FORCE_LINK_DOWN | MVNETA_GMAC_FORCE_LINK_PASS, and so the
macro definition can also be dropped.
Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Ramon Fried <rfried.dev@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
Marek Behún [Wed, 27 Apr 2022 10:41:48 +0000 (12:41 +0200)]
arm: mvebu: Espressobin: Use DM registered MDIO to configure switch
In order to be able to get rid of the non-DM MDIO bus registered in
mvneta driver, we need to stop using board_network_enable() and instead
use the DM registered MDIO device to configure switch in
last_stage_init().
Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de>
Stefan Roese [Thu, 7 Apr 2022 07:11:54 +0000 (09:11 +0200)]
mips: octeon: nic23: Enable ethernet support
This patch enables the Kconfig symbols needed for full ethernet support
on the NIC23. Additionally board specific setup is done, mostly GPIOs
related to SFP / GPIO configuration. With this, ethernet can be used on
this board. Here an example of a tftp load:
=> tftp ffffffff81000000 big
Using ethernet-mac-nexus@11800e2000000 device
TFTP from server 192.168.1.5; our IP address is 192.168.1.247
Filename 'big'.
Load address: 0xffffffff81000000
Loading: ################################################## 10 MiB
9.7 MiB/s
done
Bytes transferred = 10485760 (a00000 hex)
This patch enables the Kconfig symbols needed for full ethernet support
on the EBB7304. Also the PHY autonegotiation timeout is increased, as
the default 5 seconds are sometime a bit short. With this, ethernet can
be used on this board. Here an example of a tftp load:
=> tftp ffffffff81000000 big
ethernet-mac-nexus@11800e0000000 Waiting for PHY auto negotiation to complete....... done
Using ethernet-mac-nexus@11800e0000000 device
TFTP from server 192.168.1.5; our IP address is 192.168.1.243
Filename 'big'.
Load address: 0xffffffff81000000
Loading: ################################################## 10 MiB
13.2 MiB/s
done
Bytes transferred = 10485760 (a00000 hex)
Stefan Roese [Thu, 7 Apr 2022 07:11:52 +0000 (09:11 +0200)]
net: Add ethernet support for MIPS Octeon
This patchs adds the ethernet & MDIO driver for the MIPS Octeon II / III
SoC platform. Please note that these drivers are based on the 2013
U-Boot version from Marvell and make use of the platform supported
helper functions for the ethernet functionality, including stuff like
SFP handling.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Ramon Fried <rfried.dev@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
Stefan Roese [Thu, 7 Apr 2022 07:11:48 +0000 (09:11 +0200)]
mips: octeon: octeon_common.h: Move init SP because of increased image size
This patch moves CONFIG_SYS_INIT_SP_OFFSET to a higher address so that
it does not interfere with larger U-Boot images. This was noticed, while
adding network support to the EBB7304 board.
Stefan Roese [Thu, 7 Apr 2022 07:11:46 +0000 (09:11 +0200)]
mips: octeon: cpu.c: Move bootmem init to arch_early_init_r()
Call octeon_bootmem_init() earlier in the boot process, so that this
bootmemory infrastructure is already initialized when e.g. the
networking support gets probed.
Stefan Roese [Thu, 7 Apr 2022 07:11:45 +0000 (09:11 +0200)]
mips: octeon: Makefile: Enable building of the newly added C files
This patch adds the newly added C files to the Makefile to enable
compilation. This is done in a separate step, to not introduce build
breakage while adding the single files with potentially missing
externals.
Aaron Williams [Thu, 7 Apr 2022 07:11:41 +0000 (09:11 +0200)]
mips: octeon: Add cvmx-pko-internal-ports-range.c
Import cvmx-pko-internal-ports-range.c from 2013 U-Boot. It will be used
by the later added drivers to support networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Thu, 6 May 2021 07:17:53 +0000 (09:17 +0200)]
mips: octeon: Add cvmx-global-resource.c
Import cvmx-global-resource.c from 2013 U-Boot. It will be used by the later
added drivers to support networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Thu, 7 Apr 2022 07:11:09 +0000 (09:11 +0200)]
mips: octeon: Add cvmx-xcv-defs.h header file
Import cvmx-xcv-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support networking on the MIPS Octeon II /
III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Thu, 7 Apr 2022 07:11:08 +0000 (09:11 +0200)]
mips: octeon: Add cvmx-pcsxx-defs.h header file
Import cvmx-pcsxxx-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support networking on the MIPS Octeon II /
III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Thu, 7 Apr 2022 07:11:07 +0000 (09:11 +0200)]
mips: octeon: Add cvmx-npei-defs.h header file
Import cvmx-npei-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support networking on the MIPS Octeon II /
III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Thu, 7 Apr 2022 07:11:06 +0000 (09:11 +0200)]
mips: octeon: Add cvmx-lbk-defs.h header file
Import cvmx-lbk-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support networking on the MIPS Octeon II /
III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Thu, 7 Apr 2022 07:11:05 +0000 (09:11 +0200)]
mips: octeon: Add cvmx-iob-defs.h header file
Import cvmx-iob-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support networking on the MIPS Octeon II /
III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Thu, 7 Apr 2022 07:11:04 +0000 (09:11 +0200)]
mips: octeon: Add cvmx-ilk-defs.h header file
Import cvmx-igl-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support networking on the MIPS Octeon II /
III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Thu, 7 Apr 2022 07:11:03 +0000 (09:11 +0200)]
mips: octeon: Add misc cvmx-* header files
Import misc cvmx-helper header files from 2013 U-Boot. They will be used
by the later added drivers to support networking on the MIPS Octeon II /
III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
To quote the author:
The virtio PCI drivers forgo a number of consistency checks,
particularly around pointer validation and bounds checking. This series
focuses on the modern driver to add those checks.
The start of the series adds and fixes some basic bounds checks. Later
patches ensure PCI addresses fall within the expected regions rather
than any arbitrary address. This is acheived by introducing range
parameters to a few of the dm_pci_* functions that allow the ranges to
be checked.
The series also adds a few new configs to allow parts of virtio and PCI
to be disabled where the features may be unused and the current
implementations don't have the needed consistencty checks.
Andrew Scull [Thu, 21 Apr 2022 16:11:15 +0000 (16:11 +0000)]
virtio: pci: Make use of dm_pci_map_bar()
The virtio PCI capabilities describe regions of memory that should be
mapped. Map those with dm_pci_map_bar() which will ensure they are valid
PCI regions.
Signed-off-by: Andrew Scull <ascull@google.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Andrew Scull [Thu, 21 Apr 2022 16:11:14 +0000 (16:11 +0000)]
virtio: pci: Check virtio configs are mapped
Prepare for calls to `virtio_pci_map_capability()` failing by returning
NULL on error. If this happens, later accesses to the pointers would be
unsafe so cause the probe to fail if such an error occurs.
Signed-off-by: Andrew Scull <ascull@google.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Andrew Scull [Thu, 21 Apr 2022 16:11:12 +0000 (16:11 +0000)]
pci: Update dm_pci_bus_to_virt() parameters
Add mask parameter and reorder length parameter to match the other PCI
address conversion functions. Using PCI_REGION_TYPE as the mask gives
the old behaviour.
It's converted from a macro to an inline function as the length
parameter is now used twice, but should only be calculated once.
Signed-off-by: Andrew Scull <ascull@google.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Andrew Scull [Thu, 21 Apr 2022 16:11:11 +0000 (16:11 +0000)]
pci: Match region flags using a mask
When converting addresses, apply a mask to the region flags during
lookup. This allows the caller to specify which flags are important and
which are not, for example to exclude system memory regions.
The behaviour of the function is changed such that they don't
preferentially search for a non-system memory region. However, system
memory regions are added after other regions in decode_regions() leading
to a similar outcome.
Signed-off-by: Andrew Scull <ascull@google.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
projects / u-boot.git / log
