Alexander Graf [Thu, 19 Oct 2017 21:23:50 +0000 (23:23 +0200)]
efi_loader: Disable env_save() call on boot
With the introduction of EFI variable support, we also wanted to persist
these EFI variables. However, the way it was implemented we ended up
persisting all U-Boot environment variables on every EFI boot.
That could potentially lead to unexpected side effects because variables
that were not supposed to be written to persisted env get written. It also
means we may end up writing the environment more often than we should.
For this release, let's just disable EFI variable persistence and instead
implement it properly for the next one.
Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Fixes: ad644e7c182 ("efi_loader: efi variable support") Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Rob Clark <robdclark@gmail.com> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
armv8: sec_firmware: Add support for loadables in FIT
Enable support for loadables in SEC firmware FIT image. Currently
support is added for single loadable image.
Brief description of implementation:
Add two more address pointers (loadable_h, loadable_l) as arguments to
sec_firmware_init() api.
Create new api: sec_firmware_checks_copy_loadable() to check if loadables
node is present in SEC firmware FIT image. If present, verify loadable
image and copies it to secure DDR memory.
Populate address pointers with secure DDR memory addresses where loadable
is copied.
Example use-case could be trusted OS (tee.bin) as loadables node in SEC
firmware FIT image.
Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
armv8: layerscape: Allocate 66 MB DDR for secure memory
Change DDR allocated for secure memory from 2 MB to 66 MB. This
additional 64 MB secure memory is required for trusted OS running
in Trusted Execution Environment using ARMv8 TrustZone.
Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
Ran Wang [Mon, 23 Oct 2017 02:09:25 +0000 (10:09 +0800)]
armv8: ls1088aqds: Enable USB command on QDS for qspi-boot
Signed-off-by: Amrita Kumari <amrita.kumari@nxp.com> Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Ran Wang <ran.wang_1@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: York Sun <york.sun@nxp.com>
Ran Wang [Mon, 23 Oct 2017 02:09:24 +0000 (10:09 +0800)]
armv8: ls1088ardb: Enable USB command RDB qspi-boot
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Amrita Kumari <amrita.kumari@nxp.com> Signed-off-by: Ran Wang <ran.wang_1@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: York Sun <york.sun@nxp.com>
Masahiro Yamada [Thu, 26 Oct 2017 12:24:17 +0000 (21:24 +0900)]
i2c: fti2c010: remove unused/unmaintained driver
CONFIG_SYS_I2C_FTI2C010 is not enabled by anyone.
Commit 2852709676c8 ("dm: i2c: Add a note to I2C drivers which need
conversion") prompted to convert this driver to DM before June 2017,
but not converted yet.
Bin Meng [Thu, 19 Oct 2017 01:20:59 +0000 (18:20 -0700)]
x86: fsp: graphics: Add some notes about the graphics info hob
On some platforms (eg: Braswell), the FSP will not produce the
graphics info HOB unless you plug some cables to the display
interface (eg: HDMI) on the board. Add such notes in the FSP
video driver.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Thu, 19 Oct 2017 01:20:57 +0000 (18:20 -0700)]
spi: ich: Lock down controller settings if required
Some Intel FSP (like Braswell) does SPI lock-down during the call
to fsp_notify(INIT_PHASE_BOOT). But before SPI lock-down is done,
it's bootloader's responsibility to configure the SPI controller's
opcode registers properly otherwise SPI controller driver doesn't
know how to communicate with the SPI flash device.
Rather than passively doing the opcode configuration, let's add a
simple DTS property "intel,spi-lock-down" and let the driver call
the opcode configuration function if required by such FSP.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
It's not appropriate to call the Intel SPI driver specific stuff in
the FSP codes. We may add a simple DTS property "intel,spi-lock-down"
and let the Intel SPI driver call these stuff instead.
Bin Meng [Thu, 19 Oct 2017 01:20:53 +0000 (18:20 -0700)]
x86: braswell: Fix unexpected crash during Linux kernel boot
It was observed that when booting Linux kernel on Intel Cherry Hill
board, unexpected crash happens quite randomly. Sometimes kernel
just oops, while sometimes kernel throws MCE errors and hangs:
This looks like a hardware error per mcelog. After debugging, it
seems turning off turbo mode on the processor does not expose this
behavior, although U-Boot runs OK with turbo mode on. Suspect it is
related to an errata of Braswell processor.
To fix this, remove the Braswell cpu driver which does the turbo
mode configuration, and switch to use the generic cpu-x86 driver.
Also there is a configuration option in the FSP that turns on the
turbo mode and that has been turned off too.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Thu, 19 Oct 2017 01:20:52 +0000 (18:20 -0700)]
x86: galileo: Fix boot failure
With latest codes on mainstream master, Intel Galileo board does not
boot unfortunately. Git biset leads to b383d6c0 "bootstage: Convert
to use malloc()".
Disable bootstage support to make it boot again. The root cause needs
to be investigated however.
Fixes: b383d6c0 ("bootstage: Convert to use malloc()") Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Icenowy Zheng [Thu, 26 Oct 2017 03:14:46 +0000 (11:14 +0800)]
video: add an option for video simplefb via DT
Add an option to indicate that the video driver should setup a SimpleFB
node that passes the video framebuffer initialized by U-Boot to the
operating system kernel.
Currently only the Allwinner DE driver uses this option, and the
definition of this option in the sunxi-common.h config header is
converted to an imply of this option from CONFIG_VIDEO_SUNXI.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Icenowy Zheng [Thu, 26 Oct 2017 03:14:44 +0000 (11:14 +0800)]
sunxi: change the DE1 video option to CONFIG_VIDEO_SUNXI
The sunxi DE1 video option used to be CONFIG_VIDEO, which has the same
name as the "Enable legacy video support" option in
drivers/video/Kconfig.
Change the option name to CONFIG_VIDEO_SUNXI, which is really used by
Makefile under drivers/video/sunxi/, and defined in sunxi-common.h
when CONFIG_VIDEO is selected before this change. Now CONFIG_VIDEO_SUNXI
selects CONFIG_VIDEO and the usages of CONFIG_VIDEO in sunxi Kconfig and
config headers are all converted to use CONFIG_VIDEO_SUNXI.
Maxime Ripard [Thu, 19 Oct 2017 09:36:35 +0000 (11:36 +0200)]
sunxi: binman: Add U-Boot binary size check
The U-Boot binary may trip over its actual allocated size in the storage.
In such a case, the environment will not be readable anymore (because
corrupted when the new image was flashed), and any attempt at using saveenv
to reconstruct the environment will result in a corrupted U-Boot binary.
Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Benjamin Young [Fri, 13 Oct 2017 21:29:20 +0000 (14:29 -0700)]
cmd: fastboot: Enable FASTBOOT_FLASH_NAND for SUNXI_NAND devices
Encountered an issue where fastboot can't write to NAND on a CHIP_pro,
the symbol was neither present in the board's config header, nor the
Kconfig, this patch puts it in the Kconfig and defaults on when
SUNXI_NAND is selected.
Signed-off-by: Ben Young <computermouth@crunchbangplusplus.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
As explained in arch/arm/mach-sunxi/clock_sun8i_a83t.c, clk for CPU
clusters is computed as clk = 24*n. However, the current formula is clk
= 24*(n-1).
This results in a clock set to a frequency that isn't specified as
possible for CPUs.
Let's use the correct formula.
Fixes: f542948b1e8c ("sunxi: clk: add basic clocks for A83T") Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
Andre Przywara [Wed, 4 Oct 2017 23:27:21 +0000 (00:27 +0100)]
SPL: SPI: select SPL_SPI_FLASH_SUPPORT on SPL_SPI_SUNXI
The Allwinner SPI flash SPL boot support is guarded by the SPL_SPI_SUNXI
symbol. But despite its generic name, the actual only use case for this
is to provide SPI flash support to the SPL, which requires
CONFIG_SPL_SPI_FLASH_SUPPORT to be defined.
Select this symbol from the SPL_SPI_SUNXI Kconfig definition. This
avoids doing this explicitly in the defconfig, and fixes SPI booting on
the Pine64 SoPine (and -LTS version) and the OrangePi Win board (both with
SPI flash).
Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Patrick Delaunay [Wed, 18 Oct 2017 13:11:08 +0000 (15:11 +0200)]
cmd: gpt: solve issue for swap and rename command
don't use prettyprint_part_size() in create_gpt_partitions_list()
that avoid to align offset and size to 1 MiB and increase precision for
start and size.
This patch avoid the risk to change partition size and lost data during
rename or swap.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Acked-by: Stephen Warren <swarren@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com>
Patrick Delaunay [Wed, 18 Oct 2017 13:11:07 +0000 (15:11 +0200)]
test/py: gpt: test start LBA for sub-command rename and swap
Add test of first and last LBA in gpt for rename and swap.
Only the name is expected to change, so test 3 columns
for part command
1: first LBA (start)
2: last LBA (end)
3: partition name
After rename, the last LBA change and it is a error in current U-Boot code
+ "first" = 0x7ff : invalid value (<start)
+ "second" = 0x17ff => size increasing !
Acked-by: Stephen Warren <swarren@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Wed, 18 Oct 2017 13:11:05 +0000 (15:11 +0200)]
disk: efi: correct the overlap check on GPT header and PTE
the partition starting at 0x4400 is refused with overlap error:
$> gpt write mmc 0 "name=test,start=0x4400,size=0"
Writing GPT: Partition overlap
error!
even if the 0x4400 is the first available offset for LBA35 with default
value:
- MBR=LBA1
- GPT header=LBA2
- PTE= 32 LBAs (128 entry), 3 to 34
And the command to have one partition for all the disk failed also :
$> gpt write mmc 0 "name=test,size=0"
After the patch :
$> gpt write mmc 0 "name=test,size=0"
Writing GPT: success!
$> part list mmc 0
Partition Map for MMC device 0 -- Partition Type: EFI
Part Start LBA End LBA Name
Attributes
Type GUID
Partition GUID
1 0x00000022 0x01ce9fde "test"
attrs: 0x0000000000000000
type: ebd0a0a2-b9e5-4433-87c0-68b6b72699c7
type: data
guid: b4b84b8a-04e3-4000-0036-aff5c9c495b1
And 0x22 = 34 LBA => offset = 0x4400 is accepted as expected
Reviewed-by: Łukasz Majewski <lukma@denx.de> Tested-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Wed, 18 Oct 2017 13:11:04 +0000 (15:11 +0200)]
test/py: gpt: add test for sub-command read and verify
add sandbox test for some gpt sub-command
- gpt read / part list : read the gpt partition created by sgdisk on host
test start, size, LBA and name output
- gpt verify : verify the gpt partition create by sgdisk on host
PS: persistent data test_gpt_disk_image.bin are udpated
Acked-by: Stephen Warren <swarren@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
York Sun [Tue, 17 Oct 2017 15:00:21 +0000 (08:00 -0700)]
powerpc: mpc85xx: Implement CPU erratum A-007907 for secondary cores
Commit 06ad970b53a3 ("powerpc: mpc85xx: Implemente workaround for CPU
erratum A-007907") clears L1CSR2 for the boot core, but other cores
don't run through the workaround. Add similar code for secondary
cores to clear DCSTASHID field in L1CSR2 register.
Masahiro Yamada [Tue, 17 Oct 2017 12:19:40 +0000 (21:19 +0900)]
ARM: uniphier: enable DWC3 xHCI driver really
I thought commit d37d31849c6a ("ARM: uniphier: enable DWC3 xHCI
driver") enabled CONFIG_USB_DWC3_UNIPHIER, but CONFIG_USB_XHCI_DWC3
was missing in uniphier_v7_defconfig. Re-add.
Adam Ford [Tue, 5 Sep 2017 20:20:44 +0000 (15:20 -0500)]
net: Add SMC911X driver to Kconfig, convert
We add the various SMC91XX symbols to drivers/net/Kconfig and then this
converts the following to Kconfig:
CONFIG_SMC911X
CONFIG_SMC911X_BASE
CONFIG_SMC911X_16_BIT
CONFIG_SMC911X_32_BIT
Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Apply to the rest of the tree, re-squash old and new patch] Signed-off-by: Tom Rini <trini@konsulko.com>
Adam Ford [Mon, 16 Oct 2017 19:08:26 +0000 (14:08 -0500)]
Convert CONFIG_NAND_OMAP_GPMC et al and CONFIG_NAND_MXC to Kconfig
This converts the following to Kconfig:
CONFIG_NAND_MXC
CONFIG_NAND_OMAP_GPMC
CONFIG_NAND_OMAP_GPMC_PREFETCH
CONFIG_NAND_OMAP_ELM
CONFIG_SPL_NAND_AM33XX_BCH
CONFIG_SPL_NAND_SIMPLE
CONFIG_SYS_NAND_BUSWIDTH_16BIT
Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Heiko Schocher <hs@denx.de>
[trini: Finish migration of CONFIG_SPL_NAND_SIMPLE, fix some build issues,
add CONFIG_NAND_MXC so we can do CONFIG_SYS_NAND_BUSWIDTH_16BIT] Signed-off-by: Tom Rini <trini@konsulko.com>
Stefan Roese [Tue, 17 Oct 2017 06:09:14 +0000 (08:09 +0200)]
x86: conga-qeval20-qa3-e3845-internal-uart_defconfig: Add ACPI resume support
I've missed to add the ACPI resume support to this x86 build target.
This patch adds the ACPI resume support enabling S3 suspend /
resume.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Up to now we depended on an exported variable to build u-boot.rom.
We should be able to specify it in the configuration file, too.
With this patch this becomes possible using the new Kconfig option
CONFIG_BUILD_ROM.
This option depends on CONFIG_X86 and is selected in
qemu-x86_defconfig and qemu-x86_64_defconfig.
Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Bin Meng [Fri, 13 Oct 2017 08:30:06 +0000 (01:30 -0700)]
x86: baytrail: fsp: Move Azalia update codes to board
Azalia configuration may be different across boards, hence it's not
appropriate to do that in the SoC level. Instead, let's make the
SoC update_fsp_azalia_configs() routine as a weak version, and do
the actual work in the board codes.
So far it seems only som-db5800-som-6867 board enables the Azalia.
Move the original codes into som-db5800-som-6867.c.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
Bin Meng [Fri, 13 Oct 2017 08:30:04 +0000 (01:30 -0700)]
x86: fsp: Consolidate Azalia header file
So far there are two copies of Azalia struct defines with one in
baytrail and the other one in braswell. This consolidates these
two into one, put it in the common place, and remove the prefix
pch_ to these structs to make their names more generic.
This also corrects reset_wait_timer from us to ms.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
Bin Meng [Thu, 12 Oct 2017 12:07:57 +0000 (05:07 -0700)]
x86: baytrail: Fix unstable ACPI S3 resume
It was observed that when booting a Ubuntu 16.04 kernel, doing ACPI
S3 suspend/resume sometimes causes the Ubuntu kernel hang forever.
The issue is however not reproduced with a kernel built from i386/
x86_64 defconfig configuration.
The unstability is actually caused by unexpected interrupts being
generated during the S3 resume. For some unknown reason, FSP (gold4)
for BayTrail configures the GPIO DFX5 PAD to enable level interrupt
(bit 24 and 25). As this pin keeps generating interrupts during an
S3 resume, and there is no IRQ requester in the kernel to handle it,
the kernel seems to hang and does not continue resuming.
Clear the mysterious interrupt bits for this pin.
Reported-by: Stefan Roese <sr@denx.de> Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Stefan Roese <sr@denx.de> Reviewed-by: Stefan Roese <sr@denx.de>
projects / u-boot.git / log
