Tom Rini [Fri, 18 Nov 2011 12:48:06 +0000 (12:48 +0000)]
OMAP3 SPL: Rework memory initalization and devkit8000 support
This changes to making the board be responsible for providing the
memory initialization timings in SPL and converts the devkit8000
to this framework. In SPL we try and initialize both CS0 and CS1.
Cc: Frederik Kriewitz <frederik@kriewitz.eu> Signed-off-by: Tom Rini <trini@ti.com>
Tom Rini [Fri, 18 Nov 2011 12:48:04 +0000 (12:48 +0000)]
OMAP3: Add optimal SDRC autorefresh control values
This adds the optimal SDRC autorefresh control register values for
100Mhz, 133MHz, 165MHz and 200MHz clocks. We switch to using this
to provide the default 165MHz value.
Tom Rini [Fri, 18 Nov 2011 12:48:03 +0000 (12:48 +0000)]
omap3: mem: Add MCFG helper macro
This adds an MCFG macro to calculate the correct value, similar to
the ACTIMA/ACTIMB macros and adds a comment that all of the potential
values here are documented in the TRM. Then we convert the Micron
value to use this macro.
Tom Rini [Fri, 18 Nov 2011 12:48:00 +0000 (12:48 +0000)]
OMAP3: Add a helper function to set timings in SDRC
Since we go through the sequence to setup the SDRC timings more than
once, break this logic out into its own function and have that function
call mem_ok() to make sure the memory is usable.
Tom Rini [Fri, 18 Nov 2011 12:47:59 +0000 (12:47 +0000)]
OMAP3: Update SDRC dram_init to always call make_cs1_contiguous()
We update the comment in make_cs1_contiguous() to be a little bit
more clear (it's been copy/pasted from other silicons) and then
explain in dram_init() why we need to always try this.
Note that in the previous behavior we were always calling this on
boards that never had cs1 populated anyhow so making sure we do
this always is fine and will correct things like omap3evm detecting
an invalid amount of memory (384MB).
Prabhakar Lad [Thu, 17 Nov 2011 02:53:23 +0000 (02:53 +0000)]
ARM: davici_emac: Fix condition for number of phy detects
Fix the condition for number of phys in
davinci_eth_phy_detect() function.
CONFIG_SYS_DAVINCI_EMAC_PHY_COUNT indicates number of
phys. From this commit id dc02badab480563b0bf9d3908046ea9d6b22ae63
davinci emac initilazed one less than the number of phy count.
Christian Riesch [Tue, 29 Nov 2011 00:11:03 +0000 (00:11 +0000)]
arm: printf() is not available in some SPL configurations
This patch avoids build breakage for SPLs that do not support printf.
Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Cc: Wolfgang Denk <wd@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Acked-by: Tom Rini <trini@ti.com> Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>
Christian Riesch [Mon, 28 Nov 2011 23:46:20 +0000 (23:46 +0000)]
arm, davinci: Remove duplication of pinmux configuration code
This patch replaces the pinmux configuration code in
arch/arm/cpu/arm926ejs/davinci/da850_lowlevel.c by the code from
arch/arm/cpu/arm926ejs/davinci/pinmux.c.
Christian Riesch [Mon, 28 Nov 2011 23:46:19 +0000 (23:46 +0000)]
arm, hawkboard: Use the pinmux configurations defined in the arch tree
The boards in board/davinci/da8xxevm/ define pinmux_config[] vectors
that contain pinmux configurations for emac, uarts, memory controllers...
In an earlier patch such pinmux configurations were added to the arch
tree. This patch makes the hawkboard use these definitions instead of
defining its own.
Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Cc: Sandeep Paulraj <s-paulraj@ti.com> Cc: Heiko Schocher <hs@denx.de> Cc: Syed Mohammed Khasim <sm.khasim@gmail.com> Cc: Sughosh Ganu <urwithsughosh@gmail.com> Cc: Mike Frysinger <vapier@gentoo.org> Acked-by: Heiko Schocher <hs@denx.de>
Christian Riesch [Mon, 28 Nov 2011 23:46:18 +0000 (23:46 +0000)]
arm, da850evm: Use the pinmux configurations defined in the arch tree
The boards in board/davinci/da8xxevm/ define pinmux_config[] vectors
that contain pinmux configurations for emac, uarts, memory controllers...
In an earlier patch such pinmux configurations were added to the arch
tree. This patch makes the da850evm use these definitions instead of
defining its own.
Christian Riesch [Mon, 28 Nov 2011 23:46:17 +0000 (23:46 +0000)]
arm, da850: Add pinmux configurations to the arch tree
Up to now nearly every davinci board has separate code for the
definition of pinmux configurations. This patch adds pinmux
configurations for the DA850 SoCs to the arch tree which may later
be used for all DA850 based boards.
Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Cc: Sandeep Paulraj <s-paulraj@ti.com> Cc: Heiko Schocher <hs@denx.de> Cc: Mike Frysinger <vapier@gentoo.org> Acked-by: Heiko Schocher <hs@denx.de>
Christian Riesch [Mon, 28 Nov 2011 23:46:16 +0000 (23:46 +0000)]
arm, da850evm: Do pinmux configuration for EMAC together with other pinmuxes
Pinmux configuration for the EMAC was done in a separate call
of davinci_configure_pin_mux(). This patch moves all the pinmux
configuration that is done for this board to a common place.
The configuration in struct pinmux_config i2c_pins does not configure
the pins for i2c but for uart. Since this function is already
configured by struct pinmux_config uart2_pins the i2c_pins struct
is obsolete.
Heiko Schocher [Wed, 9 Nov 2011 20:06:23 +0000 (20:06 +0000)]
arm, arm926ejs: always do cpu critical inits
always do the cpu critical inits in cpu_init_crit,
and only jump to lowlevel_init, if CONFIG_SKIP_LOWLEVEL_INIT
is not defined.
Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Wolfgang Denk <hs@denx.de> Cc: Sandeep Paulraj <s-paulraj@ti.com> Cc: Tom Rini <tom.rini@gmail.com> Cc: Christian Riesch <christian.riesch@omicron.at>
Ilya Yanok [Mon, 28 Nov 2011 06:37:33 +0000 (06:37 +0000)]
davinci_emac: fix for running with dcache enabled
DaVinci EMAC is present on TI AM35xx SoCs (ARMv7) which run with D-Cache
enabled by default. So we have to take care and flush/invalidate the
cache before/after the DMA operations.
Please note that the receive buffer alignment to 32 byte boundary comes
from the old driver version I don't know if it is really needed or
alignment to cache line size is enough.
Ilya Yanok [Mon, 28 Nov 2011 06:37:32 +0000 (06:37 +0000)]
arm926ejs: add noop implementation for dcache ops
Added noop implementation for dcache operations that will buzz
about missing real implementation and disable the dcache.
This fixes compilation of DaVinci EMAC driver on arm926ejs.
Ilya Yanok [Mon, 28 Nov 2011 06:37:30 +0000 (06:37 +0000)]
davinci_emac: use internal addresses in buffer descriptors
On AM35xx CPPI RAM had different addresses when accessed from the CPU
and from the EMAC. We need to account this to deal with the buffer
descriptors correctly.
Ilya Yanok [Mon, 28 Nov 2011 06:37:29 +0000 (06:37 +0000)]
davinci_emac: move arch-independent defines to separate header
DaVinci EMAC is found not only on DaVinci SoCs but on some OMAP3 SoCs
also. This patch moves common defines from arch-davinci/emac_defs.h to
drivers/net/davinci_emac.h
DaVinci specific PHY drivers hacked to include the new header. We might
want to switch to phylib in future.
arch/arm/cpu/arm926ejs/davinci/libdavinci.o: In function `timer_init':
/work/agust/git/u-boot/arch/arm/cpu/arm926ejs/davinci/timer.c:62:
undefined reference to `davinci_arm_clk_get'
drivers/i2c/libi2c.o: In function `i2c_init':
/work/agust/git/u-boot/drivers/i2c/davinci_i2c.c:102:
undefined reference to `davinci_arm_clk_get'
Aneesh V [Mon, 21 Nov 2011 23:39:05 +0000 (23:39 +0000)]
omap4: fix IO setting
The value from TRIM is not working for some 4430 silicons.
So, override with hw team recommended value. However, for
4460 TRIM value shall be used as long as the part is trimmed
This fixes boot problem on some OMAP4430 ES2.0 Panda boards
out there.
Cc: Steve Sakoman <sakoman@gmail.com> Signed-off-by: Aneesh V <aneesh@ti.com>
Aneesh V [Mon, 21 Nov 2011 23:39:04 +0000 (23:39 +0000)]
omap4+: streamline CONFIG_SYS_TEXT_BASE and other SDRAM addresses
Change the CONFIG_SYS_TEXT_BASE and the addresses of SDRAM
buffers used by SPL(heap and BSS) keeping in mind the
following requirements:
1. Make sure that SPL's heap and BSS doesn't come in the way
of Linux kernel, which is typically loaded at 0x80008000. This
will be important when SPL directly loads kernel.
2. Align the CONFIG_SYS_TEXT_BASE between TI internal
U-Boot and mainline U-Boot. This avoids a lot of confusion
and allows for the inter-operability of x-loader, SPL,
internal U-Boot, mainline U-Boot etc. The internal U-Boot's
address can not be changed to that of mainline U-Boot
as internal U-Boot doesn't have relocation and 0x80100000
used by mainline U-Boot will clash with kernel
3. Assume only a minimum amount of memory that may be available
on any practical OMAP4/5 board in future too. We are assuming
a minimum of 128 MB of memory
Aneesh V [Mon, 21 Nov 2011 23:39:02 +0000 (23:39 +0000)]
omap4: emif: fix error in driver
There was a typo in the EMIF driver. It went un-noticed
because it affected only when automatic detection is enabled
and even then half the memory was configured and identified
properly.
Reported-by: Rockefeller <rockefeller.lin@innocomm.com> Signed-off-by: Aneesh V <aneesh@ti.com>
Aneesh V [Mon, 21 Nov 2011 23:39:00 +0000 (23:39 +0000)]
omap4460: fix TPS initialization
TPS power IC is controlled using a GPIO (gpio_wk7).
This GPIO should be maintained at logic 1 always. As
such an internal pull-up on this pin will do the job,
driving the GPIO outuput is not needed. This will avoid
the need of using GPIO library in SPL and also may
save some power.
Aneesh V [Mon, 21 Nov 2011 23:38:57 +0000 (23:38 +0000)]
omap: Improve PLL parameter calculation tool
Improve the tool that finds multiplier and divider for PLLs:
The previous algorithm could get stuck on local maxima
and required the user to specify the tolerance. Improve
the algorithm to go through the entire search space and find
the optimal solution.
Aneesh V [Mon, 21 Nov 2011 23:33:58 +0000 (23:33 +0000)]
armv7: disable L2 cache in cleanup_before_linux()
We were not disabling external caches before jumping
to kernel. We were flushing all caches including
external caches and disabling caches globally in
CP15 System Control register. Apparently this is not
enough.
The bootstrap loader in Linux kernel that does decompression
enables data-caches again, flush them after use and disable
them before jumping to kernel proper. However, it's not aware
of the external caches.
Since we have left external cache enabled, external cache will
get used once caches are enabled globally, but it's not flushed
because decompressor is not aware of external caches. When it
jumps to kernel with caches disabled globally, we have stale
data in the external cache and a coherency problem.
This was breaking the boot for OMAP4 with latest mainline
kernel. The solution is to disable external caches in
cleanup_before_linux(). With this fix kernel is booting again.
Cc: Albert Aribaud <albert.u.boot@aribaud.net> Signed-off-by: Aneesh V <aneesh@ti.com>
Marek Vasut [Mon, 31 Oct 2011 13:17:21 +0000 (14:17 +0100)]
PXA: Adapt Voipac PXA270 to OneNAND SPL
Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
V2: Add missing u-boot-spl.lds, convert bitshifts to division,
convert to spl_onenand_load_image()
Marek Vasut [Sat, 5 Nov 2011 18:26:47 +0000 (19:26 +0100)]
PXA: Re-add the Dcache locking as RAM for pxa250
Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Stefan Herbrechtsmeier <sherbrec@cit-ec.uni-bielefeld.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Marek Vasut [Mon, 31 Oct 2011 13:12:39 +0000 (14:12 +0100)]
PXA: Rework start.S to be closer to other ARMs
The start.S on PXA was very obscure. This reworks it back to be close to arm1136
start.S and others.
Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
V2: Don't compile in relocation support if building SPL
Simon Schwarz [Mon, 31 Oct 2011 06:34:45 +0000 (06:34 +0000)]
Fix regression in SMDK6400
s3c64xx.c implemented its own nand_read_byte, nand_write_buf and
nand_read_buf functions. This provoked a regression when these functions
were made public by patch 55f429bb39614a16b1bacc9a8bea9ac01a60bfc8.
This deletes these duplicated functions from s3c64xx.c and adds the generic
implementations in nand_base.c to the spl Makefile. It also adds
-ffcuntion-sections and -gc-sections to the compilation flags of the SPL to
avoid errors originating from unused functions in nand_base.c.
Description of the regression:
http://article.gmane.org/gmane.comp.boot-loaders.u-boot/108873
Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com> Cc: scottwood@freescale.com Cc: s-paulraj@ti.com Cc: albert.u.boot@aribaud.net
Simon Guinot [Mon, 21 Nov 2011 13:55:46 +0000 (19:25 +0530)]
mvsata: fix ide_preinit for missing disks
Consider that ide_preinit() succeed if at least one port is successfully
initialized. This allows to iniatialize IDE support on a board with two
SATA ports but a single hard disk available.
Signed-off-by: Simon Guinot <simon.guinot@sequanux.org>
Sanjeev Premi [Wed, 16 Nov 2011 15:20:47 +0000 (10:20 -0500)]
part_efi: Fix compile errors
Fix errors noticed after enabling CONFIG_EFI_PARTITION
for the OMAP3 EVM board:
part_efi.c: In function 'print_part_efi':
part_efi.c:133:5: warning: passing argument 3 of 'is_gpt_valid'
from incompatible pointer type
part_efi.c:95:12: note: expected 'struct gpt_header *' but arg
ument is of type 'struct gpt_header **'
part_efi.c: In function 'get_partition_info_efi':
part_efi.c:173:4: warning: passing argument 3 of 'is_gpt_valid
' from incompatible pointer type
part_efi.c:95:12: note: expected 'struct gpt_header *' but arg
ument is of type 'struct gpt_header **'
part_efi.c: In function 'alloc_read_gpt_entries':
part_efi.c:384:18: error: 'CONFIG_SYS_CACHELINE_SIZE' undeclare
d (first use in this function)
Signed-off-by: Sanjeev Premi <premi@ti.com> Cc: Tom Rini <tom.rini@gmail.com> Cc: Anton staaf <robotboy@chromium.org> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
When building u-boot as 64 bit application (e.g. sandbox) ulong might be
64 bits in size. This breaks network code as IPaddr_t is 64 bytes in
size then and an IPv4 address is 32 bits in size. This patch makes sure
that IPaddr_t is always 32 bits in size. Also some warnings introduced
by this patch are fixed.
Signed-off-by: Matthias Weisser <weisserm@arcor.de> Acked-by: Mike Frysinger <vapier@gentoo.org>
Igor Grinberg [Sun, 27 Nov 2011 21:57:38 +0000 (21:57 +0000)]
tools/envcrc: fix compile breakage
When ENV_IS_EMBEDDED is not set, but CONFIG_BUILD_ENVCRC is set,
the environment.h file does not get included resulting in unrecognized
env_t type.
Fix this by moving the include directive.
Reported-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Igor Grinberg <grinberg@compulab.co.il> Tested-by: Mike Frysinger <vapier@gentoo.org>
Andy Fleming [Mon, 21 Nov 2011 13:40:43 +0000 (13:40 +0000)]
Add a "tidy" build option
It is sometimes desireable to clean up the byproducts of the build
process without removing the executable results. "make clean" is
close, but leaves the build directory with a large number of
*.depend* files. This new build option invokes make clean, and then
removes the depend files.
Signed-off-by: Andy Fleming <afleming@freescale.com>
Vadim Bendebury [Sat, 15 Oct 2011 15:13:34 +0000 (15:13 +0000)]
Add a cli command to test the TPM device.
The command gets an arbitrary number of arguments (up to 30), which
are interpreted as byte values and are feed into the TPM device after
proper initialization. Then the return value and data of the TPM
driver is examined.
TPM commands are described in the TCG specification.
For instance, the following sequence is the 'TPM Startup' command, it
is processed by the TPM and a response is generated:
If the command is corrupted (fed one byte short), an error is reported:
boot > tpm 0x0 0xc1 0x0 0x0 0x0 0xc 0x0 0x0 0x0 0x99 0x0
generic_lpc_tpm.c:311 unexpected TPM status 0xff000888
generic_lpc_tpm.c:516 failed sending data to TPM
tpm command failed
boot >
Change-Id: I3f3c5bfec8b852e208c4e99ba37b0f2b875140b0 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> CC: Wolfgang Denk <wd@denx.de>
This patch is added for PHY whose register offset value exceeds 0xFF and
cannot be used with "unsigned char" datatype in miiphy_read, miiphy_write
and miiphy_register functions. Datatype of register offset is changed to
unsigned short instead of unsigned char so that offset value greater then
0xFF can be used.
Signed-off-by: Chandan Nath <chandan.nath@ti.com> Acked-by: Mike Frysinger <vapier@gentoo.org>
Mike Partington [Wed, 27 Oct 2010 10:31:09 +0000 (10:31 +0000)]
Standalone Apps: Standalone apps should need only exports.h.
Modify exports.h to remove its dependencies on other files, thus
enabling standalone apps to require only exports.h from the U-Boot
source tree. This appears to be the intent based on the following
note: http://lists.denx.de/pipermail/u-boot/2010-January/067174.html
Signed-off-by: Mike Partington <mparting@lexmark.com>
Fix:
flash.c: In function 'flash_erase_1':
flash.c:514:24: warning: variable 'l_sect' set but not used
[-Wunused-but-set-variable]
flash.c: In function 'flash_erase_2':
flash.c:956:24: warning: variable 'l_sect' set but not used
[-Wunused-but-set-variable]
Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Stefan Roese <sr@denx.de> Acked-by: Stefan Roese <sr@denx.de>
projects / u-boot.git / log
![13 years agoPXA: Rename CONFIG_PXA2[57]X to CONFIG_CPU_PXA2[57]X](/img/sics.gif?p=u-boot.git;a=commit;h=abc20aba1834c321a638b367c18dcce1bb4e232d){kind=link}
