The first sentence is half-way true; the macro is always defined, but
has the value 0 or 1.
The second is outright false. A lot of code guarded by
MEM_SUPPORT_64BIT_DATA uses a "ulong" to store values, so if
sizeof(long) is not 8, that code would probably compile, but not work
at all as expected.
It would probably be possible to make all such code explicitly use u64
and thus make it work on 32 bit targets, but until that is done, do
not pretend that it's ok to override the automatic value of
MEM_SUPPORT_64BIT_DATA.
cmd/command.c: relax length check in cmd_get_data_size()
Just check that the length is at least 2. This allows passing strings
like ".b", which can be convenient when constructing
tests (i.e. parametrizing the suffix used).
cmd/command.c: constify "arg" argument of cmd_get_data_size()
This function obviously does not and must not modify "arg". Change the
prototype to allow passing an argument of type "const char*" without
requiring a cast.
There's no 'mv' shell command for handling overlapping src and dst
regions, and there's no point introducing one, when we can just make
the existing 'cp' command DTRT in all cases. memmove() should at most
be a few instructions more then memcpy() (to detect the appropriate
direction to do the copy), which is of course completely in the noise
with all the string processing that a shell command does.
Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Love Kumar [Wed, 3 Jan 2024 10:29:42 +0000 (15:59 +0530)]
test/py: memtest: Add tests for mtest command
Add the following memory tests:
memtest_negative - To test mtest command by providing incorrect inputs
memtest_ddr - To test memory write-read-comparision for DDR memory
Jim Liu [Wed, 3 Jan 2024 07:29:33 +0000 (15:29 +0800)]
reset: npcm: Add support for Nuvoton NPCM BMC family
Add reset controller driver for Nuvoton BMCs.
The npcm reset driver not only supports reset each module reset
but setting initial value of reset Control Registers.
Love Kumar [Tue, 2 Jan 2024 06:47:07 +0000 (12:17 +0530)]
test/py: i2c: Add tests for i2c command
Add below test cases for i2c commands:
i2c_bus - To show i2c bus info,
i2c_dev - To set or show the current bus,
i2c_probe - To probe the i2c device,
i2c_eeprom - To test i2c eeprom device,
i2c_probe_all_buses - To list down all the buses and probes it
Love Kumar [Tue, 2 Jan 2024 06:44:35 +0000 (12:14 +0530)]
test/py: mii: Add tests for mii command
Add below test cases for mii commands:
mii_info -To display MII PHY info
mii_list - To list MII devices
mii_set_device - To set MII device
mii_read - To reads register from MII PHY address
mii_dump - To display data from MII PHY address
Signed-off-by: Love Kumar <love.kumar@amd.com> Reviewed-by: Tom Rini <trini@konsulko.com>
TracyMg_Li [Mon, 25 Dec 2023 03:21:34 +0000 (11:21 +0800)]
ARM add initial support for the Phytium Pe2201 Board.
Add pe2201 platform code and the device tree of pe2201 platform board.
The initial support comprises the UART and PCIe.
Signed-off-by: TracyMg_Li <TracyMg_Li@outlook.com>
Changes since v1:
fix space corrupt.
Changes since v2:
switch to bootstd and text environment.
Changes since v3:
add environment variables.
next_header() and get_next_header() only differ in how the const attribute
is used. One function taking a const parameter and returning a non-const is
good enough.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Love Kumar [Tue, 19 Dec 2023 12:20:51 +0000 (17:50 +0530)]
test/py: mdio: Add tests for mdio command
Add below test cases for mdio commands:
mdio_list - To list MDIO buses
mdio_read - To read PHY's register at <devad>.<reg>
mdio_write - To write PHY's register at <devad>.<reg>
Signed-off-by: Love Kumar <love.kumar@amd.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 16 Jan 2024 14:51:16 +0000 (09:51 -0500)]
Merge tag 'qcom-2024.04-rc1' of https://gitlab.denx.de/u-boot/custodians/u-boot-snapdragon
Qualcomm architecture changes:
* Move clock and pinctrl drivers out of mach-snapdragon
* Various clock driver improvements
* Convert PMIC power/reset key driver to use the button API
* Preparetory work for migrating to upstream DT
Caleb Connolly [Mon, 15 Jan 2024 18:03:17 +0000 (18:03 +0000)]
sandbox_flattree: enable button support
sandbox_flattree enables QCOM_PMIC_GPIO which now depends on BUTTON. As
a result the button tests now get run, but fail because the ADC and GPIO
button drivers aren't enabled.
Enable them to run the tests for sandbox_flattree.
Reported-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Caleb Connolly [Tue, 5 Dec 2023 13:46:54 +0000 (13:46 +0000)]
pmic: qcom: dont use dev_read_addr to get USID
Linux DTs stuff a value indicating if the USID is a USID or a GSID in the
reg property, the Linux SPMI driver then reads the two address cells
separately. U-boot's dev_read_addr() doesn't know how to handle this, so
use ofnode_read_u32_index() to get just the USID.
The Qcom pmic driver doesn't have support for GSID handling, so just
ignore the second value for now.
Caleb Connolly [Tue, 5 Dec 2023 13:46:48 +0000 (13:46 +0000)]
mach-snapdragon: switch to PMIC button driver
The PMIC button driver is a much better representation of the hardware
here, adjust the boards to use upstream DT and the PMIC button driver
instead of exposing the buttons as GPIOs and relying on the GPIO-button
driver.
Qualcomm PMICs include a "pon" function which handles two buttons, the
power button and "resin" button (usually volume down). Introduce a new
driver following upstream Linux DT to enable these and map them to Enter
and Down respectively to enable use in boot menus.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Sumit Garg <sumit.garg@linaro.org> Tested-by: Sumit Garg <sumit.garg@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
priv->pid is uint32_t, but dev_read_addr() returns a uint64_t on arm64,
with the upper bits being used for error codes. Do error checking before
downcasting to u32 to prevent errors being silently ignored.
Reviewed-by: Sumit Garg <sumit.garg@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Tested-by: Sumit Garg <sumit.garg@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Caleb Connolly [Tue, 14 Nov 2023 12:51:11 +0000 (12:51 +0000)]
serial: msm-geni: don't rely on parent misc device
commit 1b15483deb3f ("misc: add Qualcomm GENI SE QUP device driver")
introduced support for platform-specific oversampling values, necessary
to configure the UART clocks on all platforms at runtime. However it
relies in probing a parent device. Despite the DM_FLAG_PRE_RELOC flag,
this is not done consistently during boot.
Instead, take another approach by relying on ofnode_ helpers to read the
serial engine base address and do the read directly. This fixes early
UART on boards with a non-default oversampling rate.
Caleb Connolly [Tue, 14 Nov 2023 12:55:42 +0000 (12:55 +0000)]
pinctrl: qcom: make compatible with linux DTs
The pinctrl and GPIO drivers are currently heavily incompatible with
upstream. Most Qualcomm pinctrl blocks feature "tiles" of pins, each at
it's own address. Introduce support for these by allowing the soc driver
to specify per-pin register offsets similarly to the Linux driver.
Adjust the GPIO driver to handle these too, and finally enable support
for all pins with the same numbering as used in Linux.
Caleb Connolly [Tue, 14 Nov 2023 12:55:40 +0000 (12:55 +0000)]
pinctrl: qcom: move out of mach-snapdragon
Move the Qualcomm pinctrl drivers out of mach-snapdragon and over to the
rest of the pinctrl drivers, adjust the drivers so that support for each
platform can be enabled/disabled individually and introduce platform
specific configuration options.
Caleb Connolly [Tue, 7 Nov 2023 12:41:05 +0000 (12:41 +0000)]
clk/qcom: fix rcg divider value
The RCG divider field takes a value of (2*h - 1) where h is the divisor.
This allows fractional dividers to be supported by calculating them at
compile time using a macro.
However, the clk_rcg_set_rate_mnd() function was also performing the
calculation. Clean this all up and consistently use the F() macro to
calculate these at compile time and properly support fractional divisors.
Additionally, improve clk_bcr_update() to timeout with a warning rather
than hanging the board, and make the freq_tbl struct and helpers common
so that they can be reused by future platforms.
Caleb Connolly [Tue, 7 Nov 2023 12:41:03 +0000 (12:41 +0000)]
clk/qcom: use function pointers for enable and set_rate
Currently, it isn't possible to build clock drivers for more than one
platform due to how the msm_enable() and msm_set_rate() callbacks are
implemented.
Extend qcom_clk_data to include function pointers for these and convert
all platforms to use them.
Previously, clock drivers relied on include/configs/<board.h> to include the
board specific sysmap header, however as most of the header contents are clock
driver related, import the contents directly into each clock driver and
remove the header. The only exception here is the dragonboard820c board file
which includes some pinctrl macros, those are also inlined.
Konrad Dybcio [Tue, 7 Nov 2023 12:41:01 +0000 (12:41 +0000)]
clk/qcom: handle resets and clocks in one device
Qualcomm's clock controller blocks actually do much more than it
says on the tin.. They provide clocks, resets and power domains.
Currently, U-Boot requires one to spawn 2 separate devices for
controlling clocks and resets, both spanning the same register space.
Refactor the code to make it work with just a single DT node, making
it compatible with upstream Linux bindings and dropping the dedicated
reset driver in favour of including it in the clock driver.
Heavily inspired by Renesas code for a similar hw block.
[caleb: moved drivers to clk/qcom, added reset driver and adjusted bind
logic. Imported qcom,gcc-ipq4019.h from Linux]
Caleb Connolly [Tue, 7 Nov 2023 12:40:59 +0000 (12:40 +0000)]
clk/qcom: move from mach-snapdragon
Clock drivers don't belong here, move them to the right place and
declutter mach-snapdragon a bit.
To de-couple these drivers from specific "target" platforms, add
additional config options to enable each clock driver gated behind a
common CLK_QCOM option and enable them by default for the respective
targets. This will make future work easier as we move towards a generic
Qualcomm target.
arm: xea: Add support for boot image source descriptor in SPL
We load two boot image source descriptor structures from last
two sectors in the SPI NOR flash and determine the boot source
for loading the kernel/DTB images, then adjust the boot order for
loading image from eMMC boot0 or boot1 partition.
Yannic Moog [Mon, 15 Jan 2024 09:31:41 +0000 (10:31 +0100)]
board: phytec: fix link error when disabling PHYTEC_SOM_DETECTION
Commit aa7858fe5e2e ("board: phytec: som_detection: move definitions to
source file") moved function definitions from header to source file.
Makefile however was not updated to unconditionally (from
[..]_SOM_DETECTION) build the imx8 and phytec som detection units.
Also remove unused includes that cause build failures on arm 32bit
boards. SoM detection shall support 32bit boards as well, but arch
specific code should not be included in the generic module.
Roger Quadros [Mon, 11 Dec 2023 11:45:59 +0000 (13:45 +0200)]
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x
AM335x uses a special driver "am335x_spl_bch.c" as SPL
NAND loader. This driver expects 1 sector at a time ECC
and doesn't work well with multi-sector ECC that was implemented in
commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction")
Additionally, the omap_elm driver does not support multi sector ECC and will
need more work and tests to get multi sector working correctly on all
platforms.
Switch back to 1 sector at a time read/ECC.
Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
* add missing pointer check after memory allocation in efidebug
* replace duplicate functions efi_dp_append and efi_dp_concat
* support fmp versioning for multi bank update
* avoid using dm_scan_other() in EFI app
Marek Vasut [Sat, 13 Jan 2024 17:59:13 +0000 (18:59 +0100)]
ARM: imx: Set stdio to serial on Data Modul i.MX8M Mini/Plus eDM SBC
In case CONSOLE_MUX and SYS_CONSOLE_IS_IN_ENV are enabled, the console
stdin, stdout, stderr must be defined in environment. Define the default
settings to fix the following warning on boot:
"
In: No input devices available!
Out: No output devices available!
Err: No error devices available!
"
Marek Vasut [Sat, 13 Jan 2024 17:58:30 +0000 (18:58 +0100)]
ARM: imx: Set stdio to serial on DH i.MX8M Plus DHCOM
In case CONSOLE_MUX and SYS_CONSOLE_IS_IN_ENV are enabled, the console
stdin, stdout, stderr must be defined in environment. Define the default
settings to fix the following warning on boot:
"
In: No input devices available!
Out: No output devices available!
Err: No error devices available!
"
Masahisa Kojima [Thu, 11 Jan 2024 05:35:40 +0000 (14:35 +0900)]
efi_loader: support fmp versioning for multi bank update
This commit stores the firmware version into the array
of fmp_state structure to support the fmp versioning
for multi bank update. The index of the array is identified
by the bank index.
This modification keeps the backward compatibility with
the existing versioning feature.
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org> Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Masahisa Kojima [Thu, 11 Jan 2024 05:35:39 +0000 (14:35 +0900)]
fwu: fix fwu_get_image_index interface
The capsule update uses the DFU framework for updating
storage. fwu_get_image_index() currently returns the
image_index calculated by (dfu_alt_num + 1), but this is
different from the image_index in UEFI terminology.
Since capsule update implementation calls dfu_write_by_alt
function, it is better that FWU returns the dfu_alt_num.
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org> Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
efi_loader: Clean up efi_dp_append and efi_dp_concat
Looking back at the initrd storing functionality, we introduced three
functions, efi_dp_append_or_concatenate(), efi_dp_append/concat(). In
hindsight we could have simplified that by a lot. First of all none of
the functions append anything. They all allocate a new device path and
concatenate the contents of two device paths in one. A boolean parameter
controls the final device path -- if that's true an end node is injected
between the two device paths.
So let's rewrite this and make it a bit easier to read. Get rid of
efi_dp_append(), efi_dp_concat() and rename
efi_dp_append_or_concatenate() to efi_dp_concat(). This is far more
intuitive and the only adjustment that is needed is an extra boolean
argument on all callsites.
doc: fix three-dash references in reStructuredText
The "Sending patches" and "Patman patch manager" documents refer to the
three-dash, "---", that separates patch parts. The symbol is written in
the documentation in the same form as it is in actual patches: as three
U+002D HYPHEN-MINUS characters. When building the documentation, Sphinx
converts this symbol to a U+2014 EM DASH, that is invalid in this case.
Make the three-dash symbol a reStructuredText inline literal to prevent
its conversion; that is, enclose it in a pair of double backquotes (`).
Signed-off-by: Grzegorz Szymaszek <gszymaszek@short.pl> Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Masahisa Kojima [Mon, 18 Dec 2023 09:57:41 +0000 (18:57 +0900)]
efi_loader: fix iteration of FMP protocols
If one of the FMP protocols fails when calling GetImageInfo(),
populating the ESRT ends up with failure and other FMP protocols
are not added to the ESRT. We should still add all other FMP
protocols to the ESRT.
With this commit, iteration of all FMP protocols continues
even though one of the FMP protocols fails.
Lukasz Majewski [Fri, 12 Jan 2024 16:01:48 +0000 (17:01 +0100)]
defconfig: xea: Change default spi-nor memory bus to 2 (single binary)
After the re-sync with Linux kernel (v6.0) of the XEA DTS
(SHA1: 7d08ddd09b75e7a3c103cc0d0d3ed700287f268e) the alias
for SPI bus, to which SPI-NOR memory is connected, has changed from
'spi3' to 'spi2'.
To be in sync with current u-boot's xea dts, the default bus number
(which allows running 'sf probe' without any extra parameters given)
has been adjusted.
Yannic Moog [Wed, 10 Jan 2024 13:35:44 +0000 (14:35 +0100)]
Add support for phyGATE-Tauri-L-iMX8MM
phyGATE-Tauri-L-iMX8MM is a Gateway based on the phycore-imx8mm SoM.
As a result, all the board code of the phycore-imx8mm is used.
Device tree synced with kernel v6.7.
Tom Rini [Fri, 12 Jan 2024 13:34:50 +0000 (08:34 -0500)]
Merge branch '2024-01-12-assorted-fixes'
- Allow defconfigs to #include files (so we can construct a defconfig
from fragments), update phy-mtk-tphy binding, assorted test fixes,
allow building host tools without cryptographic libraries again,
android_ab bugfix, and make some SPL debugging cases easier.
Paul-Erwan Rio [Thu, 21 Dec 2023 07:26:11 +0000 (08:26 +0100)]
tools: fix build without LIBCRYPTO support
Commit cb9faa6f98ae ("tools: Use a single target-independent config to
enable OpenSSL") introduced a target-independent configuration to build
crypto features in host tools.
But since commit 2c21256b27d7 ("hash: Use Kconfig to enable hashing in
host tools and SPL") the build without OpenSSL is broken, due to FIT
signature/encryption features. Add missing conditional compilation
tokens to fix this.
Signed-off-by: Paul-Erwan Rio <paulerwan.rio@gmail.com> Tested-by: Alexander Dahl <ada@thorsis.com> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Alexander Dahl [Thu, 21 Dec 2023 07:26:10 +0000 (08:26 +0100)]
tools: kwbimage: Allow disabling build on non-mvebu platforms
Some users want to build with CONFIG_TOOLS_LIBCRYPTO disabled, which in
general is possible for at least some boards. 32-bit mvebu however
requires kwbimage for building SPL, and kwbimage has a hard dependency
to host OpenSSL.
The new symbol CONFIG_TOOLS_KWBIMAGE allows disabling kwbimage build on
non-mvebu platforms, and thus building without host libcrypto from
OpenSSL.
Based on previous work and discussions, see links below.
Peter Robinson [Tue, 19 Dec 2023 22:01:50 +0000 (22:01 +0000)]
test: fs: fs-test: Move the tests to use sha256sum
Move the use of md5s for recording filesystem file integrity
checks to sha256 hashes as they're preferred due to being
less likely to produce clashing hashes. In the process
generalise some of the wording to use the more generic
hash term.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
projects / u-boot.git / log
