]> git.dujemihanovic.xyz Git - u-boot.git/log
u-boot.git
8 years agoefi_loader: Allow to compile helloworld.efi w/o bundling it
Alexander Graf [Thu, 17 Nov 2016 21:40:10 +0000 (22:40 +0100)]
efi_loader: Allow to compile helloworld.efi w/o bundling it

Today we can compile a self-contained hello world efi test binary that
allows us to quickly verify whether the EFI loader framwork works.

We can use that binary outside of the self-contained test case though,
by providing it to a to-be-tested system via tftp.

This patch separates compilation of the helloworld.efi file from
including it in the u-boot binary for "bootefi hello". It also modifies
the efi_loader test case to enable travis to pick up the compiled file.
Because we're now no longer bloating the resulting u-boot binary, we
can enable compilation always, giving us good travis test coverage.

Signed-off-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agotests: Add efi_loader hello world test
Alexander Graf [Thu, 17 Nov 2016 17:31:05 +0000 (18:31 +0100)]
tests: Add efi_loader hello world test

Now that we have working network tests and a hello world efi application
built inside our tree, we can automatically test that efi binary running
inside of U-Boot.

Signed-off-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agotravis: Add python path for environments
Alexander Graf [Thu, 17 Nov 2016 17:31:04 +0000 (18:31 +0100)]
travis: Add python path for environments

When running in travis-ci, we want to pass environment configuration to
the tests. These reside in a path available through PYTHONPATH, so let's
define that one to point to the unit test repo.

Signed-off-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agoTravis: Expose build dir as variable
Alexander Graf [Thu, 17 Nov 2016 17:31:03 +0000 (18:31 +0100)]
Travis: Expose build dir as variable

Some travis QEMU tests can transfer files between the build directory
and the guest U-Boot instance. For that to work, both need to have access
to the same directory.

This patch puts the current build path into an environment variable, so
that the environment generating python scripts can extract it from there
and read the respective files.

Signed-off-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agotests: net: Offset downloads to 4MB
Alexander Graf [Thu, 17 Nov 2016 17:31:02 +0000 (18:31 +0100)]
tests: net: Offset downloads to 4MB

The network test currently downloads files at 0MB offset of RAM start.
This works for most ARM systems, but x86 has weird memory layout constraints
on the first MB of RAM.

To not get caught into any of these, let's add a 4MB pad from start
of RAM to the default memory offset.

Signed-off-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agoMerge git://git.denx.de/u-boot-rockchip
Tom Rini [Sat, 26 Nov 2016 14:26:27 +0000 (09:26 -0500)]
Merge git://git.denx.de/u-boot-rockchip

8 years agorockchip: configs: correct partitions 'boot' size
Jacob Chen [Tue, 15 Nov 2016 08:55:27 +0000 (16:55 +0800)]
rockchip: configs: correct partitions 'boot' size

It should be 112M, to make rootfs start at 0x40000

Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
8 years agorockchip: Add support for veyron-minnie (ASUS Chromebook Flip)
Simon Glass [Sun, 13 Nov 2016 21:24:54 +0000 (14:24 -0700)]
rockchip: Add support for veyron-minnie (ASUS Chromebook Flip)

This adds support for the Asus Chromebook Flip, an RK3288-based clamshell
device which can flip into 'tablet' mode. The device tree file comes from
Linux v4.8. The SDRAM parameters are for 4GB Samsung LPDDR3.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agorockchip: Add support for veyron-mickey (Chromebit)
Simon Glass [Sun, 13 Nov 2016 21:22:16 +0000 (14:22 -0700)]
rockchip: Add support for veyron-mickey (Chromebit)

This adds support for the Asus Chromebit, and RK3288-based device designed
to plug directly into an HDMI monitor. The device tree file comes from
Linux v4.8.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agorockchip: video: Avoid using u8 in the HDMI driver
Simon Glass [Sun, 13 Nov 2016 21:22:15 +0000 (14:22 -0700)]
rockchip: video: Avoid using u8 in the HDMI driver

It makes not sense using u8 to hold a value on a 32-bit or 64-bit machine.
It can only bloat the code by forcing the compiler to mask the value.
Change it to uint.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agorockchip: veyron: Adjust ARM clock after relocation
Simon Glass [Sun, 13 Nov 2016 21:22:14 +0000 (14:22 -0700)]
rockchip: veyron: Adjust ARM clock after relocation

Update board_init() to increase the ARM clock to the maximum speed on
veyron boards. This makes quite a large difference in performance. With
this change, speed goes from about 750 DMIPS to 2720 DMIPs.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agorockchip: clk: Support setting ACLK
Simon Glass [Sun, 13 Nov 2016 21:22:13 +0000 (14:22 -0700)]
rockchip: clk: Support setting ACLK

Add basic support for setting the ARM clock, since this allows us to run
at maximum speed in U-Boot. Currently only a single speed is supported
(1.8GHz).

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agorockchip: Move jerry SDRAM settings into its own .dts file
Simon Glass [Sun, 13 Nov 2016 21:22:12 +0000 (14:22 -0700)]
rockchip: Move jerry SDRAM settings into its own .dts file

The SDRAM settings are not common across all veyron models. Move the
current settings into Jerry's file.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agorockchip: veyron: Add a note about the SDRAM voltage
Simon Glass [Sun, 13 Nov 2016 21:22:11 +0000 (14:22 -0700)]
rockchip: veyron: Add a note about the SDRAM voltage

Add a comment to indicate that we are not supporting the PWM regulator
yet.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agorockchip: Rename jerry files to veyron
Simon Glass [Sun, 13 Nov 2016 21:22:10 +0000 (14:22 -0700)]
rockchip: Rename jerry files to veyron

At present we have a single rk3288-based Chromebook: chromebook_jerry. But
all such Chromebooks can use the same binary with only device-tree
differences. The family name is 'veyron', so rename the files accordingly.

Also update the device-tree filename since this currently differs from
Linux.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agorockchip: Move jerry to use of-platdata
Simon Glass [Sun, 13 Nov 2016 21:22:09 +0000 (14:22 -0700)]
rockchip: Move jerry to use of-platdata

Adjust jerry to use of-platdata like other rk3288 boards. This reduces the
SPL size enough that it boots again.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agorockchip: video: Check for device in use
Simon Glass [Sun, 13 Nov 2016 21:22:08 +0000 (14:22 -0700)]
rockchip: video: Check for device in use

Check whether a display device is in use before using it. Add a comment as
to why two displays cannot currently be used at the same time.

This allows us to remove the device-tree change that disables vopb on
jerry.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agovideo: Track whether a display is in use
Simon Glass [Sun, 13 Nov 2016 21:22:07 +0000 (14:22 -0700)]
video: Track whether a display is in use

Mark a display as in use when display_enable() is called. This can avoid
a display being used by multiple video-output devices.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agovideo: Use cache-alignment in video_sync()
Simon Glass [Sun, 13 Nov 2016 21:22:06 +0000 (14:22 -0700)]
video: Use cache-alignment in video_sync()

Sometimes the frame buffer is not a multiple of the cache line size.
Adjust the cache-flushing code to avoid cache warnings/errors in this
case.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agospi: Add a debug() on bind failure
Simon Glass [Sun, 13 Nov 2016 21:22:05 +0000 (14:22 -0700)]
spi: Add a debug() on bind failure

This is an uncommon error but we may as well have a debug() message when
it happens.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agorockchip: spi: Honour the deactivation delay
Simon Glass [Sun, 13 Nov 2016 21:22:03 +0000 (14:22 -0700)]
rockchip: spi: Honour the deactivation delay

This is not currently implemented. Add support for this so that the Chrome
OS EC can be used on jerry.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agorockchip: spi: Add support for of-platdata
Simon Glass [Sun, 13 Nov 2016 21:22:02 +0000 (14:22 -0700)]
rockchip: spi: Add support for of-platdata

Allow this driver to be used with of-platdata on rk3288.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agospi: Add of-platdata support to SPI and SPI flash
Simon Glass [Sun, 13 Nov 2016 21:22:01 +0000 (14:22 -0700)]
spi: Add of-platdata support to SPI and SPI flash

Some boards may want to use these subsystems with of-platdata in SPL. Add
support for this by avoiding any device tree access in this case.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agostdio: Correct numbering logic in stdio_probe_device()
Simon Glass [Sun, 13 Nov 2016 21:22:00 +0000 (14:22 -0700)]
stdio: Correct numbering logic in stdio_probe_device()

The current code assumes that the devices are ordered corresponding to
their alias value. But (for example) video1 can come before video0 in the
device tree.

Correct this, by always looking for device 0 first. After that we can fall
back to finding the first available device.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agostdio: Correct code style nits
Simon Glass [Sun, 13 Nov 2016 21:21:59 +0000 (14:21 -0700)]
stdio: Correct code style nits

Fix a few code style nits in stdio_get_by_name().

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agorockchip: Allow jerry to use of-platdata
Simon Glass [Sun, 13 Nov 2016 21:21:57 +0000 (14:21 -0700)]
rockchip: Allow jerry to use of-platdata

This board always boots from SPI, so update the code to support that with
of-platdata. The boot source is not currently available with of-platdata.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agorockchip: video: Correct VOP clock selection
Simon Glass [Sun, 13 Nov 2016 21:21:56 +0000 (14:21 -0700)]
rockchip: video: Correct VOP clock selection

This code incorrectly uses the oscillator. It should use the clock
selected in the device tree.

Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: 135aa95 (clk: convert API to match reset/mailbox style)
8 years agorockchip: video: Correct HDMI data source selection
Simon Glass [Sun, 13 Nov 2016 21:21:55 +0000 (14:21 -0700)]
rockchip: video: Correct HDMI data source selection

This code currently always selects the second source. It only worked
because both sources are set up.

With the change to only init video devices that are present in the stdout
environment variable, this fails. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agodts: arm: rk3036: add usb vbus node
Kever Yang [Tue, 8 Nov 2016 10:13:41 +0000 (18:13 +0800)]
dts: arm: rk3036: add usb vbus node

add fix regulator node for usb vbus power control.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
8 years agoconfig: rk3036: enable fix regulator
Kever Yang [Tue, 8 Nov 2016 10:13:40 +0000 (18:13 +0800)]
config: rk3036: enable fix regulator

usb host vbus power is using gpio fix regulator, enable it.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
8 years agoconfig: rk3036: enable configs for USB HOST
Kever Yang [Tue, 8 Nov 2016 10:13:39 +0000 (18:13 +0800)]
config: rk3036: enable configs for USB HOST

rk3036 using dwc2 usb controller, need enable relate configs for it.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
8 years agoconfig: evb-rk3399: enable PWM_ROCKCHIP
Kever Yang [Mon, 7 Nov 2016 08:30:44 +0000 (16:30 +0800)]
config: evb-rk3399: enable PWM_ROCKCHIP

PWM_ROCKCHIP need to enable for PWM regulator, this config
is missing during rebase and new patch set in previous submission.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
8 years agoevb-rk3399: deduced the dram node size when space reserved
Kever Yang [Mon, 7 Nov 2016 08:30:34 +0000 (16:30 +0800)]
evb-rk3399: deduced the dram node size when space reserved

The size dram node need to be deduced by the same amount of reserved space.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
8 years agoarm: rockchip: Fix typo in ROCKCHIP_RK3288 help
Andreas Färber [Wed, 2 Nov 2016 17:03:01 +0000 (18:03 +0100)]
arm: rockchip: Fix typo in ROCKCHIP_RK3288 help

UART,s -> UARTs, to avoid this spreading via copy&paste.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Acked-by: Simon Glass <sjg@chromium.org>
8 years agoarm: dts: Fix Rockchip sort order
Andreas Färber [Wed, 2 Nov 2016 17:02:17 +0000 (18:02 +0100)]
arm: dts: Fix Rockchip sort order

Sort rk3036 before rk3288.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Acked-by: Simon Glass <sjg@chromium.org>
8 years agopower: regulator: Add limits checking while setting current
Keerthy [Wed, 26 Oct 2016 08:12:32 +0000 (13:42 +0530)]
power: regulator: Add limits checking while setting current

Currently the specific set ops functions are directly
called without any check for min/max current limits for a regulator.
Check for them and proceed.

Signed-off-by: Keerthy <j-keerthy@ti.com>
Fixed checking of current limits:
Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agopower: regulator: Add limits checking while setting voltage
Keerthy [Wed, 26 Oct 2016 08:12:31 +0000 (13:42 +0530)]
power: regulator: Add limits checking while setting voltage

Currently the specific set ops functions are directly
called without any check for voltage limits for a regulator.
Check for them and proceed.

Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Fixed checking of voltate limits:
Signed-off-by: Simon Glass <sjg@chromium.org>
8 years agoMerge git://git.denx.de/u-boot-fdt
Tom Rini [Fri, 25 Nov 2016 22:40:02 +0000 (17:40 -0500)]
Merge git://git.denx.de/u-boot-fdt

8 years agoMerge git://git.denx.de/u-boot-fsl-qoriq
Tom Rini [Fri, 25 Nov 2016 22:39:54 +0000 (17:39 -0500)]
Merge git://git.denx.de/u-boot-fsl-qoriq

Signed-off-by: Tom Rini <trini@konsulko.com>
Conflicts:
arch/arm/Kconfig

8 years agopower: regulator: Introduce regulator_set_value_force function
Keerthy [Wed, 26 Oct 2016 08:12:30 +0000 (13:42 +0530)]
power: regulator: Introduce regulator_set_value_force function

In case we want to force a particular value on a regulator
irrespective of the min/max constraints for testing purposes
one can call regulator_set_value_force function.

Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agoMAINTAINERS: Fix syntax and update filename for FDT
Andreas Färber [Wed, 26 Oct 2016 16:14:00 +0000 (18:14 +0200)]
MAINTAINERS: Fix syntax and update filename for FDT

Let get_maintainers.pl pick up the new cmd/fdt.c.

Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agoimage-fit: Fix compiling error caused by autoconf.h
York Sun [Wed, 23 Nov 2016 17:25:09 +0000 (09:25 -0800)]
image-fit: Fix compiling error caused by autoconf.h

Commit ec6617c3 includes autoconf.h in image-fit.c, causing conflict
for board odroid-xu3 which overwrites CONFIG_SYS_BOARD in header
file. Move the include higher and use linux/kconfig.h instead of
generated/autoconf.h.

Signed-off-by: York Sun <york.sun@nxp.com>
CC: Alison Wang <alison.wang@nxp.com>
8 years agoarmv7: ls1021aiot: Fixing SPL compiling issues
York Sun [Wed, 23 Nov 2016 17:08:47 +0000 (09:08 -0800)]
armv7: ls1021aiot: Fixing SPL compiling issues

To align with SPL change 38fed8ab and 693d4c9f, add Kconfig option
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR to defconfig, and remove
CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS.

Signed-off-by: York Sun <york.sun@nxp.com>
CC: Feng Li <feng.li_2@nxp.com>
8 years agocolibri_pxa270: transition to driver model for serial
Marcel Ziswiler [Mon, 14 Nov 2016 20:40:28 +0000 (21:40 +0100)]
colibri_pxa270: transition to driver model for serial

Add serial platform data to board file.
Enable driver model for PXA serial driver.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
8 years agocolibri_pxa270: drop edit, elf, fpga, hush, regex et al. for space reason
Marcel Ziswiler [Mon, 14 Nov 2016 20:40:27 +0000 (21:40 +0100)]
colibri_pxa270: drop edit, elf, fpga, hush, regex et al. for space reason

With em humble DM and Kconfig migraters U-Boot binary size keeps
increasing. Drop a bunch of less needed stuff to save another precious
20+ KB.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
8 years agoserial: pxa: integrate optional driver model handling
Marcel Ziswiler [Mon, 14 Nov 2016 20:40:26 +0000 (21:40 +0100)]
serial: pxa: integrate optional driver model handling

Optional driver model handling integration.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Marek Vasut <marex@denx.de>
8 years agoserial: pxa: use kconfig for serial configuration
Marcel Ziswiler [Mon, 14 Nov 2016 20:40:25 +0000 (21:40 +0100)]
serial: pxa: use kconfig for serial configuration

Migrate the PXA serial driver to be configured via Kconfig.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Marek Vasut <marex@denx.de>
8 years agoarmv8: fsl-layerscape: Support loading 32-bit OS with PSCI enabled
Alison Wang [Thu, 10 Nov 2016 02:49:05 +0000 (10:49 +0800)]
armv8: fsl-layerscape: Support loading 32-bit OS with PSCI enabled

As PSCI and secure monitor firmware framework are enabled, this patch is
to support loading 32-bit OS in such case. The default target exception
level returned to U-Boot is EL2, so the corresponding work to switch to
AArch32 EL2 and jump to 32-bit OS are done in U-Boot and secure firmware
together.

Signed-off-by: Alison Wang <alison.wang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agoarmv8: fsl-layerscape: SMP support for loading 32-bit OS
Alison Wang [Thu, 10 Nov 2016 02:49:04 +0000 (10:49 +0800)]
armv8: fsl-layerscape: SMP support for loading 32-bit OS

Spin-table method is used for secondary cores to load 32-bit OS. The
architecture information will be got through checking FIT image and
saved in the os_arch element of spin-table, then the secondary cores
will check os_arch and jump to 32-bit OS or 64-bit OS automatically.

Signed-off-by: Alison Wang <alison.wang@nxp.com>
Signed-off-by: Chenhui Zhao <chenhui.zhao@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agoarmv8: Support loading 32-bit OS in AArch32 execution state
Alison Wang [Thu, 10 Nov 2016 02:49:03 +0000 (10:49 +0800)]
armv8: Support loading 32-bit OS in AArch32 execution state

To support loading a 32-bit OS, the execution state will change from
AArch64 to AArch32 when jumping to kernel.

The architecture information will be got through checking FIT image,
then U-Boot will load 32-bit OS or 64-bit OS automatically.

Signed-off-by: Ebony Zhu <ebony.zhu@nxp.com>
Signed-off-by: Alison Wang <alison.wang@nxp.com>
Signed-off-by: Chenhui Zhao <chenhui.zhao@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agoarm: exynos7420: remove custome low level init function
Thomas Abraham [Wed, 16 Nov 2016 13:19:16 +0000 (18:49 +0530)]
arm: exynos7420: remove custome low level init function

Remove the custom low-level initialization function and reuse the
default low-level initialization function. But this requires the
ARMV8_MULTIENTRY config option to be enabled for Exynos7420.

On Exynos7420, the boot CPU belongs to the second cluster and so
with ARMV8_MULTIENTRY config option enabled, the 'branch_if_master'
macro fails to detect the CPU as boot CPU. As a temporary workaround
the CPU_RELEASE_ADDR is set to point to '_main'.

Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Alison Wang <alison.wang@nxp.com>
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Reviewed-by: Alison Wang <alison.wang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agoarmv8/fsl-lsch3: Update code to release secondary cores
Priyanka Jain [Thu, 17 Nov 2016 06:59:56 +0000 (12:29 +0530)]
armv8/fsl-lsch3: Update code to release secondary cores

NXP ARMv8 SoC LS2080A release all secondary cores in one-go.
But other new SoCs like LS2088A, LS1088A release secondary
cores one by one.

Update code to release secondary cores based on SoC SVR
Add code to release cores one by one for non LS2080A SoCs

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Raghav Dogra <raghav.dogra@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
[YS: remove "inline" from declaration of initiator_type]
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agoarmv8: fsl-layerscape: Add NXP LS2088A SoC support
Priyanka Jain [Thu, 17 Nov 2016 06:59:55 +0000 (12:29 +0530)]
armv8: fsl-layerscape: Add NXP LS2088A SoC support

The QorIQ LS2088A SoC is built on layerscape architecture.

It is similar to LS2080A SoC with some differences like
1)Timer controller offset is different
2)It has A72 cores
3)It supports TZASC module

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agoarmv8: fsl-layerscape : Check SVR for initializing TZASC
Priyanka Jain [Thu, 17 Nov 2016 06:59:54 +0000 (12:29 +0530)]
armv8: fsl-layerscape : Check SVR for initializing TZASC

LS2080 SoC and its personalities does not support TZASC
But other new SoCs like LS2088A, LS1088A supports TZASC

Hence, skip initializing TZASC for Ls2080A based on SVR

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agoarmv8: fsl-layerscape: Update TZASC registers type
Priyanka Jain [Thu, 17 Nov 2016 06:59:53 +0000 (12:29 +0530)]
armv8: fsl-layerscape: Update TZASC registers type

TZASC registers like TZASC_GATE_KEEPER, TZASC_REGION_ATTRIBUTES
are 32-bit regsiters.
So while doing register load-store operations, 32-bit intermediate
register, w0 should be used.
Update x0 register to w0 register type.

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agoarmv8: lsch3: Use SVR based timer base address detection
Priyanka Jain [Thu, 17 Nov 2016 06:59:52 +0000 (12:29 +0530)]
armv8: lsch3: Use SVR based timer base address detection

Timer controller base address has been changed from
LS2080A SoC (and its personalities) to new SoCs like
LS2088A, LS1088A.

Use SVR based timer base address detection to avoid compile time #ifdef.

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agoarmv8: lsch3: Add generic get_svr() in assembly
Priyanka Jain [Thu, 17 Nov 2016 06:59:51 +0000 (12:29 +0530)]
armv8: lsch3: Add generic get_svr() in assembly

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agoMAINTAINERS: SUNXI: Update maintainership
Jagan Teki [Tue, 22 Nov 2016 11:44:06 +0000 (17:14 +0530)]
MAINTAINERS: SUNXI: Update maintainership

Add Jagan and Maxime as Maintainers for SUNXI

Signed-off-by: Jagan Teki <jagan@openedev.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
8 years agoMerge branch 'master' of git://git.denx.de/u-boot-spi
Tom Rini [Tue, 22 Nov 2016 12:57:23 +0000 (07:57 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-spi

8 years agosf: Add support for MX66U51235F, MX66L1G45G, MT25QU02G, MT25QL02G
Radu Bacrau [Tue, 22 Nov 2016 00:27:19 +0000 (18:27 -0600)]
sf: Add support for MX66U51235F, MX66L1G45G, MT25QU02G, MT25QL02G

This commit adds support for the Macronix MX66U51235F,
MX66L1G45G and Micron MT25QU02G, MT25QL02G flash parts.

Signed-off-by: Radu Bacrau <dumitru.bacrau@intel.com>
Cc: Chin Liang See <clsee@altera.com>
Cc: Radu Bacrau <radu.bacrau@gmail.com>
[Update proper commit header and 80-line cut on body]
Reviewed-by: Jagan Teki <jagan@openedev.com>
8 years agoam57xx: Remove unused variable warnings
Tom Rini [Mon, 21 Nov 2016 19:07:58 +0000 (14:07 -0500)]
am57xx: Remove unused variable warnings

Starting with the changes to fix USB host on am57xx/am43xx we stopped
using usb_otg_ss1/related stuff and but we hadn't been enabling the
relevant options to cause the warnings until just recently.

Fixes: 55efadde7ede (ARM: AM57xx: AM43xx: Fix USB host)
Fixes: a48d687c575f (configs: am57xx: Enable download gadget)
Signed-off-by: Tom Rini <trini@konsulko.com>
8 years agofastboot: simplify the Kconfig logic
Yann E. MORIN [Sun, 13 Nov 2016 21:26:13 +0000 (22:26 +0100)]
fastboot: simplify the Kconfig logic

Currently, the fastboot item in menuconfig is a comment followed by a
boolean option withan empty prompt, followed by a menu:

        *** FASTBOOT ***
    [*]
          Fastboot support  --->

This is not "nice-looking" at all...

Change the logic to make the boolean option a "menuconfig" rather than a
mere "config", so that all dependent options gets groupped under a menu.
The layout is now:

        *** FASTBOOT ***
    [*] Fastboot support  --->

Signed-off-by: "Yann E. MORIN" <yann.morin.1998@free.fr>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
8 years agoARM: OMAP3_LOGIC: Update MTD Partition Table
Adam Ford [Sun, 13 Nov 2016 04:02:37 +0000 (22:02 -0600)]
ARM: OMAP3_LOGIC: Update MTD Partition Table

The previous partition table did not support a separate device tree
and the kernel size was limited to 4MB.  This update shows the
location of the device tree (labeled as spl-os) for those who
want to use Falcon Mode or use U-Boot to store the Flattened
Device Tree (FDT) to NAND without appending it to the kernel.

This also grows the kernel to 6MB since 4MB was becomming tight

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agoARM: OMAP3_LOGIC: Remove FIT Support
Adam Ford [Sun, 13 Nov 2016 03:53:31 +0000 (21:53 -0600)]
ARM: OMAP3_LOGIC: Remove FIT Support

Commit ("2cd1ff84037a: OMAP3_LOGIC: Setup defconfig to enable
SPL and NAND booting") accidentally enabled FIT support.

This patch removes the FIT support.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agoARM: OMAP3_LOGIC: Fix SPL Memory Map for Falcon Mode
Adam Ford [Sun, 13 Nov 2016 03:43:37 +0000 (21:43 -0600)]
ARM: OMAP3_LOGIC: Fix SPL Memory Map for Falcon Mode

The memory map defined in commit ("49c7303f0e52: OMAP3: Enable SPL
on omap3_logic) was used by a copy-paste of another board without
fully understanding how the map works in Falcon mode.  This patch
undoes the customization and uses the default SPL Memory Map
for OMAP3.

When building the uImage, set LOADADDR=0x82000000 and Falcon
mode should properly load.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agorpi: passthrough of the firmware provided FDT blob
Cédric Schieli [Fri, 11 Nov 2016 10:59:07 +0000 (11:59 +0100)]
rpi: passthrough of the firmware provided FDT blob

Raspberry firmware used to pass a FDT blob at a fixed address (0x100),
but this is not true anymore. The address now depends on both the
memory size and the blob size [1].

If one wants to passthrough this FDT blob to the kernel, the most
reliable way is to save its address from the r2/x0 register in the
U-Boot entry point and expose it in a environment variable for
further processing.

This patch just does this:
- save the provided address in the global variable fw_dtb_pointer
- expose it in ${fdt_addr} if it points to a a valid FDT blob

There are many different ways to use it. One can, for example, use
the following script which will extract from the tree the command
line built by the firmware, then hand over the blob to a previously
loaded kernel:

fdt addr ${fdt_addr}
fdt get value bootargs /chosen bootargs
bootz ${kernel_addr_r} - ${fdt_addr}

Alternatively, users relying on sysboot/pxe can simply omit any FDT
statement in their extlinux.conf file, U-Boot will automagically pick
${fdt_addr} and pass it to the kernel.

[1] https://www.raspberrypi.org/forums//viewtopic.php?f=107&t=134018

Signed-off-by: Cédric Schieli <cschieli@gmail.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
8 years agoarm: add save_boot_params for ARM1176
Cédric Schieli [Fri, 11 Nov 2016 10:59:06 +0000 (11:59 +0100)]
arm: add save_boot_params for ARM1176

Implement a hook to allow boards to save boot-time CPU state for later
use. When U-Boot is chain-loaded by another bootloader, CPU registers may
contain useful information such as system configuration information. This
feature mirrors the equivalent ARMv7 feature.

Signed-off-by: Cédric Schieli <cschieli@gmail.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
8 years agoimage: Combine image_sig_algo with image_sign_info
Andrew Duda [Tue, 8 Nov 2016 18:53:41 +0000 (18:53 +0000)]
image: Combine image_sig_algo with image_sign_info

Remove the need to explicitly add SHA/RSA pairings. Invalid SHA/RSA
pairings will still fail on verify operations when the hash length is
longer than the key length.

Follow the same naming scheme "checksum,crytpo" without explicitly
defining the string.

Indirectly adds support for "sha1,rsa4096" signing/verification.

Signed-off-by: Andrew Duda <aduda@meraki.com>
Signed-off-by: aduda <aduda@meraki.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agoimage: Add crypto_algo struct for RSA info
Andrew Duda [Tue, 8 Nov 2016 18:53:41 +0000 (18:53 +0000)]
image: Add crypto_algo struct for RSA info

Cut down on the repetition of algorithm information by defining separate
checksum and crypto structs. image_sig_algos are now simply pairs of
unique checksum and crypto algos.

Signed-off-by: Andrew Duda <aduda@meraki.com>
Signed-off-by: aduda <aduda@meraki.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agorsa: Verify RSA padding programatically
Andrew Duda [Tue, 8 Nov 2016 18:53:40 +0000 (18:53 +0000)]
rsa: Verify RSA padding programatically

Padding verification was done against static SHA/RSA pair arrays which
take up a lot of static memory, are mostly 0xff, and cannot be reused
for additional SHA/RSA pairings. The padding can be easily computed
according to PKCS#1v2.1 as:

  EM = 0x00 || 0x01 || PS || 0x00 || T

where PS is (emLen - tLen - 3) octets of 0xff and T is DER encoding
of the hash.

Store DER prefix in checksum_algo and create rsa_verify_padding
function to handle verification of a message for any SHA/RSA pairing.

Signed-off-by: Andrew Duda <aduda@meraki.com>
Signed-off-by: aduda <aduda@meraki.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agorsa: cosmetic: rename pad_len to key_len
Andrew Duda [Tue, 8 Nov 2016 18:53:39 +0000 (18:53 +0000)]
rsa: cosmetic: rename pad_len to key_len

checksum_algo's pad_len field isn't actually used to store the length of
the padding but the total length of the RSA key (msg_len + pad_len)

Signed-off-by: Andrew Duda <aduda@meraki.com>
Signed-off-by: aduda <aduda@meraki.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agoTI: Remove CONFIG_OMAP_COMMON in favor of CONFIG_ARCH_OMAP2
Tom Rini [Tue, 8 Nov 2016 02:34:55 +0000 (21:34 -0500)]
TI: Remove CONFIG_OMAP_COMMON in favor of CONFIG_ARCH_OMAP2

With the move to arch/arm/mach-omap2 there are now very few uses of
CONFIG_OMAP_COMMON and further they can all be replaced with
CONFIG_ARCH_OMAP2, so do so.

Signed-off-by: Tom Rini <trini@konsulko.com>
8 years agoarm: Introduce arch/arm/mach-omap2 for OMAP2 derivative platforms
Tom Rini [Tue, 8 Nov 2016 02:34:54 +0000 (21:34 -0500)]
arm: Introduce arch/arm/mach-omap2 for OMAP2 derivative platforms

This moves what was in arch/arm/cpu/armv7/omap-common in to
arch/arm/mach-omap2 and moves
arch/arm/cpu/armv7/{am33xx,omap3,omap4,omap5} in to arch/arm/mach-omap2
as subdirectories.  All refernces to the former locations are updated to
the current locations.  For the logic to decide what our outputs are,
consolidate the tests into a single config.mk rather than including 4.

Signed-off-by: Tom Rini <trini@konsulko.com>
8 years agoarm: Introduce ARCH_OMAP2
Tom Rini [Tue, 8 Nov 2016 02:34:53 +0000 (21:34 -0500)]
arm: Introduce ARCH_OMAP2

To start consolidating various TI-related code, introduce the ARCH_OMAP2
symbol.  While we have removed omap2-specific boards some time ago,
matching up with the kernel naming here will help overall.

Signed-off-by: Tom Rini <trini@konsulko.com>
8 years agofs-test.sh: Update expected results
Stefan Brüns [Sun, 6 Nov 2016 00:32:15 +0000 (01:32 +0100)]
fs-test.sh: Update expected results

After the latest changes, ext4 no longer has any fails.

Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
8 years agoext4: Allow reading files with non-zero offset, clamp read len
Stefan Brüns [Sun, 6 Nov 2016 17:33:57 +0000 (18:33 +0100)]
ext4: Allow reading files with non-zero offset, clamp read len

Support was already implemented, but not hooked up. This fixes several
fails in the test cases.

Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
8 years agoext4: Fix handling of sparse files
Stefan Brüns [Sat, 5 Nov 2016 21:17:14 +0000 (22:17 +0100)]
ext4: Fix handling of sparse files

A sparse file may have regions not mapped by any extents, at the start
or at the end of the file, or anywhere between, thus not finding a
matching extent region is never an error.

Found by python filesystem tests.

Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
8 years agotest/py: expose config and log as session scoped fixture
Stefan Brüns [Sat, 5 Nov 2016 16:45:32 +0000 (17:45 +0100)]
test/py: expose config and log as session scoped fixture

If a test uses a fixture which is expensive to setup, the fixture can
possibly created with session or module scope. As u_boot_console has
function scope, it can not be used in this case.

Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
8 years agogpio: dwapb: Add support for port B
Phil Edworthy [Thu, 3 Nov 2016 11:05:12 +0000 (11:05 +0000)]
gpio: dwapb: Add support for port B

The IP supports two ports, A and B, each providing up to 32 gpios.
The driver already creates a 2nd gpio bank by reading the 2nd node
from DT, so this is quite a simple change to support the 2nd bank.

Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Acked-by: Marek Vasut <marex@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agoarm: dra7xx: Unify Android partition table
Semen Protsenko [Mon, 31 Oct 2016 17:53:46 +0000 (19:53 +0200)]
arm: dra7xx: Unify Android partition table

Make Android partition table the same as for AM57x EVM.

  1. Make "bootloader" partition start from 0x300 sectors offset, so
     DRA7 is bootable in Android mode (see
     CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR option).
  2. Increase "bootloader" partition size, because size of u-boot.img is
     about 632 KiB (when building DT defconfig, with FIT image enabled).
  3. Specify "reserved" partition explicitly, rather than specifying
     "efs" partition start. Reserved area will be used to store U-Boot
     environment on eMMC. It's convenient to have it exposed explicitly
     so we can read/write U-Boot environment.
  4. Keep all Android partitions locations intact, by reducing
     "reserved" partition size. CONFIG_ENV_SIZE is considered.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
8 years agoarm: am57xx: Enable 8-bit eMMC access
Semen Protsenko [Mon, 31 Oct 2016 17:53:42 +0000 (19:53 +0200)]
arm: am57xx: Enable 8-bit eMMC access

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
8 years agoarm: am57xx: Define Android partition table
Semen Protsenko [Mon, 31 Oct 2016 17:53:38 +0000 (19:53 +0200)]
arm: am57xx: Define Android partition table

"fastboot oem format" command reuses "gpt write" command, which in turn
requires correct partitions defined in $partitions variable. This patch
adds such definition of Android partitions for DRA7XX EVM board.

By default $partitions variable contains Linux partition table. In order
to prepare Android environment one can run next commands from U-Boot
shell:

    => env set partitions $partitions_android
    => env save

After those operations one can go to fastboot mode and perform
"fastboot oem format" to create Android partition table.

While at it, enable CONFIG_RANDOM_UUID to spare user from providing
UUIDs for each partition manually.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
8 years agoomap3_beagle: use config_distro_bootcmd
Guillaume GARDET [Tue, 25 Oct 2016 16:50:32 +0000 (18:50 +0200)]
omap3_beagle: use config_distro_bootcmd

Add support for distro_bootcmd on MMC and fall back to prior
behavior if distro_bootcmd fails.

Tested on Beagleboad xM to boot GRUB2 (and then Linux kernel) in EFI mode
from MMC.

Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agoconfigs: am57xx: Enable fastboot
Semen Protsenko [Mon, 24 Oct 2016 15:41:13 +0000 (18:41 +0300)]
configs: am57xx: Enable fastboot

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agoconfigs: am57xx: Enable download gadget
Semen Protsenko [Mon, 24 Oct 2016 15:41:12 +0000 (18:41 +0300)]
configs: am57xx: Enable download gadget

Enable USB download gadget (needed for fastboot support) and all
dependencies.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agoti_omap5_common: Respect USB controller number in fastboot
Semen Protsenko [Mon, 24 Oct 2016 15:41:11 +0000 (18:41 +0300)]
ti_omap5_common: Respect USB controller number in fastboot

On "fastboot reboot-bootloader" we check "dofastboot" variable and do
"fastboot 0" command in U-Boot if it's 1. But there are boards which have
USB controller number other than 0, so it should be respected when
performing "fastboot" command.

This patch reuses CONFIG_FASTBOOT_USB_DEV option toprovide correct USB
controller number to "fastboot" command.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agofastboot: Add CONFIG_FASTBOOT_USB_DEV option
Semen Protsenko [Mon, 24 Oct 2016 15:41:10 +0000 (18:41 +0300)]
fastboot: Add CONFIG_FASTBOOT_USB_DEV option

Some boards (like AM57x EVM) has USB OTG controller other than 0. So in
order to use correct controller number in compiled environment we should
define CONFIG_FASTBOOT_USB_DEV option.

For example, when doing "fastboot reboot-bootloader" we want to enter
fastboot mode automatically. But to do so we need to provide controller
number to "fastboot" command. If this procedure is defined in some config
which is common to bunch of boards, and boards have different USB
controller numbers, we can't just hardcode "fastboot 0" in the
environment. We need to use configurable option, which this patch adds.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agoboard: ti: amx3xx: Remove multiple EEPROM reads
Lokesh Vutla [Fri, 14 Oct 2016 05:05:25 +0000 (10:35 +0530)]
board: ti: amx3xx: Remove multiple EEPROM reads

Detect the board very early and avoid reading eeprom multiple times.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agoARM: AMx3xx: Centralize early clock initialization
Lokesh Vutla [Fri, 14 Oct 2016 05:05:24 +0000 (10:35 +0530)]
ARM: AMx3xx: Centralize early clock initialization

This is similar to Commit 93e6253d11030 ("ARM: OMAP4/5: Centralize
early clock initialization") that was done for OMAP4+, reflecting the same
for AM33xx and AM43xx SoCs to centralize clock initialization.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Add setup_early_clocks that calls setup_clocks_for_console for
        ti81xx]
Signed-off-by: Tom Rini <trini@konsulko.com>
8 years agoarmv8/fsl-layerscape: Update CONFIG_LS2080A to CONFIG_FSL_LSCH3
Shengzhou Liu [Fri, 11 Nov 2016 10:11:05 +0000 (18:11 +0800)]
armv8/fsl-layerscape: Update CONFIG_LS2080A to CONFIG_FSL_LSCH3

Update CONFIG_LS2080A to CONFIG_FSL_LSCH3 to make those workaround
implementing of erratum reusable for more SoCs.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agoarmv8: fsl-layerscape: Add README for deploying QSPI image
Yuan Yao [Wed, 9 Nov 2016 03:50:46 +0000 (11:50 +0800)]
armv8: fsl-layerscape: Add README for deploying QSPI image

Signed-off-by: Yuan Yao <yao.yuan@nxp.com>
[YS: Reviese commit subject]
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agoarm: ls1021a: improve the core frequency to 1.2GHZ
Yuan Yao [Wed, 9 Nov 2016 03:19:54 +0000 (11:19 +0800)]
arm: ls1021a: improve the core frequency to 1.2GHZ

Change core clock to 1.2GHz in the configurations for SD and NAND boot.

Signed-off-by: Yuan Yao <yao.yuan@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agoarmv8: ls2080aqds: fix SGMII repeater settings
Shaohui Xie [Mon, 17 Oct 2016 08:20:48 +0000 (16:20 +0800)]
armv8: ls2080aqds: fix SGMII repeater settings

The current value to check whether the PHY was configured has dependency
on MC, it expects MC to start PCS AN, this is not true during boot up,
so it should be changed to remove the dependency.

The PHY's register space should be restore to default after accessing
extended space.

Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agofsl: serdes: fix a deadloop issue for P4080
Hou Zhiqiang [Mon, 31 Oct 2016 02:59:16 +0000 (10:59 +0800)]
fsl: serdes: fix a deadloop issue for P4080

This deadloop is introduced by commit:
71fe222 fsl: serdes: ensure accessing the initialized maps of serdes protocol

deadloop detail:
cpu_init_r => fsl_serdes_init => p4080_erratum_serdes_a005 =>
is_serdes_configured => fsl_serdes_init

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agopowerpc: mpc512x: Add support for get_svr() for mpc512x devices
Sriram Dash [Fri, 14 Oct 2016 06:33:50 +0000 (12:03 +0530)]
powerpc: mpc512x: Add support for get_svr() for mpc512x devices

Defines get_svr() for mpc512x devices

Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agodriver: net: ldpaa_eth: Fix missing bracket issue
Priyanka Jain [Thu, 3 Nov 2016 12:35:09 +0000 (18:05 +0530)]
driver: net: ldpaa_eth: Fix missing bracket issue

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agoarmv8: ls2080a: Update serdes protocol support
Priyanka Jain [Thu, 3 Nov 2016 12:20:51 +0000 (17:50 +0530)]
armv8: ls2080a: Update serdes protocol support

Add these serdes protocols
Serdes1: 0x39, 0x4B, 0x4C, 0x4D
Serdes2: 0x47, 0x57

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
[YS: Revise commit message]
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agoarmv8: ls1046aqds: add lpuart support
Shaohui Xie [Fri, 28 Oct 2016 06:24:02 +0000 (14:24 +0800)]
armv8: ls1046aqds: add lpuart support

LPUART0 is used by default, and it's using platform clock.

Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agolpuart: add a get_lpuart_clk function
Shaohui Xie [Fri, 28 Oct 2016 06:23:30 +0000 (14:23 +0800)]
lpuart: add a get_lpuart_clk function

It's not always true that LPUART clock is CONFIG_SYS_CLK_FREQ. This
patch provides a weak function get_lpuart_clk(), so that the clock
can be ovreridden on a specific board which uses different clock
for LPUART.

Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com>
[YS: Reformat commit message]
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agoarmv7: Add support of ls1021a-iot board
Feng Li [Thu, 3 Nov 2016 06:15:17 +0000 (14:15 +0800)]
armv7: Add support of ls1021a-iot board

The patch adds support for Freescale ls1021a-iot board.

Signed-off-by: Feng Li <feng.li_2@nxp.com>
[YS: rewrite commit message, fix whitespace in Kconfig]
Reviewed-by: York Sun <york.sun@nxp.com>