- Rename existing FSP code to fsp1
- Add fsp2 directory in preparation to support FSP 2.0
- Various x86 platform codes update
- Various bug fixes and updates in dm core, sandbox and spl
Tom Rini [Tue, 8 Oct 2019 22:43:56 +0000 (18:43 -0400)]
Merge tag 'u-boot-atmel-2020.01-a' of https://gitlab.denx.de/u-boot/custodians/u-boot-atmel
First set of u-boot-atmel features and fixes for 2020.01 cycle
The feature set includes support for two new boards from Microchip AT91:
The sama5d27_wlsom1_ek , an evaluation kit which includes the SAMA5D2
SOC packaged in a 256 MB LPDDR2 SIP, on a SOM including wireless, which
is placed on evaluation kit with sd-card, ethernet, LCD, Camera sensor,
QSPI, etc
The sam9x60ek, an evaluation kit for the new SoC based on ARM926j , the
SAM9X60 . The evaluation kit includes NAND flash, QSPI, Ethernet, Audio,
Camera sensor connector, etc.
The full support for sam9x60ek will come at a later time. There are
still missing bits regarding the clock support and power management
controller.
Tom Rini [Tue, 8 Oct 2019 22:37:19 +0000 (18:37 -0400)]
Merge branch '2019-10-08-master-imports'
- Python3 conversion of genboardscfg.py
- Resync Kconfiglib.py
- Switch to running CI on Ubuntu "bionic" to facilitate Python 3.6 being
the minimum we use and test.
Tom Rini [Fri, 4 Oct 2019 16:12:54 +0000 (12:12 -0400)]
gitlab-ci: Switch to Ubuntu 18.04 image
In order to run all filesystem tests we need to have newer ext4 tools,
move up to Ubuntu 18.04 'bionic' for our base. We need to change
slightly how we invoke the provided grub-mkimage. This will also make
future python3 work easier.
Tom Rini [Fri, 4 Oct 2019 16:12:53 +0000 (12:12 -0400)]
gitlab-ci: Have buildman use /tmp for output
When running as another user we might not be able to use '..' for
certain directories and this is the default for buildman. Specify an
output directory instead.
Tom Rini [Mon, 7 Oct 2019 21:17:36 +0000 (17:17 -0400)]
buildman: Perform tests in a temporary directory
We may not always be able to write to the default output directory so
have a temporary directory for our output be created.
Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Stephen Warren <swarren@wwwdotorg.org> Suggested-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Fri, 20 Sep 2019 21:42:09 +0000 (17:42 -0400)]
kconfiglib: Update to the 12.14.0 release
A large number of changes have happened upstream since our last sync
which was to 375506d. The reason to do the upgrade at this point is for
improved Python 3 support.
As part of this upgrade we need to update moveconfig.py and
genboardscfg.py the current API. This is:
- Change "kconfiglib.Config" calls to "kconfiglib.Kconfig"
- Change get_symbol() calls to syms.get().
- Change get_value() to str_value.
Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Fri, 20 Sep 2019 21:42:07 +0000 (17:42 -0400)]
genboardscfg.py: Convert to Python 3
Convert this tool to requiring Python 3. The bulk of this is done with
the 2to3 tool In addition, we need to use the '//' operator to have our
division result return an int rather than a float and ensure that we use
UTF-8 when reading/writing files.
Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Tom Rini <trini@konsulko.com>
The at91bootstrap, u-boot, u-boot env redundant, u-boot env,
device tree and kernel will reside in the QSPI nor flash.
The rootfs will reside in the NAND flash.
Cope with the offsets defined at:
https://www.at91.com/linux4sam/pub/Linux4SAM/SambaSubsections/demo_nandflash_map_lnx4sam6x.png
The environment starts at 0x140000 and it's of size 0x20000.
The device tree starts at 0x180000 and it's of size 0x80000.
The zImage starts at 0x200000 and it's of size 0x600000.
sama5's SFR has at offset 0x04 the DDR Configuration Register,
while sam9x60's SFR contains the EBI Chip Select Register. Add
a union to reconcile both boards.
Add new board SAM9X60-EK using the ARM926 SAM9X60 SoC.
Signed-off-by: Sandeep Sheriker Mallikarjun <sandeepsheriker.mallikarjun@microchip.com>
[tudor.ambarus@microchip.com:
- fix number of DRAM banks:
One DDR2-SDRAM (W972GG6KB 2 Gbit = 16 Mbit x 16 x 8 banks]
- drop SPL related macros
- drop memtest macros
- drop CONFIG_SPI_BOOT, CONFIG_SYS_USE_DATAFLASH related macros
- drop inclusion of asm/arch/at91sam9_smc.h] Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
add device tree files for sam9x60ek board with below changes.
- Add initial device nodes (pmc, pinctrl, sdhc, dbgu & pit)
- Add the reg property for the pinctrl node.
- Add the "u-boot,dm-pre-reloc" property to determine which nodes
are used by the board_init_f stage.
Signed-off-by: Sandeep Sheriker Mallikarjun <sandeepsheriker.mallikarjun@microchip.com>
[prasanthi.chellakumar@microchip.com: fix style/whitespace issues] Signed-off-by: Prasanthi Chellakumar <prasanthi.chellakumar@microchip.com>
[nicolas.ferre@microchip.com:
- fix gclk,
- fix pio/pinctrl controller definition and allow to have more
than only PIOA for this SoC,
- removing pinctrl address] Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
[claudiu.beznea@microchip.com:
- use SAM9X60's compatible for pinctrl
- add drive strength and slew rate options for SDMMC0 pins.] Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
[tudor.ambarus@microchip.com:
- u-boot,dm-pre-reloc property in dedicated file,
- fix pit len, starts from 0xFFFFFE40 and it is of len 0x10] Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Eugen Hristev [Mon, 26 Aug 2019 11:45:06 +0000 (11:45 +0000)]
ARM: dts: at91: sama5d27_wlsom1: add hlcdc node
Add node for hlcld for u-boot logo display at boot.
This is compatible with the Precision Design Associates (PDA) TM5000 screen.
Timings are compatible with simple panel from Linux, panel name is
pda_91_00156_a0
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Nicolas Ferre [Thu, 8 Aug 2019 07:48:26 +0000 (07:48 +0000)]
board: atmel: add sama5d27_wlsom1_ek board
Add support for the SAMA5D27-WLSOM1-EK. It's based on the Microchip
WireLess SoM which contains the SAMa5D27 LPDDR2 2Gbits SiP.
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
[eugen.hristev@microchip.com]: added u-boot specific dtsi and ported to 2019.10 Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Simon Glass [Wed, 25 Sep 2019 14:56:49 +0000 (08:56 -0600)]
x86: Use mtrr_commit() with FSP2
With FSP2 we use MTRRs in U-Boot proper even though the 32-bit init
happens in TPL. Enable this, using a variable to try to make the
conditions more palatable.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 25 Sep 2019 14:56:46 +0000 (08:56 -0600)]
x86: Add a function to set variable MTRRs
Normally U-Boot handles MTRRs through an add/commit process which
overwrites all MTRRs. But in very early boot it is not desirable to clear
the existing MTRRs since they may be in use and it can cause a hang.
Add a new mtrr_set_next_var() function which sets up the next available
MTRR to the required region.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: pass 'type' to set_var_mtrr() in mtrr_set_next_var()] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 25 Sep 2019 14:56:42 +0000 (08:56 -0600)]
sandbox: pci: Create a new sandbox_pci_read_bar() function
The code in swapcase can be used by other sandbox drivers. Move it into a
common place to allow this.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: remove inclusion of <asm/test.h> in pci_sandbox.c] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 25 Sep 2019 14:56:40 +0000 (08:56 -0600)]
x86: Add new common CPU functions for turbo/burst mode
Add a few more CPU functions that are common on Intel CPUs. Also add
attribution for the code source.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: add missing MSR_IA32_MISC_ENABLE write back in cpu_set_eist();
fix 2 typos in cpu_get_burst_mode_state() comments] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 25 Sep 2019 14:56:39 +0000 (08:56 -0600)]
x86: Tidy up some duplicate MSR defines
Some MSR registers are defined twice in different parts of the file. Move
them together and remove the duplicates. Also drop some thermal defines
which are not used.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 25 Sep 2019 14:56:38 +0000 (08:56 -0600)]
x86: Add common functions for TDP and perf control
These functions are the same on modern Intel CPUs, so use common code to
set them.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: return false instead of 0 in cpu_ivybridge_config_tdp_levels();
fix 'muiltiplier' and 'desgn' typos] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Sun, 1 Sep 2019 03:23:18 +0000 (21:23 -0600)]
x86: pci: Drop the first parameter in pci_x86_r/w_config()
This parameter is needed by the PCI driver-mode interface but is always
NULL on x86. There are a number of calls to this function so it makes
sense to minimise the parameters.
Adjust the x86 function to omit the first parameter, and introduce stub
functions to handle the conversion.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: rebase the patch against u-boot-x86/next to get it applied cleanly] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 25 Sep 2019 14:56:30 +0000 (08:56 -0600)]
spl: Allow distinguishing between two phases in U-Boot
U-Boot has two distinct phases: before and after relocation. These are
commonly referred to as F (running from Flash) and R (Relocated and
running from RAM). Some drivers want to do different things in these
phases so update the SPL phase function to return a different value for
each.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 25 Sep 2019 14:56:28 +0000 (08:56 -0600)]
spl: Convert CONFIG_SPL_SIZE_LIMIT to hex
This is currently a decimal value which is not as convenient or
meaningful. Also U-Boot tends to use hex everywhere.
Convert this option to hex and add a comment for the size_check macro.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Acked-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: correct the typo in the commit title] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 25 Sep 2019 14:56:27 +0000 (08:56 -0600)]
spl: Allow tiny printf() to be controlled in SPL and TPL
At present there is only one control for this and it is used for both SPL
and TPL. But SPL might have a lot more space than TPL so the extra cost of
a full printf() might be acceptable.
Split the option into two, providing separate SPL and TPL controls. The
TPL setting defaults to the same as SPL.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 25 Sep 2019 14:56:25 +0000 (08:56 -0600)]
iod: Enhance to support display of multiple values
At present the 'iod' command differs from 'md' in that it only shows a
single value. It is useful to see a dump of multiple values, particularly
when x86 peripherals contain register sets accessible via I/O ports.
Enhance the command to match md.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: correct multi-line comment format style] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 25 Sep 2019 14:56:23 +0000 (08:56 -0600)]
log: Add log_nop() to avoid unused-variable warnings
If a log statement includes a variable and logging is disabled, this can
generate warnings about unused variables. Add a bit more complexity to the
macros to avoid this for the common case.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 25 Sep 2019 14:56:22 +0000 (08:56 -0600)]
binman: Take account of skip-at-start with image-header
The image-header currently sets it offset assuming that skip-at-start is
zero. This does not work on x86 where offsets end at 4GB. Add in this
value so that the offset is correct.
Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 25 Sep 2019 14:56:21 +0000 (08:56 -0600)]
binman: Handle reading data for end-at-4gb sections
Some x86 sections have special offsets which currently result in empty
data being returned from the 'extract' command. Fix this by taking account
of the skip-at-start property.
Add a little more debugging while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 25 Sep 2019 14:56:20 +0000 (08:56 -0600)]
binman: Add a base implementation of Entry.ReadChildData()
At present this function is not present in the Entry base class so it is
hard to find the documentation for it. Move the docs from the section
class and expand it a little.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 16 Sep 2019 00:10:36 +0000 (18:10 -0600)]
binman: Allow verbose output with all commands
At present the verbose flag only works for the 'build' command. This is
not intended, nor is it useful. Update the code to support the verbose
flag and make use of a command exception handler.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: rebase the patch against u-boot-x86/next to get it applied cleanly] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 25 Sep 2019 14:56:18 +0000 (08:56 -0600)]
serial: ns16550: Add a PCI device/function field
When this UART is used early in boot (before PCI is set up) it is
convenient to store the PCI BDF of the UART so that it can be manually
configured. This is useful when it is used as a debug UART, for example.
Add a new field to hold this information, so that drivers can simply use
the existing platform data.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Sun, 15 Sep 2019 18:08:58 +0000 (12:08 -0600)]
dm: pci: Add a function to read a PCI BAR
At present PCI address transaction is not supported so drivers must
manually read the correct BAR after reading the device tree info. The
ns16550 has a suitable implementation, so move this code into the core
DM support.
Note that there is no live-tree equivalent at present.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: correct the unclear comments in test.dts] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 25 Sep 2019 14:56:16 +0000 (08:56 -0600)]
pci: Show a message if PCI autoconfig fails
At present this fails silently which can be confusing since some devices
on the PCI bus may not work correctly. Show a message in this case.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: add a '\n' in the PCI autoconfig fail message] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 25 Sep 2019 14:56:15 +0000 (08:56 -0600)]
pci: Add more debug detail when resources are exhausted
If PCI auto-config runs out of memory, show a few more details to help
diagnose the problem.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: change %x to %llx to avoid build warnings on some platforms] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 25 Sep 2019 14:56:13 +0000 (08:56 -0600)]
pci: Disable autoconfig in SPL
At present U-Boot runs autoconfig in SPL but this is best left to U-Boot
proper. For TPL and SPL we can normally used fixed BARs and save code size
and time.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Sat, 31 Aug 2019 23:59:32 +0000 (17:59 -0600)]
pci: sandbox: Probe PCI emulation devices when used
At present PCI emulation devices are not probed before use, since they
used to be children of the device that used them, and children cannot be
probed before their parents.
Now that PCI emulation devices are attached to the root node, we can
simply probe them, and avoid using the internal function.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: rebase the patch against u-boot-x86/next to get it applied cleanly] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
In this case the emulation device is attached to pci device on address
f800 (device 1f, function 0) and provides the swap-case functionality.
However this is not ideal, since every device on a PCI bus has a child
device. This is only really the case for sandbox, but we want to avoid
special-case code for sandbox.
Worse, child devices cannot be probed before their parents. This forces
us to use 'find' rather than 'get' to obtain the emulator device. In fact
the emulator devices are never probed. There is code in
sandbox_pci_emul_post_probe() which tries to track when emulators are
active, but at present this does not work.
A better approach seems to be to add a separate node elsewhere in the
device tree, an 'emulation parent'. This could be given a bogus address
(such as -1) to hide the emulators away from the 'pci' command, but it
seems better to keep it at the root node to avoid such hacks.
Then we can use a phandle to point from the device to the correct
emulator, and only on sandbox. The code to find an emulator does not
interfere with normal pci operation.
Add a new UCLASS_PCI_EMUL_PARENT uclass which allows finding an emulator
given a bus, and finding a bus given an emulator. Update the existing
device trees and the code for finding an emulator.
This brings PCI emulators more into line with I2C.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: fix 3 typos in the commit message;
encode bus number in the labels of swap_case_emul nodes;
mention commit 4345998ae9df in sandbox_pci_get_emul()] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 25 Sep 2019 14:56:09 +0000 (08:56 -0600)]
sandbox: Allow use of real I/O with readl(), etc.
At present these functions are stubbed out. For more comprehensive testing
with PCI devices it is useful to be able to fully emulate I/O access. Add
simple implementations for these.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: change to use 'const void *' in sandbox_write();
cast 'addr' in read/write macros in arch/sandbox/include/asm/io.h;
remove the unnecessary cast in readq/writeq in nvme.h] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 25 Sep 2019 14:56:07 +0000 (08:56 -0600)]
sandbox: Add a -T flag to use the test device tree
U-Boot already supports using -D to indicate that it should use the normal
device tree. It is sometimes useful to run with the test device tree, e.g.
when running a test. Add a -T option for this along with some
documentation.
It can be used like this:
/tmp/b/sandbox/u-boot -T -c "ut dm pci_busdev"
(this will use /tmp/b/sandbox/arch/sandbox/dts/test.dtb as the DT)
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 25 Sep 2019 14:56:00 +0000 (08:56 -0600)]
sandbox: mmc: Fix up MMC emulator for valgrind
At present running sandbox with valgrind produces some warnings due to the
MMC emulator not filling in all the expected fields. Fix it.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: use sizeof() instead of hardcoded 16] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 25 Sep 2019 14:55:59 +0000 (08:55 -0600)]
sandbox: spmi: Add ranges property for address translation
At present address translation does not work since there is no ranges
property in the spmi nodes. Add empty ranges properties and a little more
logging so that this shows the error:
Simon Glass [Wed, 25 Sep 2019 14:55:57 +0000 (08:55 -0600)]
dm: test: Correct a stray backslash in dm_test_destroy()
This should perhaps be a period.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: add the ending period and reword the commit message] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 25 Sep 2019 14:55:53 +0000 (08:55 -0600)]
dm: core: Call ofdata_to_platdata() with of-platdata
At present this function is never called when of-platdata is enabled since
we never have a device tree. However, this function is responsible for
copying over the of-platdata, so we must call it. Otherwise the probe()
method would have to be used.
Correct this and fix the sandbox serial driver to not read from the device
tree and try to write to what is read-only platdata on some platforms.
Fixes: 396e343b3d (dm: core: Allow binding a device from a live tree) Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 25 Sep 2019 14:55:52 +0000 (08:55 -0600)]
dm: test: Don't fail when tests are skipped due to build
At present tests that are marked as only for livetree fail when executed
on sandbox_flattree. They cannot actually be executed, but we should not
resport them as 'not found', since this causes errors. Instead, they
should be silently skipped.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 25 Sep 2019 14:55:51 +0000 (08:55 -0600)]
dm: test: Fix running of multiple test from command line
At present when multiple 'ut dm' commands are executed, all but the first
is run with a flat tree, even if live tree is enabled. This is because the
live tree node pointer is set to NULL and never restored.
This does not affect normal test running, which just runs all the test in
one go, but can be confusing when several individual tests are run during
the same U-Boot run.
Correct this by restoring the pointer.
Fixes: c166c47ba3 (dm: test: Add support for running tests with livetree) Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 25 Sep 2019 14:55:48 +0000 (08:55 -0600)]
dm: core: Add documentation on how to debug driver model
Sometimes devices don't appear and it can be confusing. Add a few notes to
help with this situation.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: fix 2 issues in the doc and include the doc in the index.rst] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 25 Sep 2019 14:55:47 +0000 (08:55 -0600)]
dm: core: Drop a few early returns
Two functions in this file return early for no good reason. Adjust the
code to match the standard DM style of returning 0 at the end of the
function on success.
Oddly enough this save 12 bytes of code size on ARM.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 25 Sep 2019 14:11:47 +0000 (08:11 -0600)]
x86: Rename turbo ratio MSR to MSR_TURBO_RATIO_LIMIT
This MSR number is used on most modern Intel processors, so drop the
confusing NHM prefix (which might mean Nehalem).
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: drop MSR_IVT_TURBO_RATIO_LIMIT as no code uses it] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
projects / u-boot.git / log
