Tom Rini [Mon, 24 Nov 2014 16:50:46 +0000 (11:50 -0500)]
fs/ext4/ext4fs.c, fs/fs.c fs/fat/fat_write.c: Adjust 64bit math methods
The changes to introduce loff_t into filesize means that we need to do
64bit math on 32bit platforms. Make sure we use the right wrappers for
these operations.
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Suriyan Ramasami <suriyan.r@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@ti.com> Tested-by: Pierre Aubert <p.aubert@staubli.com>
Hans de Goede [Fri, 28 Nov 2014 13:23:51 +0000 (14:23 +0100)]
fdt: Fix regression in fdt_pack_reg()
After commit 933cdbb479: "fdt: Try to use fdt_address_cells()/fdt_size_cells()"
I noticed that allwinner boards would no longer boot.
Switching to fdt_address_cells / fdt_size_cells changes the result from
bytes to 32 bit words, so when we increment pointers into the blob, we must
do so by 32 bit words now.
This commit makes allwinner boards boot again.
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Tested-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Stefan Roese <sr@denx.de> Tested-by: Vince Hsu <vinceh@nvidia.com>
Masahiro Yamada [Wed, 26 Nov 2014 09:34:01 +0000 (18:34 +0900)]
usb: UniPhier: support OF configuration
If CONFIG_OF_CONTROL is defined, search device tree nodes that are
compatible with "panasonic,uniphier-ehci" and take the base address
from their "reg" property.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Marek Vasut <marex@denx.de>
Masahiro Yamada [Wed, 26 Nov 2014 09:33:58 +0000 (18:33 +0900)]
ARM: UniPhier: add dummy gpio.h to enable CONFIG_OF_CONTROL
If CONFIG_OF_CONTROL is enabled, lib/fdtdec.c is compiled.
It includes <asm/gpio.h> and then <asm/gpio.h> includes
<asm/arch/gpio.h>. Consequently, all the SoCs that enable
CONFIG_OF_CONTROL must have <asm/arch/gpio.h> even if they do not
support GPIO.
In the first place, GPIO has nothing to do with OF_CONTROL.
It is wrong that lib/fdtdec.c includes GPIO functions; it should
be split into two files, FDT-common things and GPIO things.
It is, however, a pretty big work to fix that correctly.
This is a compromised commit to add a dummy <asm/arch/gpio.h>
to support OF_CONTROL for UniPhier platform. This dummy header
will be removed after FDT-GPIO stuff is fixed correctly.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Reviewed-by: Simon Glass <sjg@chromium.org>
The initramfs is currently only relocated if the user calls
the bootm ramdisk subcommand. If bootm should be used without
subcommands, the arch-specific bootm code needs to implement
the relocation.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
To get correct stack walking and backtrace functionality in gdb,
registers fp and ra should be initialized before calling board_init_f
or board_init_r. Thus allocating stack space and zeroing it as it is
currently done in board.c becomes obsolete.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Marek Vasut [Sat, 11 Oct 2014 16:42:52 +0000 (18:42 +0200)]
mtd: nand: s3c: Unify the register definition and naming
Merge struct s3c2410_nand and struct s3c2440_nand into one unified
struct s3c24x0_nand. While at it, fix up and rename the functions
to retrieve the NAND base address and fix up the s3c NAND driver to
reflect this change.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Kyungmin Park <kyungmin.park@samsung.com> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Vladimir Zapolskiy <vz@mleia.com>
Sanchayan Maity [Mon, 24 Nov 2014 05:33:59 +0000 (11:03 +0530)]
mtd/nand/vf610_nfc: Disable subpage writes
This patch disables subpage writes for vf610_nfc nand
driver. This is required, as without this fix, writing
unaligned u-boot images with DFU results in a hang.
Trying to write unalgined binary images also results
in a hang, without disabling subpage writes.
Masahiro Yamada [Thu, 13 Nov 2014 11:31:51 +0000 (20:31 +0900)]
mtd: denali: set some registers after nand_scan_ident()
Some but not all of implementations of the Denali NAND controller
have hardware circuits to detect the device parameters such as
page_size, erase_size, etc. Even on those SoCs with such hardware
supported, the hardware is known to detect wrong parameters for some
nasty (almost buggy) NAND devices. The device parameters detected
during nand_scan_ident() are more trustworthy.
This commit sets some hardware registers to mtd->pagesize,
mtd->oobsize, etc. in the code between nand_scan_ident() and
nand_scan_tail().
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Chin Liang See <clsee@altera.com>
Masahiro Yamada [Thu, 13 Nov 2014 11:31:50 +0000 (20:31 +0900)]
mtd: denali: use CONFIG_SYS_NAND_SELF_INIT
Some variants of the Denali NAND controller need some registers
set up based on the device information that has been detected during
nand_scan_ident().
CONFIG_SYS_NAND_SELF_INIT has to be defined to insert code between
nand_scan_ident() and nand_scan_tail(). It is also helpful to reduce
the difference between this driver and its Linux counterpart because
this driver was ported from Linux. Moreover, doc/README.nand recommends
to use CONFIG_SYS_NAND_SELF_INIT.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Chin Liang See <clsee@altera.com>
Simon Glass [Sat, 15 Nov 2014 03:56:42 +0000 (20:56 -0700)]
bios_emulator: Add an option to enable debugging
At present there are DEBUG options spread around the place. If you enable
one and not another you can end up with an emulator that does not work,
since each file can have a different view of what the registers look like.
To fix this, create a global CONFIG_X86EMU_DEBUG option that keeps
everything consistent.
Simon Glass [Sat, 15 Nov 2014 03:56:40 +0000 (20:56 -0700)]
bios_emulator: Add vesa support and allow ROMs to be passed in as data
As well as locating the ROM on the PCI bus, allow the ROM to be supplied to
the emulator. Split the init up a little so that callers can supply their
own interrupt routines. Also allow a vesa mode to be provided, to be
selected once the BIOS run is complete.
Simon Glass [Sat, 15 Nov 2014 03:56:39 +0000 (20:56 -0700)]
bios_emulator: Allow x86 to use the emulator
There is an implicit assumption that x86 machines want to use raw I/O in the
BIOS emulator, but this should be selectable. Add an CONFIG_X86EMU_RAW_IO
option to control it instead.
Also fix a few bugs which cause warnings on x86 and adjust the Makefile to
remove the assumption that only PowerPC uses the emulator.
Simon Glass [Sat, 15 Nov 2014 03:56:36 +0000 (20:56 -0700)]
x86: Add initial video device init for Intel GMA
Intel's Graphics Media Accelerator (GMA) is a generic name for a wide range
of video devices. Add code to set up the hardware on ivybridge. Part of the
init happens in native code, part of it happens in a 16-bit option ROM for
those nostalgic for the 1970s.
Simon Glass [Sat, 15 Nov 2014 03:56:35 +0000 (20:56 -0700)]
x86: Allow an option ROM to be built into U-Boot
Some x86 machines require a binary blob containing 16-bit initialisation
code for their video hardware. Allow this to be built into the x86 ROM so
that it is accessible during boot.
Simon Glass [Sat, 15 Nov 2014 03:56:33 +0000 (20:56 -0700)]
pci: Add general support for execution of video ROMs
Some platforms don't have native code for dealing with their video
hardware. In some cases they use a binary blob to set it up and perform
required actions like setting the video mode. This approach is a hangover
from the old PC days where a ROM was provided and executed during startup.
Even now, these ROMs are supplied as a way to set up video. It avoids the
code for every video chip needing to be provided in the boot loader. But
it makes the video much less flexible - e.g. it is not possible to do
anything else while the video init is happening (including waiting hundreds
of milliseconds for display panels to start up).
In any case, to deal with this sad state of affairs, provide an API for
execution of x86 video ROMs, either natively or through emulation.
Simon Glass [Sat, 15 Nov 2014 03:56:32 +0000 (20:56 -0700)]
x86: Add support for running option ROMs natively
On x86 machines we can use an emulator to run option ROMS as with other
architectures. But with some additional effort (mostly due to the 16-bit
nature of option ROMs) we can run them natively. Add support for this.
Bin Meng [Thu, 20 Nov 2014 08:11:16 +0000 (16:11 +0800)]
x86: Refactor interrupt_init()
Rename interrupt_init() in arch/x86/lib/pcat_interrupts.c to
i8259_init() and create a new interrupt_init() in
arch/x86/cpu/interrupt.c to call i8259_init() followed by a
call to cpu_init_interrupts().
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
Bin Meng [Thu, 20 Nov 2014 08:10:49 +0000 (16:10 +0800)]
x86: Call cpu_init_interrupts() from interrupt_init()
Currently cpu_init_interrupts() is called from cpu_init_r() to
setup the interrupt and exception of the cpu core, but at that
time the i8259 has not been initialized to mask all the irqs
and remap the master i8259 interrupt vector base, so the whole
system is at risk of being interrupted, and if interrupted,
wrong interrupt/exception message is shown.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sat, 15 Nov 2014 01:18:36 +0000 (18:18 -0700)]
x86: dts: Move PCI peripherals into a pci node
These peripherals should not be at the top level, since they exist inside
the PCI bus. We don't have a full device tree node for pci yet, but we
should at least put it at the right level.
Simon Glass [Sat, 15 Nov 2014 01:18:30 +0000 (18:18 -0700)]
pci: Add functions to read and write a BAR address
Some PCI functions cannot be auto-configured. Add a function to set up a
fixed BAR which can be used in these situations. Also add a function to read
the current address of a BAR.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Sat, 15 Nov 2014 01:18:29 +0000 (18:18 -0700)]
x86: config: Enable plug-and-play for link PCI
Enable this option so that we can configure the available PCI devices. Also
make sure that PCI is available early after relocation as we use it for
several other subsystems.
Simon Glass [Sat, 15 Nov 2014 01:18:25 +0000 (18:18 -0700)]
x86: Factor out common values in the link script
Define the reset base in config.mk so that it does not need to be calculated
twice in the link script. Also tidy up the START_16 and RESET_VEC_LOC values
to fit with this new approach.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Sat, 15 Nov 2014 01:18:24 +0000 (18:18 -0700)]
x86: Ensure that all relocation data is included in the image
Some toolchains put the relocation data into separate sections. Adjust the
linker script to catch this case. Without relocation data, U-Boot will not
boot.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Sat, 15 Nov 2014 01:18:19 +0000 (18:18 -0700)]
Align embedded device tree correctly
Device trees must be aligned to a 4-byte boundary. This was dropped in the
Kbuild conversion. Bring it back, and use 16-byte alignment for good
measure.
Hans de Goede [Sat, 15 Nov 2014 22:19:42 +0000 (23:19 +0100)]
sun6i: Drop some "unknown magic" from dram init
Allwinner tells us that this bit of code is the rtc ram being used to detect
coming out of "super-standby" mode, and if that is the case, going out of
self-refresh mode.
Since we do not support "super-standby" mode, this can be dropped.
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Fri, 14 Nov 2014 15:27:07 +0000 (16:27 +0100)]
sunxi: ahci: Add a delay after enabling target power
If the target power is connected through a gpio, then give the target some
time to power up before continuing with ahci / sata probing, this avoids
link timeouts, without penalizing other boards where there is no target
power gpio.
Why 500 ms ? I started with 200, that was not enough, then I went to 500 which
worked, lowering it to 350 broke things again, so 500 seems the minimum my
vertex2 needs to be ready to get probed.
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
Luc Verhaegen [Wed, 13 Aug 2014 05:55:07 +0000 (07:55 +0200)]
sunxi: video: Add simplefb support
Add simplefb support, note this depends on the kernel having support for
the clocks property which has recently been added to the simplefb devicetree
binding.
Signed-off-by: Luc Verhaegen <libv@skynet.be>
[hdegoede@redhat.com: Use pre-populated simplefb node under /chosen as
disussed on the devicetree list] Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>.
Hans de Goede [Mon, 17 Nov 2014 14:29:11 +0000 (15:29 +0100)]
fdt_support: Add a fdt_setup_simplefb_node helper function
Add a generic helper to fill and enable simplefb nodes.
The first user of this will be the sunxi display code.
lcd_dt_simplefb_configure_node is also a good candidate to be converted
to use this, but that requires someone to run some tests first, as
lcd_dt_simplefb_configure_node does not honor #address-cells and #size-cells,
but simply assumes 1 and 1 for both.
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Tested-by: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Simon Glass <sjg@chromium.org>
Hans de Goede [Fri, 14 Nov 2014 16:42:14 +0000 (17:42 +0100)]
sunxi: video: Add sun6i support
Besided needing the usual sun6i specific ahb1_reset bits poking, it turns out
that sun6i also needs the drc to be taken out of reset and clocked even though
it is in pass-through mode.
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Anatolij Gustschin <agust@denx.de>
projects / u-boot.git / log
