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4 years agovideo: Correctly handle multiple framebuffers
Simon Glass [Fri, 3 Jul 2020 03:12:32 +0000 (21:12 -0600)]
video: Correctly handle multiple framebuffers

At present video_bottom is set to the bottom of each framebuffer when it
is allocated. This is not correct, since it should hold the bottom of the
entire area available for framebuffers.

Fix this by adding a private address in the uclass which keeps track of
the next available spot for a framebuffer.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: fsp: video: Allocate a frame buffer when needed
Simon Glass [Fri, 3 Jul 2020 03:12:31 +0000 (21:12 -0600)]
x86: fsp: video: Allocate a frame buffer when needed

When the copy framebuffer is in use, we must also have the standard U-Boot
framebuffer available. Update the FSP driver to support this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
4 years agovideo: pci: Set up the copy framebuffer
Simon Glass [Fri, 3 Jul 2020 03:12:30 +0000 (21:12 -0600)]
video: pci: Set up the copy framebuffer

When using a copy framebuffer we need to tell the video subsystem its
address. U-Boot's normally allocated framebuffer is used as the working
buffer, but nothing is displayed until it is copied to the copy
framebuffer.

For this to work the video driver must request that a framebuffer be
allocated separately from the hardware framebuffer, so add a check for
that.

Also add a log category so that logging appears correctly.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
4 years agovideo: sandbox: Add support for the copy framebuffer
Simon Glass [Fri, 3 Jul 2020 03:12:29 +0000 (21:12 -0600)]
video: sandbox: Add support for the copy framebuffer

Enable this feature on sandbox by updating the SDL driver to have two
framebuffers.

Update the video tests to check that the copy framebuffer is kept in sync.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
4 years agovideo: Add comments to struct sandbox_sdl_plat
Simon Glass [Fri, 3 Jul 2020 03:12:28 +0000 (21:12 -0600)]
video: Add comments to struct sandbox_sdl_plat

This struct is not commented but needs it. Also fix the comment in
check_vidconsole_output() about the encoding for the rotation value.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
4 years agovideo: Update the copy framebuffer when writing bitmaps
Simon Glass [Fri, 3 Jul 2020 03:12:27 +0000 (21:12 -0600)]
video: Update the copy framebuffer when writing bitmaps

Adjust the bitmap code to sync to the copy framebuffer when done.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
4 years agovideo: Update rotated console to support copy buffer
Simon Glass [Fri, 3 Jul 2020 03:12:26 +0000 (21:12 -0600)]
video: Update rotated console to support copy buffer

Update the implementation to keep a track of what it changes in the frame
buffer and then tell the copy buffer about it. Use the special
vidconsole_memmove() helper so that memmove() operations are also
reflected in the copy buffer.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
4 years agovideo: Update truetype console to support copy buffer
Simon Glass [Fri, 3 Jul 2020 03:12:25 +0000 (21:12 -0600)]
video: Update truetype console to support copy buffer

Update the implementation to keep a track of what it changes in the frame
buffer and then tell the copy buffer about it. Use the special
vidconsole_memmove() helper so that memmove() operations are also
reflected in the copy buffer.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
4 years agovideo: Update normal console to support copy buffer
Simon Glass [Fri, 3 Jul 2020 03:12:24 +0000 (21:12 -0600)]
video: Update normal console to support copy buffer

Update the implementation to keep a track of what it changes in the frame
buffer and then tell the copy buffer about it. Use the special
vidconsole_memmove() helper so that memmove() operations are also
reflected in the copy buffer.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
4 years agovideo: Add helpers for vidconsole for the copy framebuffer
Simon Glass [Fri, 3 Jul 2020 03:12:23 +0000 (21:12 -0600)]
video: Add helpers for vidconsole for the copy framebuffer

Add a convenience function to call video_sync_copy() for a vidconsole.
Also add a memmove() helper, which does the memmove() as well as the sync.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
4 years agovideo: Clear the copy framebuffer when clearing the screen
Simon Glass [Fri, 3 Jul 2020 03:12:22 +0000 (21:12 -0600)]
video: Clear the copy framebuffer when clearing the screen

Update video_clear() to also sync to the copy framebuffer.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
4 years agovideo: Set up the copy framebuffer when enabled
Simon Glass [Fri, 3 Jul 2020 03:12:21 +0000 (21:12 -0600)]
video: Set up the copy framebuffer when enabled

This framebuffer is separately mapped. Update the video post-probe
function to set this up.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
4 years agovideo: Add support for copying to a hardware framebuffer
Simon Glass [Fri, 3 Jul 2020 03:12:20 +0000 (21:12 -0600)]
video: Add support for copying to a hardware framebuffer

Some architectures use a cached framebuffer and flush the cache as needed
so that changes are visible. This is supported by U-Boot.

However x86 uses an uncached framebuffer with a 'write-combining' feature
to speed up writes.  Reads are permitted but they are extremely expensive.

Unfortunately, reading from the frame buffer is quite common, e.g. to
scroll it. This makes scrolling very slow.

Add a new feature which supports copying modified parts of the frame
buffer to the uncached hardware buffer. This speeds up scrolling by at
least 10x on x86 so the extra complexity cost seems worth it.

As a starting point, add the Kconfig, update the video structures to keep
track of the buffer and add a function to do the copy.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
4 years agovideo: Add a comment for struct video_uc_platdata
Simon Glass [Fri, 3 Jul 2020 03:12:19 +0000 (21:12 -0600)]
video: Add a comment for struct video_uc_platdata

Add a few notes to explain the purpose of each member of this struct.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agovideo: Drop unnecessary #ifdef around vid_console_color()
Simon Glass [Fri, 3 Jul 2020 03:12:18 +0000 (21:12 -0600)]
video: Drop unnecessary #ifdef around vid_console_color()

All of the functions in this file only apply if DM_VIDEO is enabled. Drop
the #ifdef as it just clutters things up. Add the needed forward
declaration.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agovideo: Adjust rotated console to start at right edge
Simon Glass [Fri, 3 Jul 2020 03:12:17 +0000 (21:12 -0600)]
video: Adjust rotated console to start at right edge

At present when the console is rotated 180 degrees it starts almost a
whole character to the left of the right edge (typically 7 pixels with
an 8-pixel-wide font). On a display which aligns with the font width,
this just wastes space. On a display that does not this can result in
x_frac going negative for the final character (the one on the left
side) and the overflow -EAGAIN check at the start of the function
failing.

Change the function to start at the rightmost pixel to fix these
problems.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
4 years agovideo: Split out expression parts into variables
Simon Glass [Fri, 3 Jul 2020 03:12:16 +0000 (21:12 -0600)]
video: Split out expression parts into variables

The functions in this file do similar things but not always in the same
way. To make the code easier to read and compare, use a separate 'linenum'
variable in every function. This is then multiplied by the line length to
get the offset within the frame buffer to modify. Also use an 'x' variable
to hold the pixel position within that line. This is multipled by the
pixel size and added to the offset.

Also move the pbytes declaration up a little with the other long lines.

A side effect of splitting out these variables is that they are promoted
to int, i.e. a signed type, from the unsigned short used in the
vidconsole_priv struct. This would be necessary should any of the
variables go negative. At present this can actually happen in
console_putc_xy_2(), if the display width is not a multiple of the
character size (see next patch).

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
4 years agosandbox: video: Allow selection of rotated console
Simon Glass [Fri, 3 Jul 2020 03:12:15 +0000 (21:12 -0600)]
sandbox: video: Allow selection of rotated console

Add a devicetree property to select a rotated console. This uses the same
encoding as vidconsole itself: 0=normal; 1=90 degrees clockwise, 2=upside
down, 3=90 degrees anticlockwise.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
4 years agovideo: Show an error when a vidconsole function fails
Simon Glass [Fri, 3 Jul 2020 03:12:14 +0000 (21:12 -0600)]
video: Show an error when a vidconsole function fails

At present these functions fail silently even when debugging, which is not
very helpful. Add a way to print a message to the serial output when an
error is detected.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agoconsole: Add a way to output to serial only
Simon Glass [Fri, 3 Jul 2020 03:12:13 +0000 (21:12 -0600)]
console: Add a way to output to serial only

In the video drivers it is useful to print errors while debugging but
doing so risks an infinite loop as the debugging info itself may go
through the video drivers.

Add a new console function that prints information only to the serial
device, thus making it safe for use in debugging.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agox86: fsp: Reinit the FPU after FSP meminit
Simon Glass [Fri, 3 Jul 2020 03:12:12 +0000 (21:12 -0600)]
x86: fsp: Reinit the FPU after FSP meminit

The APL FSP appears to leave the FPU in a bad state in that it has
registers in use. This causes an error when the next FPU operation is
performed.

Work around this by re-resetting the FPU after calling FSP-M. This allows
the freetype console to work correctly.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agoMerge branch '2020-07-08-misc-features-and-fixes'
Tom Rini [Thu, 9 Jul 2020 00:20:24 +0000 (20:20 -0400)]
Merge branch '2020-07-08-misc-features-and-fixes'

- mem cmd improvements
- TPM fixes
- SPL/NAND/FIT fixes
- RSA improvements

4 years agolib: rsa: function to verify a signature against a hash
Heiko Stuebner [Fri, 22 May 2020 14:20:33 +0000 (16:20 +0200)]
lib: rsa: function to verify a signature against a hash

rsa_verify() expects a memory region and wants to do the hashing itself,
but there may be cases where the hashing is done via other means,
like hashing a squashfs rootfs.

So add rsa_verify_hash() to allow verifiying a signature against
an existing hash. As this entails the same verification routines
we can just move the relevant code over from rsa_verify() and also
call rsa_verify_hash() from there.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
4 years agocmd: Add a memory-search command
Simon Glass [Wed, 3 Jun 2020 01:26:49 +0000 (19:26 -0600)]
cmd: Add a memory-search command

It is useful to be able to find hex values and strings in a memory range.
Add a command to support this.

cmd: Fix 'md' and add a memory-search command
At present 'md.q' is broken. This series provides a fix for this. It also
implements a new memory-search command called 'ms'. It allows searching
memory for hex and string data.
END

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agocommand: Drop #ifdef for MEM_SUPPORT_64BIT_DATA
Simon Glass [Wed, 3 Jun 2020 01:26:48 +0000 (19:26 -0600)]
command: Drop #ifdef for MEM_SUPPORT_64BIT_DATA

This is defined only when __lp64__ is defined. That means that ulong is
64 bits long. Therefore we don't need to use a separate u64 type on those
architectures.

Fix up the code to take advantage of that, removing the preprocessor
conditions.

Also include the header file that defines MEM_SUPPORT_64BIT_DATA. It is
included by env.h in this file, but that might not last forever.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agodisplay_options: Drop #ifdef for MEM_SUPPORT_64BIT_DATA
Simon Glass [Wed, 3 Jun 2020 01:26:47 +0000 (19:26 -0600)]
display_options: Drop #ifdef for MEM_SUPPORT_64BIT_DATA

This is defined only when __lp64__ is defined. That means that ulong is
64 bits long. Therefore we don't need to use a separate u64 type on those
architectures.

Fix up the code to take advantage of that, removing the preprocessor
conditions.

Also include the missing header file that defines MEM_SUPPORT_64BIT_DATA

Fixes: 09140113108 ("command: Remove the cmd_tbl_t typedef")
Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agocmd: mem: Drop #ifdef for MEM_SUPPORT_64BIT_DATA
Simon Glass [Wed, 3 Jun 2020 01:26:46 +0000 (19:26 -0600)]
cmd: mem: Drop #ifdef for MEM_SUPPORT_64BIT_DATA

This is defined only when __lp64__ is defined. That means that ulong is
64 bits long. Therefore we don't need to use a separate u64 type on those
architectures.

Fix up the code to take advantage of that, removing the preprocessor
conditions.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
4 years agocmd: mem: Use a macro to avoid #ifdef in help
Simon Glass [Wed, 3 Jun 2020 01:26:45 +0000 (19:26 -0600)]
cmd: mem: Use a macro to avoid #ifdef in help

It is a bit painful to have #ifdefs in the middle of the help for each
command. Add a macro to avoid this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
4 years agoUpdate MEM_SUPPORT_64BIT_DATA to be always defined
Simon Glass [Wed, 3 Jun 2020 01:26:44 +0000 (19:26 -0600)]
Update MEM_SUPPORT_64BIT_DATA to be always defined

Define this macro always so we don't need the preprocessor to check it.
Convert the users to #if instead of #ifdef.

Note that '#if MEM_SUPPORT_64BIT_DATA' does not give an error if the
macro is not define. It just assumes zero.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
4 years agospl: fit: improve spl_nand_fit_read(...) readability
Dario Binacchi [Wed, 27 May 2020 11:56:21 +0000 (13:56 +0200)]
spl: fit: improve spl_nand_fit_read(...) readability

Replacing the ret variable with err and handling first the error
condition about the value returned by the spl_nand_fit_read routine,
improves the code readability.
Furthermore, the 'else' int the 'else return ret' instruction was
useless.

cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dariobin@libero.it>
4 years agospl: fit: nand: fix fit loading in case of bad blocks
Dario Binacchi [Wed, 27 May 2020 11:56:20 +0000 (13:56 +0200)]
spl: fit: nand: fix fit loading in case of bad blocks

The offset at which the image to be loaded from NAND is located is
retrieved from the itb header. The presence of bad blocks in the area
of the NAND where the itb image is located could invalidate the offset
which must therefore be adjusted taking into account the state of the
sectors concerned.

cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
4 years agospl: fit: fail fit loading in case of FDT appending error
Dario Binacchi [Wed, 27 May 2020 11:56:19 +0000 (13:56 +0200)]
spl: fit: fail fit loading in case of FDT appending error

If uboot does not embed its device tree and the FIT loading function
returns error in case of failure in the FDT append, the redundant itb
image could be loaded.

cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agospl: fix format of function documentation
Dario Binacchi [Wed, 27 May 2020 11:56:18 +0000 (13:56 +0200)]
spl: fix format of function documentation

U-Boot adopted the kernel-doc annotation style.

cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agospl: fit: select SPL_CRYPTO_SUPPORT for SPL_FIT_SIGNATURE
Heiko Stuebner [Thu, 18 Jun 2020 14:23:28 +0000 (16:23 +0200)]
spl: fit: select SPL_CRYPTO_SUPPORT for SPL_FIT_SIGNATURE

Verifying FIT images obviously needs the rsa parts of crypto
support and while main uboot always compiles crypto support,
it's optional for SPL and we should thus select the necessary
option to not end up in compile errors like:

    u-boot/lib/rsa/rsa-verify.c:328: undefined reference to `rsa_mod_exp'

So select SPL_CRYPTO_SUPPORT in SPL_FIT_SIGNATURE.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agospl: fit: select SPL_HASH_SUPPORT for SPL_FIT_SIGNATURE
Heiko Stuebner [Thu, 18 Jun 2020 14:23:27 +0000 (16:23 +0200)]
spl: fit: select SPL_HASH_SUPPORT for SPL_FIT_SIGNATURE

rsa-checsum needs support for hash functions or else will run into
compile errors like:
u-boot/lib/rsa/rsa-checksum.c:28: undefined reference to `hash_progressive_lookup_algo'

So similar to the main FIT_SIGNATURE entry selects HASH,
select SPL_HASH_SUPPORT for SPL_FIT_SIGNATURE.

Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agolib: rsa: add documentation to padding_pss_verify to document limitations
Heiko Stuebner [Thu, 18 Jun 2020 14:23:26 +0000 (16:23 +0200)]
lib: rsa: add documentation to padding_pss_verify to document limitations

padding_pss_verify only works with the default pss salt setting of -2
(length to be automatically determined based on the PSS block structure)
not -1 (salt length set to the maximum permissible value), which makes
verifications of signatures with that saltlen fail.

Until this gets implemented at least document this behaviour.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agolib: rsa: free local arrays after use in rsa_gen_key_prop()
Heiko Stuebner [Thu, 18 Jun 2020 14:23:25 +0000 (16:23 +0200)]
lib: rsa: free local arrays after use in rsa_gen_key_prop()

n, rr and rrtmp are used for internal calculations, but in the end
the results are copied into separately allocated elements of the
actual key_prop, so the n, rr and rrtmp elements are not used anymore
when returning from the function and should of course be freed.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agolib: rsa: fix allocated size for rr and rrtmp in rsa_gen_key_prop()
Heiko Stuebner [Tue, 7 Jul 2020 20:57:26 +0000 (22:57 +0200)]
lib: rsa: fix allocated size for rr and rrtmp in rsa_gen_key_prop()

When calculating rrtmp/rr rsa_gen_key_prop() tries to make
(((rlen + 31) >> 5) + 1) steps in the rr uint32_t array and
(((rlen + 7) >> 3) + 1) / 4 steps in uint32_t rrtmp[]
with rlen being num_bits * 2

On a 4096bit key this comes down to to 257 uint32_t elements
in rr and 256 elements in rrtmp but with the current allocation
rr and rrtmp only have 129 uint32_t elements.

On 2048bit keys this works by chance as the defined max_rsa_size=4096
allocates a suitable number of elements, but with an actual 4096bit key
this results in other memory parts getting overwritten.

So as suggested by Heinrich Schuchardt just use the actual bit-size
of the key as base for the size calculation, in turn making the code
compatible to any future keysizes.

Suggested-by: Heinrich Schuchardt <xypron.debian@gmx.de>
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
rrtmp needs 2 + (((*prop)->num_bits * 2) >> 5) array elements.

Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agolib: rsa: bring exp_len in line when generating a key_prop
Heiko Stuebner [Thu, 18 Jun 2020 14:23:23 +0000 (16:23 +0200)]
lib: rsa: bring exp_len in line when generating a key_prop

The exponent field of struct key_prop gets allocated an uint64_t,
and the contents are positioned from the back, so an exponent of
"0x01 0x00 0x01" becomes 0x0 0x0 0x0 0x0 0x0 0x1 0x0 0x1"

Right now rsa_gen_key_prop() allocates a uint64_t but sets exp_len
to the size returned from the parser, while on the other hand the
when getting the key from the devicetree exp_len always gets set to
sizeof(uint64_t).

So bring that in line with the established code.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agolib: rsa: take spl/non-spl into account when building rsa_verify_with_pkey()
Heiko Stuebner [Thu, 18 Jun 2020 14:23:22 +0000 (16:23 +0200)]
lib: rsa: take spl/non-spl into account when building rsa_verify_with_pkey()

Right now in multiple places there are only checks for the full
CONFIG_RSA_VERIFY_WITH_PKEY option, not split into main,spl,tpl variants.

This breaks when the rsa functions get enabled for SPL, for example to
verify u-boot proper from spl.

So fix this by using the existing helpers to distinguis between
build-steps.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agolib: rsa: distinguish between tpl and spl for CONFIG_RSA_VERIFY
Heiko Stuebner [Thu, 18 Jun 2020 14:23:21 +0000 (16:23 +0200)]
lib: rsa: distinguish between tpl and spl for CONFIG_RSA_VERIFY

While the SPL may want to do signature checking this won't be
the case for TPL in all cases, as TPL is mostly used when the
amount of initial memory is not enough for a full SPL.

So on a system where SPL uses DM but TPL does not we currently
end up with a TPL compile error of:

    lib/rsa/rsa-verify.c:48:25: error: dereferencing pointer to incomplete type â€˜struct checksum_algo’

To prevent that change the $(SPL_) to $(SPL_TPL_) to distinguish
between both. If someone really needs FIT signature checking in
TPL as well, a new TPL_RSA_VERIFY config symbol needs to be added.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agocmd: add a panic command
Heiko Stuebner [Mon, 29 Jun 2020 23:05:45 +0000 (01:05 +0200)]
cmd: add a panic command

Even in boot scripts it may be needed to "panic" when all options
are exhausted and the device specification specifies hanging
instead of resetting the board.

So add a new panic command that just wraps around the core panic
call in U-Boot and can take an optional message.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
4 years agodebug_uart: Add CR before and after announce string
Stefan Roese [Fri, 15 May 2020 05:09:03 +0000 (07:09 +0200)]
debug_uart: Add CR before and after announce string

Add linefeeds before and after the announce string. This makes the
output easier to read, especially if some text follows the announce
message without a specific additional CR.

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agotpm: add #ifndef to fix redeclaration build errors
Johannes Holland [Mon, 11 May 2020 13:22:25 +0000 (15:22 +0200)]
tpm: add #ifndef to fix redeclaration build errors

tpm_tis_spi.c directly includes tpm_tis.h and tpm-v2.h which both
define the same enums (see e.g. TPM_ACCESS_VALID). Add an #ifndef to
prevent redeclaration errors.

Signed-off-by: Johannes Holland <johannes.holland@infineon.com>
4 years agotpm: add TPM2_GetRandom command support
Dhananjay Phadke [Thu, 4 Jun 2020 23:43:59 +0000 (16:43 -0700)]
tpm: add TPM2_GetRandom command support

Add support for TPM2 GetRandom command

Signed-off-by: Dhananjay Phadke <dphadke@linux.microsoft.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agotpm2: tis_spi: add linux compatible fallback string
Bruno Thomsen [Fri, 12 Jun 2020 15:17:33 +0000 (17:17 +0200)]
tpm2: tis_spi: add linux compatible fallback string

This solves a compatibility issue with Linux device trees
that contain TPMv2.x hardware. So it's easier to import DTS
from upstream kernel when migrating board init from C code
to DTS.

The issue is that fallback binding is different between Linux
and u-Boot.

Linux: "tcg,tpm_tis-spi"
U-Boot: "tis,tpm2-spi"

As there are currently no in-tree users of the U-Boot binding,
it makes sense to use Linux fallback binding.

Signed-off-by: Bruno Thomsen <bruno.thomsen@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
4 years agoMerge tag 'u-boot-amlogic-20200708' of https://gitlab.denx.de/u-boot/custodians/u...
Tom Rini [Wed, 8 Jul 2020 14:40:32 +0000 (10:40 -0400)]
Merge tag 'u-boot-amlogic-20200708' of https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic

- Add proper Odroid-N2 board support code
- Add support for Odroid-C4 single board computer

4 years agogpio: fix test.py for gpio label lookup
Heiko Schocher [Wed, 8 Jul 2020 08:24:00 +0000 (10:24 +0200)]
gpio: fix test.py for gpio label lookup

commit 2bd261dd1712 ("gpio: search for gpio label if gpio is not found through bank name")

disabled DM_GPIO_LOOKUP_LABEL which is needed
in sandbox defconfigs, as we have tests for this
functionality.

Signed-off-by: Heiko Schocher <hs@denx.de>
4 years agoARM: dts: meson-sm1-odroid-c4: add ethernet PHY reset
Neil Armstrong [Fri, 19 Jun 2020 09:31:28 +0000 (11:31 +0200)]
ARM: dts: meson-sm1-odroid-c4: add ethernet PHY reset

The PHY needs a reset in order to be functionnal for U-Boot, add the old
PHY reset bindings for dwmac until we support the new bindings in the PHY node.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Anand Moon <linux.amoon@gmail.com>
4 years agoboards: amlogic: add Odroid C4 support
Christian Hewitt [Fri, 24 Apr 2020 03:09:12 +0000 (03:09 +0000)]
boards: amlogic: add Odroid C4 support

Odroid C4 is an Amlogic SM1 device, the board config and board documentation
are adapted from the Odroid-N2 support from the same vendor.

Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
[narmstrong: fix odroid-c4.rst typos and structure]
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Anand Moon <linux.amoon@gmail.com>
4 years agoARM: dts: sync amlogic G12A/G12B/SM1 DT from Linux 5.8-rc1
Christian Hewitt [Fri, 24 Apr 2020 02:58:30 +0000 (02:58 +0000)]
ARM: dts: sync amlogic G12A/G12B/SM1 DT from Linux 5.8-rc1

This imports the changes and the new Odroid-C4 board from the Linux
commit b3a9e3b9622a ("Linux 5.8-rc1").

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Anand Moon <linux.amoon@gmail.com>
4 years agoboard: amlogic: Add Odroid-N2 board support
Pascal Vizeli [Thu, 18 Jun 2020 14:40:37 +0000 (16:40 +0200)]
board: amlogic: Add Odroid-N2 board support

Add a proper Odroid-N2 board support to handle the Ethernet MAC
address stored in the in-SoC eFuses.

Signed-off-by: Pascal Vizeli <pvizeli@syshack.ch>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Anand Moon <linux.amoon@gmail.com>
4 years agoMerge tag 'u-boot-rockchip-20200708' of https://gitlab.denx.de/u-boot/custodians...
Tom Rini [Wed, 8 Jul 2020 03:05:57 +0000 (23:05 -0400)]
Merge tag 'u-boot-rockchip-20200708' of https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip

- dts sync from kernel for rk3399 boards;
- Add Radxa Rock Pi N8, N10;
- Some feature update for Pinebook Pro;

4 years agoMerge branch '2020-07-07-misc-new-features'
Tom Rini [Wed, 8 Jul 2020 02:58:18 +0000 (22:58 -0400)]
Merge branch '2020-07-07-misc-new-features'

- Improve s700 SoC support
- Fix building with clang on ARM.
- Juno platform updates
- fs/dm cmd improvements
- Other assorted improvements / fixes

4 years agoarm: juno: Enable SATA controller
Andre Przywara [Thu, 11 Jun 2020 11:03:21 +0000 (12:03 +0100)]
arm: juno: Enable SATA controller

The ARM Juno boards (-r1 and -r2) feature a Silicon Image 3132 PCIe
SATA controller soldered on the board, providing two SATA ports.

Enable the driver and the sata command in the defconfig, to be able to
load images from SATA disks.

Tested by loading kernels and Grub/EFI from an SSD and successfully
booting a Linux system (with and without using UEFI).

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
4 years agoarm: juno: Enable PCI
Andre Przywara [Thu, 11 Jun 2020 11:03:20 +0000 (12:03 +0100)]
arm: juno: Enable PCI

The ARM Juno boards in their -r1 and -r2 variants sport a PCIe
controller, which we configure already in board specific code to be ECAM
compliant. Hence we can just enable the generic ECAM driver to let
U-Boot use PCIe devices.

Add the respective options to the Juno defconfig to enable the PCI
framework and the generic ECAM driver, and initialise the driver upon
loading U-Boot.

Make some functions in the Juno PCIe init code static on the way.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
4 years agosata_sil: Enable DM_PCI operation
Andre Przywara [Thu, 11 Jun 2020 11:03:19 +0000 (12:03 +0100)]
sata_sil: Enable DM_PCI operation

Even though the sata_sil driver was converted over to the driver model,
it still assumed that the PCI controller is using the legacy interface.

Allow the "devno" member to be a struct udevice pointer and use
DM_PCI_COMPAT to covert the rest of the interface.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
4 years agoarm: juno: Enable DM_ETH
Andre Przywara [Thu, 11 Jun 2020 11:03:18 +0000 (12:03 +0100)]
arm: juno: Enable DM_ETH

The smc911X driver is now DM enabled, so we can switch the Juno board
over to use DM_ETH for the on-board Fast Ethernet device.
Works out of the box by using the DT.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
4 years agonet: smc911x: Properly handle EEPROM MAC address
Andre Przywara [Thu, 11 Jun 2020 11:03:17 +0000 (12:03 +0100)]
net: smc911x: Properly handle EEPROM MAC address

When compiled as a DM_ETH driver, the scm911x driver was reading the MAC
address from the optional EEPROM storage, but failed to copy this to the
platdata struct. Since it was also missing a definition of the
read_rom_hwaddr() function, the generic Ethernet code was dismissing
this MAC address, falling back to a random address or denying to start
at all.

Add an implementation of .read_rom_hwaddr, and refactor the function
reading the ROM address to be called by all interested parties.

This fixes MAC address issues when using the driver in DM_ETH "mode".

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-By: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
4 years agonet: dm: Remove warning about EEPROM provided MAC address
Andre Przywara [Thu, 11 Jun 2020 11:03:16 +0000 (12:03 +0100)]
net: dm: Remove warning about EEPROM provided MAC address

Similar to patch 821fec0ceb3e ("net: remove scary warning about EEPROM
provided MAC address") this removes the somewhat awkward "warning" on
boards using DM_ETH:
In many parts of the computing world having a unique MAC address
sitting in some on-NIC storage is considered the normal case.

If there is a properly provided MAC address (either from ROM or from DT),
remove the warning to not scare the user unnecessarily.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-By: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
4 years agoarm: vexpress64: Fix counter frequency
Andre Przywara [Thu, 11 Jun 2020 11:03:15 +0000 (12:03 +0100)]
arm: vexpress64: Fix counter frequency

The arch timer on 64-bit Arm Ltd. platforms is driven by a 24 MHz
crystal oscillator, so the frequency is not 25165824 MHz, as the current
code suggests.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
4 years agoarm: use correct argument size of special registers
Heinrich Schuchardt [Wed, 27 May 2020 18:04:24 +0000 (20:04 +0200)]
arm: use correct argument size of special registers

Compiling with clang on ARMv8 shows errors like:

./arch/arm/include/asm/system.h:162:32: note: use constraint modifier "w"
                asm volatile("msr sctlr_el1, %0" : : "r" (val) : "cc");
                                             ^~
                                             %w0

These errors are due to using an incorrect size for the variables used
for writing to and reading from special registers which have 64 bits on
ARMv8.

Mask off reserved bits when reading the exception level.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agoarm: remove outdated comment concerning -ffixed-x18
Heinrich Schuchardt [Wed, 27 May 2020 18:04:23 +0000 (20:04 +0200)]
arm: remove outdated comment concerning -ffixed-x18

Clang 9 supports -ffixed-x18.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agotrace: clang compatible handling of gd register
Heinrich Schuchardt [Wed, 27 May 2020 18:04:22 +0000 (20:04 +0200)]
trace: clang compatible handling of gd register

On ARM systems gd is stored in register r9 or x18. When compiling with
clang gd is defined as a macro calling function gd_ptr(). So we can not
make assignments to gd.

Use function set_gd() for setting the register on ARM.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agofs: fat_write: fix short name creation.
Heinrich Schuchardt [Tue, 26 May 2020 19:06:50 +0000 (21:06 +0200)]
fs: fat_write: fix short name creation.

Truncate file names if the buffer size is exceeded to avoid a buffer
overflow.

Use Sphinx style function description.

Add a TODO comment.

Reported-by: CID 303779
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agotest_sleep.py: make sleep time and margin configurable
Heiko Schocher [Thu, 4 Jun 2020 15:24:00 +0000 (17:24 +0200)]
test_sleep.py: make sleep time and margin configurable

make the sleep time and the margin configurable.

Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
4 years agogpio: search for gpio label if gpio is not found through bank name
Heiko Schocher [Fri, 22 May 2020 09:08:59 +0000 (11:08 +0200)]
gpio: search for gpio label if gpio is not found through bank name

dm_gpio_lookup_name() searches for a gpio through
the bank name. But we have also gpio labels, and it
makes sense to search for a gpio also in the labels
we have defined, if no gpio is found through the
bank name definition.

This is useful for example if you have a wp pin on
different gpios on different board versions.

If dm_gpio_lookup_name() searches also for the gpio labels,
you can give the gpio an unique label name and search
for this label, and do not need to differ between
board revisions.

Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
[trini: Don't enable by default]
Signed-off-by: Tom Rini <trini@konsulko.com>
4 years agoconfigs: Enable mac and phy configs
Amit Singh Tomar [Sat, 9 May 2020 14:25:15 +0000 (19:55 +0530)]
configs: Enable mac and phy configs

This patch adds MAC and PHY related configs (needed for proper
ethernet operations) for Action Semi S700 SoC.

Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
4 years agoowl: Kconfig: Enable DM eth for OWL platform
Amit Singh Tomar [Sat, 9 May 2020 14:25:14 +0000 (19:55 +0530)]
owl: Kconfig: Enable DM eth for OWL platform

This patch selects CONFIG_DM_ETH (ethernet driver is base on DM model)
for Action semi owl SoC.

Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
4 years agoarm: dts: s700: add node for ethernet controller
Amit Singh Tomar [Sat, 9 May 2020 14:25:13 +0000 (19:55 +0530)]
arm: dts: s700: add node for ethernet controller

This patch adds node for ethernet controller found on Action Semi OWL
S700 SoC.

Since, there is no upstream Linux binding exist for S700 ethernet
controller, Changes are put in u-boot specific dtsi file.

Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
4 years agonet: designware: s700: Add glue code for S700 mac
Amit Singh Tomar [Sat, 9 May 2020 14:25:12 +0000 (19:55 +0530)]
net: designware: s700: Add glue code for S700 mac

This patchs adds glue logic to enable designware mac present on
Action Semi based S700 SoC, Configures SoC specific bits.

Undocumented bit that programs the PHY interface select register
comes from vendor source.

It has been tested on Cubieboard7-lite based on S700 SoC.

Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
4 years agonet: phy: realtek: Introduce PHY_RTL8201F_S700_RMII_TIMINGS to adjust rx/tx timings
Amit Singh Tomar [Sat, 9 May 2020 14:25:11 +0000 (19:55 +0530)]
net: phy: realtek: Introduce PHY_RTL8201F_S700_RMII_TIMINGS to adjust rx/tx timings

RTL8201F PHY module found on Actions Semi Cubieboard7 seems to have
specific Rx/Tx interface timings requirement for proper PHY operations.
These timing values are not documented anywhere and picked from vendor
code.

This commits lets proper packets to be transmitted over the network.

Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
4 years agonet: phy: realtek: Add support for RTL8201F PHY module.
Amit Singh Tomar [Sat, 9 May 2020 14:25:10 +0000 (19:55 +0530)]
net: phy: realtek: Add support for RTL8201F PHY module.

This patch adds support for Realtek PHY RTL8201F 10/100Mbs
(with variants: RTL8201FN and RTL8201FL) PHYceiver. It is
present on Actions Semi Cubieboard7 board.

Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
4 years agoclk: actions: Add Ethernet clocks
Amit Singh Tomar [Sat, 9 May 2020 14:25:09 +0000 (19:55 +0530)]
clk: actions: Add Ethernet clocks

This commit adds clocks needed for ethernet operations for
Actions OWL family of SoCs (S700 and S900).

Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
4 years agoarm: actions: remove "CONFIG_SYS_SDRAM_SIZE" for Actions Owl Semi SoCs
Amit Singh Tomar [Sat, 9 May 2020 08:15:08 +0000 (13:45 +0530)]
arm: actions: remove "CONFIG_SYS_SDRAM_SIZE" for Actions Owl Semi SoCs

Now that, we calculate SDRAM size by reading DDR registers,
"CONFIG_SYS_SDRAM_SIZE" is no more needed.

This commit removes "CONFIG_SYS_SDRAM_SIZE" from common configuration
file.

Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
4 years agoActions: OWL: Calculate SDRAM size
Amit Singh Tomar [Sat, 9 May 2020 08:15:07 +0000 (13:45 +0530)]
Actions: OWL: Calculate SDRAM size

Calculate the SDRAM size from DDR capacity register registers instead
of using hard-coded value. This is quite useful to get correct size
on differnt boards based on Actions OWL family of SoCs (S700 and S900).

There is no documentation available that talks about DDR registers, and
this is very much taken from vendor source.

This commit lets Linux boot on Cubieboard7-lite(based on S700).

Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
4 years agoimage: Add support for ZSTD decompression
Robert Marko [Sat, 25 Apr 2020 17:37:21 +0000 (19:37 +0200)]
image: Add support for ZSTD decompression

This patch adds support for ZSTD decompression of FIT images.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
4 years agocmd: blkls: Add blkls command
Niel Fourie [Mon, 30 Mar 2020 15:22:58 +0000 (17:22 +0200)]
cmd: blkls: Add blkls command

Add a command to print a list of available block device drivers,
and for each, the list of known block devices.

Signed-off-by: Niel Fourie <lusus@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
4 years agocmd: dm: Fixed/Added DM driver listing subcommands
Niel Fourie [Tue, 24 Mar 2020 15:17:05 +0000 (16:17 +0100)]
cmd: dm: Fixed/Added DM driver listing subcommands

Renamed dm "drivers" subcommand to "compat" (as it listed
compatibility strings) and prevent it from segfaulting when
drivers have no of_match populated.

Added a new "drivers" subcommand to dump a list of all known DM
drivers and for each, their uclass id, uclass driver and names of
attached devices.

Added a new "static" subcommand to dump a list of DM drivers with
statically defined platform data.

Signed-off-by: Niel Fourie <lusus@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agocmd: fs: Add command to list supported fs types
Niel Fourie [Tue, 24 Mar 2020 15:17:04 +0000 (16:17 +0100)]
cmd: fs: Add command to list supported fs types

Added command "fstypes" to list supported/included filesystems.

Signed-off-by: Niel Fourie <lusus@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
[trini: Limit to sandbox]
Signed-off-by: Tom Rini <trini@konsulko.com>
4 years agocmd: part: Add subcommand to list supported partition tables
Niel Fourie [Tue, 24 Mar 2020 15:17:03 +0000 (16:17 +0100)]
cmd: part: Add subcommand to list supported partition tables

Add a subcommand "types" to the part command, which lists the supported
partition table types.

Signed-off-by: Niel Fourie <lusus@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agoMerge tag 'u-boot-stm32-20200707' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm
Tom Rini [Tue, 7 Jul 2020 18:00:44 +0000 (14:00 -0400)]
Merge tag 'u-boot-stm32-20200707' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm

- arch and board update for stm32mp15:
  - use OPP information in device tree for 800MHz/650MHz support
  - ram: inprovments of test command
  - solve boot on closed chip when access to DBGMCU_IDC is protected
  - stm32prog command: Add "device anme" during USB enumeration
  - update configs: activate WATCHDOG and 'env erase' command,
    increase teed partition, support SD card after NOR boot by default and
    use env info in env_check
  - some sboard cleanups: gpio hog in dh board, specific driver for
    type-c stusb1600 controller code in a driver move part of code in spl.c
    and in common directory
- fix STM32 compatible for dwc_eth_qos driver
- support of new pinctrl ops get_dir_flags/set_dir_flags in stm32 and stmfx
  drivers
- vrefbuf: fix a possible overshoot when re-enabling

4 years agoMerge tag 'u-boot-atmel-2020.10-a' of https://gitlab.denx.de/u-boot/custodians/u...
Tom Rini [Tue, 7 Jul 2020 16:55:57 +0000 (12:55 -0400)]
Merge tag 'u-boot-atmel-2020.10-a' of https://gitlab.denx.de/u-boot/custodians/u-boot-atmel

First set of u-boot-atmel features for 2020.10 cycle

4 years agoarm64: issue ISB after updating system registers
Volodymyr Babchuk [Wed, 24 Jun 2020 01:05:19 +0000 (01:05 +0000)]
arm64: issue ISB after updating system registers

ARM Architecture reference manual clearly states that PE pipeline
should be flushed after changes to some system registers. Refer to
paragraph "B2.3.5 Memory Barriers" at page B2-92 of "Arm Architecture
Reference Manual ARMv8 for ARMv8-A Architecture Profile" (ARM DDI
0487B.a).

Failing to issue instruction synchronization barrier can lead to
spurious errors, like synchronous exception when accessing FPU
registers. This is very prominent on CPUs with long instruction
pipeline, like ARM Cortex A72.

This change fixes the following U-Boot panic:

 "Synchronous Abort" handler, esr 0x1fe00000
 elr: 00000000800948cc lr : 0000000080091e04
 x0 : 00000000801ffdc8 x1 : 00000000000000c8
 x2 : 00000000800979d4 x3 : 00000000801ffc60
 x4 : 00000000801ffd40 x5 : ffffff80ffffffd8
 x6 : 00000000801ffd70 x7 : 00000000801ffd70
 x8 : 000000000000000a x9 : 0000000000000000
 x10: 0000000000000044 x11: 0000000000000000
 x12: 0000000000000000 x13: 0000000000000000
 x14: 0000000000000000 x15: 0000000000000000
 x16: 000000008008b2e0 x17: 0000000000000000
 x18: 00000000801ffec0 x19: 00000000800957b0
 x20: 00000000000000c8 x21: 00000000801ffdc8
 x22: 000000008009909e x23: 0000000000000000
 x24: 0000000000000000 x25: 0000000000000000
 x26: 0000000000000000 x27: 0000000000000000
 x28: 0000000000000000 x29: 00000000801ffc50

 Code: a94417e4 a90217e4 a9051fe6 a90617e4 (3d801fe0)

While executing instruction

 str     q0, [sp, #112]

in vsnprintf() prologue. This panic was observed only on Cortex A72 so
far.

This patch places ISBs on other strategic places as well.

Also, this probably is the right fix for the issue workarounded in the
commit 45f41c134baf ("ARM: uniphier: add weird workaround code for LD20")

Reported-by: Oleksandr Andrushchenko <oleksandr_andrushchenko@epam.com>
Suggested-by: Julien Grall <julien.grall.oss@gmail.com>
Signed-off-by: Volodymyr Babchuk <volodymyr_babchuk@epam.com>
CC: Tom Rini <trini@konsulko.com>
CC: Masahiro Yamada <yamada.masahiro@socionext.com>
CC: Stefano Stabellini <sstabellini@kernel.org>
Reviewed-by: Julien Grall <julien@xen.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Masahiro Yamada <yamada.masahiro@socionext.com>
4 years agoram: stm32mp1: add size and addr parameter to test all
Patrick Delaunay [Thu, 2 Jul 2020 17:56:37 +0000 (19:56 +0200)]
ram: stm32mp1: add size and addr parameter to test all

Add size and addr parameter to test "All" to override the default
value (4kB and STM32_DDR_BASE) used in tests with these optional
parameters: [size] or [addr].

When other optional parameters are present before [addr],
they are replaced by default value:
- [loop] = "1"
- [pattern] = "-" (new: force default pattern)

Example to use:

DDR>test 0 1 0x20000

DDR>test 0 1 0x1000000 0xD0000000

Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
4 years agoram: stm32mp1: use the DDR size by default in the test addressBus
Patrick Delaunay [Thu, 2 Jul 2020 17:56:36 +0000 (19:56 +0200)]
ram: stm32mp1: use the DDR size by default in the test addressBus

The test 4 = "AddressBus [size] [addr]" without parameter
detects alias for any address bit only when:
- size = real size of DDR
- addr = start of DDR = 0xC0000000

These value must be the default value when parameters are absent.

This patch sets bufsize to STM32_DDR_SIZE and get_bufsize() selects
the correct value for bufsize when this parameter is absent =
full size of the DDDR

On EV1 board :
DDR> test 4
running at 0xC0000000 length 0x40000000

On DK2 board
DDR> test 4
running at 0xC0000000 length 0x20000000

Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
4 years agoram: stm32mp1: add parameter addr in test FrequencySelectivePattern
Patrick Delaunay [Thu, 2 Jul 2020 17:56:35 +0000 (19:56 +0200)]
ram: stm32mp1: add parameter addr in test FrequencySelectivePattern

Add a parameter addr in test FrequencySelectivePattern to select
the base address used to execute the tests.

Default value (when the parameter is absent) is STM32_DDR_BASE,
selected in get_addr() function.

Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
4 years agoram: stm32mp1: protect minimum value in get_bufsize
Patrick Delaunay [Thu, 2 Jul 2020 17:56:34 +0000 (19:56 +0200)]
ram: stm32mp1: protect minimum value in get_bufsize

Add protection on minimum value for result of get_bufsize
and check the alignment of buffer size: only multiple min_size
is allowed; only 4 bytes alignment was checked previously
(value & 0x3).

For example the "Random" test raises an issue when size is not 8 bytes
aligned because address for buffer = address + size / 2 is not word
aligned.

This patch avoid test error for unsupported size value.

Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
4 years agostm32mp1: use the command env info in env_check
Patrick Delaunay [Thu, 2 Jul 2020 15:43:45 +0000 (17:43 +0200)]
stm32mp1: use the command env info in env_check

Activate CMD_NVEDIT_INFO and use the new command "env info -d -p -q"
to automatically save the environment on first boot.

This patch allows to remove the env_default variable.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
4 years agocmd: env: use ENV_IS_IN_DEVICE in env info
Patrick Delaunay [Thu, 2 Jul 2020 15:43:44 +0000 (17:43 +0200)]
cmd: env: use ENV_IS_IN_DEVICE in env info

Use the define ENV_IS_IN_DEVICE to test if one the
CONFIG_ENV_IS_IN_...  is defined and correct the detection of
persistent storage support in the command "env info"
if CONFIG_ENV_IS_NOWHERE is activated.

Since commit 60d5ed2593c9 ("env: allow ENV_IS_NOWHERE with
other storage target") test CONFIG_ENV_IS_NOWHERE is not
enough; see also commit 953db29a1e9c6 ("env: enable saveenv
command when one CONFIG_ENV_IS_IN is activated").

This patch avoids issue for this command in stm32mp1 platform.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
4 years agoboard: dh_stm32mp1: update the gpio hog support
Patrick Delaunay [Thu, 2 Jul 2020 13:20:47 +0000 (15:20 +0200)]
board: dh_stm32mp1: update the gpio hog support

This patch update the current gpio hog implementation with
the new API gpio_hog_probe_all() activated with CONFIG_GPIO_HOG.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
4 years agoboard: st: move type-c stusb1600 controller code in a driver
Patrick Delaunay [Mon, 29 Jun 2020 08:34:06 +0000 (10:34 +0200)]
board: st: move type-c stusb1600 controller code in a driver

Migrate the ST Microelectronics STUSB160X Type-C controller code in
a generic I2C driver in st/common, based on Linux one in :
drivers/usb/typec/stusb160x.c

This patch simplifies the stm32mp1 board code and allows to reuse
this STUSB160X driver in other boards.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
4 years agoconfigs: stm32mp1: only support SD card after NOR in bootcmd_stm32mp
Patrick Delaunay [Tue, 16 Jun 2020 16:30:27 +0000 (18:30 +0200)]
configs: stm32mp1: only support SD card after NOR in bootcmd_stm32mp

In the boot command used in ST boards, bootcmd_stm32mp, only support
the SD card as second stage, where is found the bootfs with DISTRO.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
4 years agoarm: stm32mp: protect DBGMCU_IDC access with BSEC
Patrick Delaunay [Tue, 16 Jun 2020 16:27:44 +0000 (18:27 +0200)]
arm: stm32mp: protect DBGMCU_IDC access with BSEC

As debugger must be totally closed on Sec closed chip,
the DBGMCU_IDC register is no more accessible (self
hosted debug is disabled with OTP).

This patch adds a function bsec_dbgswenable() to check
if the DBGMCU registers are available before to access them:
BSEC_DENABLE.DBGSWENABLE = self hosted debug status.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
4 years agoarm: stm32mp: stm32prog: add "Device Name" in iproduct during DFU USB enumeration
Patrick Delaunay [Tue, 16 Jun 2020 16:25:14 +0000 (18:25 +0200)]
arm: stm32mp: stm32prog: add "Device Name" in iproduct during DFU USB enumeration

Add "Device Name" in iproduct during DFU USB enumeration
to have this information in STM32CubeProgrammer trace
(this tools is compatible with @Name since v2.3)

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
4 years agoboard: st: stm32mp1: increase teed partition
Patrick Delaunay [Tue, 16 Jun 2020 16:19:28 +0000 (18:19 +0200)]
board: st: stm32mp1: increase teed partition

With TEE 3.7.0, the partition teed (OP-TEE pageable
code and data) need to increase up to 512KB in NOR device.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
4 years agostm32mp1: configs: activate CMD_ERASEENV
Patrick Delaunay [Mon, 15 Jun 2020 09:25:13 +0000 (11:25 +0200)]
stm32mp1: configs: activate CMD_ERASEENV

Activate the command env erase to reset the environment with the command:
> env erase

it is simpler than:
> env default -a
> env save

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
4 years agopower: regulator: stm32: vrefbuf: fix a possible overshoot when re-enabling
Fabrice Gasnier [Fri, 12 Jun 2020 08:40:58 +0000 (10:40 +0200)]
power: regulator: stm32: vrefbuf: fix a possible overshoot when re-enabling

There maybe an overshoot:
- when disabling, then re-enabling vrefbuf too quickly
- or upon platform reset as external capacitor maybe slow
  discharging (VREFBUF is HiZ at reset by default).
VREFBUF is used by ADC/DAC on some boards. An overshoot on the reference
voltage make the conversions inaccurate for a short period of time. So:
- Don't put the VREFBUF in HiZ when disabling, to force an active
  discharge.
- Enforce a 1ms OFF/ON delay, also upon reset

Penalty is a 1ms delay is applied (even for a cold boot), when enabling
VREFBUF.

Fixes: 93cf0ae7758d ("power: regulator: Add support for stm32-vrefbuf")
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
4 years agoconfigs: stm32mp1: activate WATCHDOG
Patrick Delaunay [Thu, 11 Jun 2020 14:51:17 +0000 (16:51 +0200)]
configs: stm32mp1: activate WATCHDOG

As kernel v5.6 have a solution since so we will be able to enable
the watchdog at boot time. It is reloaded by the watchdog
framework (if CONFIG_WATCHDOG_HANDLE_BOOT_ENABLED is set) and
until the userspace watchdog daemon takes over control.

Need presence of kernel patch 85fdc63fe256 ("drivers: watchdog:
stm32_iwdg: set WDOG_HW_RUNNING at probe") integrated in v5.6-rc1.

This patch revert the previous commit ca351e705a5c ("stm32mp1:
deactivate WATCHDOG in defconfig").

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
4 years agopinctrl: stm32: add information on pin configuration
Patrick Delaunay [Thu, 4 Jun 2020 12:30:33 +0000 (14:30 +0200)]
pinctrl: stm32: add information on pin configuration

Add information on pin configuration used for pinmux command:
- bias configuration for output (disable, pull up, pull down)
- otype for input (open drain or push pull)

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>