Ye Li [Thu, 15 Jun 2023 10:09:20 +0000 (18:09 +0800)]
imx: imx8: bootaux: Add i.MX8 M4 boot support
1. Implement bootaux for the M4 boot on i.MX8QM and QXP. Users need to download
M4 image to any DDR address first. Then use the
"bootaux <M4 download DDR address> [M4 core id]" to boot CM4_0
or CM4_1, the default core id is 0 for CM4_0.
Since current M4 only supports running in TCM. The bootaux will copy
the M4 image from DDR to its TCML.
2. Implment bootaux for HIFI on QXP
command: bootaux 0x81000000 1
Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Ye Li [Thu, 15 Jun 2023 10:09:19 +0000 (18:09 +0800)]
imx: bootaux: Fix bootaux issue when running on ARM64
The bootaux uses ulong to read private data and write to M4 TCM,
this cause problem on ARM64 platform where the ulong is 8bytes.
Fix it by using u32 to replace ulong.
Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Thu, 15 Jun 2023 10:09:18 +0000 (18:09 +0800)]
imx: bootaux: change names of MACROs used to boot MCU on iMX devices
The current bootaux supports i.MX8M and i.MX93, but the name "_M4_"
implies that the SoCs have Cortex-M4. Actually i.MX8MM/Q use Cortex-M4,
i.MX8MN/P use Cortex-M7, i.MX93 use Cortex-M33, so use "_MCU_" in place
of "_M4_" to simplify the naming.
Signed-off-by: faqiang.zhu <faqiang.zhu@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Thu, 15 Jun 2023 10:09:17 +0000 (18:09 +0800)]
imx: iamge-container: support secondary container
Add the support for loading image from secondary container set on
iMX8QM B0, iMX8QXP C0.
Using the SCFW API to get container set index, if it is the secondary
boot, get the offset from fuse and apply to offset of current container
set beginning for loading.
Also override the emmc boot partition to check secondary boot and switch
to the other boot part.
This patch is modified from NXP downstream:
imx8: Fix the fuse used by secondary container offset
imx: container: Skip container set check for ROM API
imx8: spl: Support booting from secondary container set
Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Ye Li [Thu, 15 Jun 2023 10:09:15 +0000 (18:09 +0800)]
imx: hab: Fix coverity issue in HAB event decoding
Fix below coverity issues caused by get_idx function where "-1" is
compared with uint8_t "element"
343336 Unsigned compared with neg
343337 Operands don't affect result
Additional, this function returns "-1" will cause overflow to
event string array.
Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Ye Li [Thu, 15 Jun 2023 10:09:13 +0000 (18:09 +0800)]
imx: misc: ele_mu: Update ELE MU driver
Extend the RX timeout value to 10s, because when authentication is failed
the ELE needs long time (>2s for 28M image) to return the result. Print
rx wait info per 1s.
Also correct TX and RX status registers in debug.
Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Ye Li [Thu, 15 Jun 2023 10:09:12 +0000 (18:09 +0800)]
imx: misc: ele_mu: Update MU TR registers count
According to SRM, the Sentinel MU has 8 TR and 4 RR registers. All
of them are used for ELE message. So update TR count to 8 and fix a
typo in receive msg
Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Ye Li [Thu, 15 Jun 2023 10:09:10 +0000 (18:09 +0800)]
imx: cmd_dek: Fix Uninitialized pointer read
Fix Coverity (CID 21143558).
When tee_shm_register returns failure, the shm_input pointer is
invalid, should not free it. Same issue also exists on registering
shm_output.
Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Thu, 15 Jun 2023 10:09:06 +0000 (18:09 +0800)]
imx: parse-container: fix build warning
Fix build warning:
warning: format ‘%x’ expects argument of type ‘unsigned int’, but argument 3
has type ‘u64’ {aka ‘long long unsigned int’} [-Wformat=]
printf("can't find memreg for image %d load address 0x%x, error %d\n",
warning: format ‘%lx’ expects argument of type ‘long unsigned int’, but
argument 3 has type ‘sc_faddr_t’ {aka ‘long long unsigned int’} [-Wformat=]
debug("memreg %u 0x%lx -- 0x%lx\n", mr, start, end);
Peng Fan [Thu, 15 Jun 2023 10:09:03 +0000 (18:09 +0800)]
imx: congatec/cgtqmx8: correct SCU API usage
The return value is int type, not sc_err_t(u8), correct the usage.
Signed-off-by: Peng Fan <peng.fan@nxp.com> Tested-by: Oliver Graute <oliver.graute@kococonnector.com> Reviewed-by: Oliver Graute <oliver.graute@kococonnector.com>
Peng Fan [Thu, 15 Jun 2023 10:09:02 +0000 (18:09 +0800)]
imx: advantech: correct SCU API usage
The return value is int type, not sc_err_t(u8), correct the usage.
Signed-off-by: Peng Fan <peng.fan@nxp.com> Tested-by: Oliver Graute <oliver.graute@kococonnector.com> Reviewed-by: Oliver Graute <oliver.graute@kococonnector.com>
Running a memtest in U-Boot and Linux shows that some Colibri iMX6
produce bitflips at temperatures above 60°C. This happens because the
RALAT and WALAT values on the Colibri iMX6 are too low. The problems
were introduced by commit 09dbac8174c4 ("mx6: ddr: Restore ralat/walat
in write level calibration") before the calibration process overwrote
the values and set them to the maximum value. With this commit, we make
sure that the RALAT and WALAT values are set to the maximum values
again. This has been proven to work for years.
Fixes: 09dbac8174c4 ("mx6: ddr: Restore ralat/walat in write level calibration") Signed-off-by: Stefan Eichenberger <stefan.eichenberger@toradex.com> Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Tim Harvey [Fri, 9 Jun 2023 16:54:51 +0000 (09:54 -0700)]
board: gateworks: venice: add imx8mp-gw7905-2x support
The Gateworks imx8mp-venice-gw7905-2x consists of a SOM + baseboard.
The GW702x SOM contains the following:
- i.MX8M Plus SoC
- LPDDR4 memory
- eMMC Boot device
- Gateworks System Controller (GSC) with integrated EEPROM, button
controller, and ADC's
- PMIC
- SOM connector providing:
- eQoS GbE MII
- 1x SPI
- 2x I2C
- 4x UART
- 2x USB 3.0
- 1x PCI
- 1x SDIO (4-bit 3.3V)
- 1x SDIO (4-bit 3.3V/1.8V)
- GPIO
The GW7905 Baseboard contains the following:
- GPS
- microSD
- off-board I/O connector with I2C, SPI, GPIO
- EERPOM
- PCIe clock generator
- 1x full-length miniPCIe socket with PCI/USB3 (via mux) and USB2.0
- 1x half-length miniPCIe socket with USB2.0 and USB3.0
- USB 3.0 HUB
- USB Type-C with USB PD Sink capability and peripheral support
- USB Type-C with USB 3.0 host support
Adam Ford [Sun, 28 May 2023 19:18:02 +0000 (14:18 -0500)]
imx: imx8mn-beacon: Move environment definition to env file
Instead of cluttering up a header file with a bunch of defines,
move the default environmental variables to a file called
imx8mn_beacon.env and reference it from the defconfigs.
Adam Ford [Sun, 28 May 2023 19:18:00 +0000 (14:18 -0500)]
imx: imx8mm-beacon: Move environment definition to env file
Instead of cluttering up a header file with a bunch of defines,
move the default environmental variables to a file called
imx8mm_beacon.env and reference it from the defconfig.
While testing the ethernet interface on a Variscite symphony carrier
board using an imx8mn SOM with an onboard ADIN1300 PHY (EC hardware
configuration), the ethernet PHY is not detected.
The ADIN1300 datasheet indicate that the "Management interface
active (t4)" state is reached at most 5ms after the reset signal is
deasserted.
The device tree in Variscite custom git repository uses the following
property:
phy-reset-post-delay = <20>;
Add a new MDIO property 'reset-deassert-us' of 20ms to have the same
delay inside the ethphy node. Adding this property fixes the problem
with the PHY detection.
Note that this SOM can also have an Atheros AR8033 PHY. In this case,
a 1ms deassert delay is sufficient. Add a comment to that effect.
Fixes: c4c1ed68c1e8 ("imx8mn_var_som: Add support for Variscite
VAR-SOM-MX8M-NANO board")
Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com>
Select DM_ETH_PHY so that the reset-gpios property of the ethphy node
can be used.
Also select DM_PCA953X, which is needed for resetting the
ethernet PHY on the carrier board via the PCA9534 I/O expander.
Commit 4e5114daf9eb ("imx8mn: synchronise device tree with linux") did
synchronise device tree with linux, which in effect removed obsolete
PHY reset properties and replaced them with new mdio DM
properties. But the commit didn't activate DM_ETH_PHY or DM_PCA953X.
Fixes: 4e5114daf9eb ("imx8mn: synchronise device tree with linux") Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com>
Lukasz Majewski [Fri, 19 May 2023 10:43:56 +0000 (12:43 +0200)]
arm: Kconfig: Switch XEA (imx287 based) board to use CONFIG_PL01X_SERIAL
The CONFIG_PL011 used by all other ARCH_MX28 based boards is not
supporting DM_SERIAL. Instead, other define - namely CONFIG_PL01X_SERIAL
shall be used by boards supporting DM_SERIAL.
Lukasz Majewski [Fri, 19 May 2023 10:43:55 +0000 (12:43 +0200)]
arm: xea: Call spl_early_init() before DM serial console is enabled in SPL
The in-spl enabled DM serial console requires the board setup to be
able to parse SPL_OF_PLATDATA based serial driver (pl01x) for the
imx28 based XEA board.
Lukasz Majewski [Fri, 19 May 2023 10:43:53 +0000 (12:43 +0200)]
serial: pl01x: Modify pending callback to test if transmit FIFO is empty
Before this change the FR_TXFF (Transmit FIFO full) bit (5 in
HW_UARTDBG_FR) has been used to assess if there is still data pending
to be sent via UART.
This approach is problematic, as it may happen that serial is in the
middle of transmission (so the TX FIFO is NOT full anymore) and this
test returns true infinitely. As a result, for example in _serial_flush()
DM serial function we are locked in endless while().
The fix here is to test explicitly if the TX FIFO is empty.
Lukasz Majewski [Fri, 19 May 2023 10:43:50 +0000 (12:43 +0200)]
dts: xea: Disable 'clks' node for xea (imx287)
As imx28 family of SoCs is NOT supporting the Common Clock Framework (CCF)
the 'clks' property shall NOT be enabled by default.
Without this change u-boot proper before relocation tries to bind driver
(which doesn't exists) for this device. As a result, pre-relocation DTB
parsing is finished with error and the board hangs in a very early stage
of u-boot proper boot process.
Lukasz Majewski [Fri, 19 May 2023 10:43:49 +0000 (12:43 +0200)]
dts: xea: Remove clocks property from debug UART on XEA
The imx287 SoC doesn't support common clock framework (CCF), so the
'clocks' property is removed to avoid early (i.e. in SPL) errors when
SPL_OF_PLATDATA is used.
Lukasz Majewski [Fri, 19 May 2023 10:43:48 +0000 (12:43 +0200)]
dts: xea: Add u-boot specific 'type' property to duart
The DM_SERIAL implicitly requires CONFIG_PL01X_SERIAL, which
allows support for both serial IP block versions (i.e. PL011 and
PL010).
The decision about used IP block is based on the compatible string,
when DM is used.
In the XEA, the OF_PLATDATA is used to allow usage of serial driver in
the SPL (as the size of SPL is crucial). In this case one cannot extract
the type of IP block from .data field (corresponding to compatible) and
it must be explicitly read at probe from dtoc generated, u-boot specific
property.
Lukasz Majewski [Fri, 19 May 2023 10:43:45 +0000 (12:43 +0200)]
defconfig: xea: Change default spi-nor memory bus to 2
After the re-sync with Linux kernel (v6.0) of the XEA DTS
(SHA1: 7d08ddd09b75e7a3c103cc0d0d3ed700287f268e) the alias
for SPI bus, to which SPI-NOR memory is connected, has changed from
'spi3' to 'spi2'.
To be in sync with current u-boot's xea dts, the default bus number
(which allows running 'sf probe' without any extra parameters given)
has been adjusted.
Lukasz Majewski [Fri, 19 May 2023 10:43:44 +0000 (12:43 +0200)]
dts: xea: Provide missing FEC required properties (mac0 and reg_fec_3v3)
After the commit (SHA1: 7d08ddd09b75e7a3c103cc0d0d3ed700287f268e) some
u-boot specific XEA FEC related properties have been replaced by ones
from the Linux kernel.
To be more specific - XEA board (and imx287 in general) has built L2
switch connected to FEC, which needs some special treatment.
In u-boot it is handled with 'mac0' node, whereas Linux uses dedicated
switch DTS node.
Lukasz Majewski [Fri, 19 May 2023 10:43:43 +0000 (12:43 +0200)]
dts: xea: Delete not used in u-boot DTS nodes
After the re-sync with Linux Kernel's DTS
(SHA1: 7d08ddd09b75e7a3c103cc0d0d3ed700287f268e), the XEA's
descripion has nodes and properties, which are NOT utilized
in the u-boot.
Lukasz Majewski [Tue, 9 May 2023 14:32:41 +0000 (16:32 +0200)]
arm: mxs: Provide Kconfig option to not enable 4P2 regulator in IMX28 PMU
The IMX28 PMU (Power Management Unit) has a dedicated Linear Regulator
to produce (by default) 4.2V output - available outside the chip as
VDD_4P2.
When system is supposed to not use VDD5V as a main power source - instead
the DCDC_BATT is used; it is safe to disable this regulator.
As the in-PMU DCDC switching regulator (from which DCDC_VDDA, DCDC_VDDIO
and DCDC_VDDD are generated) can be driven from DCDC_BATT or output
of this 4P2 regulator - by disabling the latter the use of the DCDC_BATT
is forced.
To be more specific - according to NXP's AN4199 the DCDC_BATT source is
preferred (over VDD5V), as more efficient and stable source for
industrial applications.
Lukasz Majewski [Tue, 9 May 2023 14:32:40 +0000 (16:32 +0200)]
arm: mxs: Provide Kconfig option to disable battery charging at IMX28 PMU
This new Kconfig option allows disabling the in-PMU battery charging
block. This may be required when DCDC_BAT source is powered not from
battery, but from already regulated, good quality source.
Lukasz Majewski [Tue, 9 May 2023 14:32:39 +0000 (16:32 +0200)]
arm: mxs: Provide Kconfig option to to not use VDD5V as IMX28 PMU source
This option sets the current limit for 5V source to zero, so all
the PMU outputs are primarily powered from battery source (DCDC_BAT).
This option may be set on systems, where the 5V is NOT supposed to be
in any scenario powering the system - for example on systems where
DCDC_BAT is connected to fixed and regulated 4.2V source (so the
"battery" is not present).
Tim Harvey [Wed, 3 May 2023 00:05:57 +0000 (17:05 -0700)]
board: gateworks: venice: update board doc to show other emmc parts
Update the venice board documentation to show how to install to the
various eMMC hardware partitions available as the same binary firmware
can be placed in either user/boot0/boot1 without build-time config
changes. Note that the boot offsets differ depending on the SoC and the
eMMC hardware partition.
Tim Harvey [Wed, 3 May 2023 00:05:56 +0000 (17:05 -0700)]
board: gateworks: venice: move env location
To allow U-Boot to fit within emmc boot partitions move the env from
just under 16MiB to just under 4MiB as some emmc devices used on venice
boards have 4MiB boot partitions. This still leaves plenty of room for
U-Boot.
Tim Harvey [Wed, 3 May 2023 00:05:55 +0000 (17:05 -0700)]
board: gateworks: venice: dynamically update the update_firmware script
The update_firmware script is intended to update the boot firmware but
the details including the offset and hardware partition are dependent
on the boot device.
Specifically:
- IMX8MM/IMX8MP (BOOTROM v2) the offset is 32KiB for SD and eMMC user
hardware partition and 0KiB for eMMC boot partitions.
- IMX8MM the offset is 33KiB for SD and eMMC regardless of hardware
partition.
Dynamically set soc, dev, bootpart, and bootblk env vars at runtime
and use these in the update_firmware script. Remove the splblk env var
from config files as its no longer needed.
Tim Harvey [Wed, 3 May 2023 00:05:53 +0000 (17:05 -0700)]
board: gateworks: venice: dynamically determine U-Boot raw sector
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR needs to adjust for
IMX8MN and IMX8MP when booting from an eMMC boot partition due
to IMX BOOTROM v2 using an SPL offset of 0 for boot partitions
and 32K for the user partition.
In order to allow the same firmware to run on both user and boot
hardware partitions adjust raw_sect dynamically at runtime.
Change boot device logic to also allow environment stored in fat and
in ext4 when booting from SD or eMMC.
As the boot device check for SD and for eMMC was depending on
ENV_IS_IN_MMC being defined, change the ifdef blocks at
env_get_location to use IS_ENABLED instead for all modes, returning
NOWHERE when no valid mode is found.
Adam Ford [Thu, 2 Feb 2023 01:58:41 +0000 (19:58 -0600)]
configs: imx: imx8mm_beacon: Add config option for QSPI booting
The imx8mm_beacon SOM has a QSPI part attached to the FSPI controller.
Update the header and spl files to support booting from NOR flash and
add imx8mm_beacon_fspi_defconfig to support this configuration.
Michal Simek [Tue, 4 Jul 2023 12:05:13 +0000 (14:05 +0200)]
sysreset: Change Kconfig GPIO dependency
DM_GPIO depends on GPIO to be enabled but select will cause that DM_GPIO is
selected without GPIO which ends up in compilation error:
undefined reference to `dm_gpio_set_value'
undefined reference to `dm_gpio_get_value'
undefined reference to `dm_gpio_free'
undefined reference to `gpio_request_by_name'
Signed-off-by: Michal Simek <michal.simek@amd.com>
[trini: Fix configs which had relied on these select's] Signed-off-by: Tom Rini <trini@konsulko.com>
Ying Sun [Sun, 25 Jun 2023 09:18:21 +0000 (17:18 +0800)]
tpl: Kconfig: TPL_BANNER_PRINT depends on DEBUG_UART && TPL_SERIAL
As implemented in the arch/arm/mach-rockchip/tpl.c file,
the CONFIG_TPL_BANNER_PRINT option will not work
if either of these options is not enabled.
Add dependency constraints to the CONFIG_TPL_BANNER_PRINT option
definition to prevent configuration problems
where option is enabled but do not take effect.
Suggested-by: Yanjie Ren <renyanjie01@gmail.com> Signed-off-by: Ying Sun <sunying@nj.iscas.ac.cn>
Ying Sun [Sun, 25 Jun 2023 08:24:47 +0000 (16:24 +0800)]
cmd: CONFIG_CMD_SAVES depends on CONFIG_CMD_LOADS
CONFIG_CMD_SAVES is used to enable support for the "saveenv" command
and is only implemented in cmd/load.c
when "#if defined(CONFIG_CMD_LOADS)" is met.
It is recommended to add dependency constraints to its definition.
Prevents "saveenv" command from not being supported
when "CONFIG_CMD_SAVES=y CONFIG_CMD_LOADS=n".
Suggested-by: Yanjie Ren <renyanjie01@gmail.com> Signed-off-by: Ying Sun <sunying@nj.iscas.ac.cn> Reviewed-by: Simon Glass <sjg@chromium.org>
Tobias Deiminger [Mon, 19 Jun 2023 22:41:07 +0000 (00:41 +0200)]
test: Find leftovers after clean/mrproper
Docs describe 'make clean' to delete most generated files, 'make
mrproper' to delete current configuration and all generated files. This
test tries to assert it.
Idea is to search remaining files by patterns in copies of the initial
out-of-source build, which has two advantages:
- looking in an out-of-source build dir allows to tell generated source
code from committed source code
- copying is fast (compared to rebuilding each time) which allows to do
a "world clean"
Tobias Deiminger [Mon, 19 Jun 2023 22:41:02 +0000 (00:41 +0200)]
Kbuild: Fix cleanup of generated sources in tools
On 'make clean', generated C files in tools/env/ and tools/boot/ are
currently not removed, but they should.
Auto-generation for shared sources was first introduced with ad80c4a3220b ("kbuild, tools: generate wrapper C sources automatically
by Makefile"). Cleanup later regressed (see Fixes:), because shared
files were moved out of lib/ and common/, but 'clean-dirs := lib common'
was not adjusted accordingly. Further, the generated
tools/env/embedded.c became a sibling to project files, which prevents
directory-wise cleanup at all.
To solve it, we establishe tools/generated/ as the sole place for
generated sources. Wrappers are now generated as
tools/generated/<orig_dirname>/<orig_filename>, and 'make clean' can
remove tools/generated/ as a whole (Linux Makefile.asm-generic headers
are cleaned similarly). This way we don't have to maintain separate
clean-files or clean-dirs entries for each single added or moved wrapper
file.
Fixes: 0649cd0d4908 ("Move environment files from common/ to env/") Fixes: 19a91f2464a8 ("Create a new boot/ directory") Signed-off-by: Tobias Deiminger <tdmg@linutronix.de>
[trini: Correct mkfwupdate case] Signed-off-by: Tom Rini <trini@konsulko.com>
riscv: andes_plicsw: Fix IPI during OpenSBI invocation
On some AE350 boards, we need to explicitly initialize the priority
registers to a non-zero value so the boot hart can instruct secondary
harts to jump to OpenSBI.
This patch also updates the information about PLICSW.
Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Hoegeun Kwon [Wed, 28 Jun 2023 10:19:49 +0000 (19:19 +0900)]
clk: starfive: pll: Fix to use postdiv1_mask
There is a problem that the rates of PLL0 and PLL1 are set incorrectly
because the postdiv1_mask value is incorrectly entered when setting
the pll clk reg. Modify postdiv1's mask value to be put correctly.
Signed-off-by: Hoegeun Kwon <hoegeun.kwon@samsung.com> Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>
projects / u-boot.git / log
