Alexander Graf [Fri, 4 Mar 2016 00:10:06 +0000 (01:10 +0100)]
arm64: Allow EFI payload code to take exceptions
There are 2 ways an EFI payload could return into u-boot:
- Callback function
- Exception
While in EFI payload mode, x18 is owned by the payload and may not contain
a valid pointer to gd, so we need to fix it up. We do that properly for the
payload to callback path already.
This patch also adds gd pointer restoral for the exception path.
Alexander Graf [Fri, 4 Mar 2016 00:10:05 +0000 (01:10 +0100)]
arm64: Allow exceptions to return
Our current arm64 exception handlers all panic and never return to the
exception triggering code.
But if any handler wanted to continue execution after fixups, it would
need help from the exception handling code to restore all registers.
This patch implements that help. With this code, exception handlers on
aarch64 can successfully return to the place the exception happened (or
somewhere else if they modify elr).
Alexander Graf [Fri, 4 Mar 2016 00:10:04 +0000 (01:10 +0100)]
efi_loader: Implement memory allocation and map
The EFI loader needs to maintain views of memory - general system memory
windows as well as used locations inside those and potential runtime service
MMIO windows.
To manage all of these, add a few helpers that maintain an internal
representation of the map the similar to how the EFI API later on reports
it to the application.
For allocations, the scheme is very simple. We basically allow allocations
to replace chunks of previously done maps, so that a new LOADER_DATA
allocation for example can remove a piece of the RAM map. When no specific
address is given, we just take the highest possible address in the lowest
RAM map that fits the allocation size.
Signed-off-by: Alexander Graf <agraf@suse.de> Tested-by: Simon Glass <sjg@chromium.org>
Alexander Graf [Wed, 9 Mar 2016 23:27:20 +0000 (00:27 +0100)]
efi_loader: Add "bootefi" command
In order to execute an EFI application, we need to bridge the gap between
U-Boot's notion of executing images and EFI's notion of doing the same.
The best path forward IMHO here is to stick completely to the way U-Boot
deals with payloads. You manually load them using whatever method to RAM
and then have a simple boot command to execute them. So in our case, you
would do
which then gets you into a grub shell. Fdt information known to U-boot
via the fdt addr command is also passed to the EFI payload.
Signed-off-by: Alexander Graf <agraf@suse.de> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
[trini: Guard help text with CONFIG_SYS_LONGHELP] Signed-off-by: Tom Rini <trini@konsulko.com>
Alexander Graf [Fri, 4 Mar 2016 00:10:02 +0000 (01:10 +0100)]
efi_loader: Add disk interfaces
A EFI applications usually want to access storage devices to load data from.
This patch adds support for EFI disk interfaces. It loops through all block
storage interfaces known to U-Boot and creates an EFI object for each existing
one. EFI applications can then through these objects call U-Boot's read and
write functions.
Signed-off-by: Alexander Graf <agraf@suse.de> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
[trini: Update for various DM changes since posting] Signed-off-by: Tom Rini <trini@konsulko.com>
Alexander Graf [Fri, 4 Mar 2016 00:10:01 +0000 (01:10 +0100)]
efi_loader: Add runtime services
After booting has finished, EFI allows firmware to still interact with the OS
using the "runtime services". These callbacks live in a separate address space,
since they are available long after U-Boot has been overwritten by the OS.
This patch adds enough framework for arbitrary code inside of U-Boot to become
a runtime service with the right section attributes set. For now, we don't make
use of it yet though.
We could maybe in the future map U-boot environment variables to EFI variables
here.
Signed-off-by: Alexander Graf <agraf@suse.de> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
Alexander Graf [Fri, 4 Mar 2016 00:10:00 +0000 (01:10 +0100)]
efi_loader: Add console interface
One of the basic EFI interfaces is the console interface. Using it an EFI
application can interface with the user. This patch implements an EFI console
interface using getc() and putc().
Today, we only implement text based consoles. We also convert the EFI Unicode
characters to UTF-8 on the fly, hoping that everyone managed to jump on the
train by now.
Signed-off-by: Alexander Graf <agraf@suse.de> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
Alexander Graf [Fri, 4 Mar 2016 00:09:59 +0000 (01:09 +0100)]
efi_loader: Add boot time services
When an EFI application runs, it has access to a few descriptor and callback
tables to instruct the EFI compliant firmware to do things for it. The bulk
of those interfaces are "boot time services". They handle all object management,
and memory allocation.
This patch adds support for the boot time services and also exposes a system
table, which is the point of entry descriptor table for EFI payloads.
Signed-off-by: Alexander Graf <agraf@suse.de> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
Alexander Graf [Fri, 4 Mar 2016 00:09:58 +0000 (01:09 +0100)]
efi_loader: Add PE image loader
EFI uses the PE binary format for its application images. Add support to EFI PE
binaries as well as all necessary bits for the "EFI image loader" interfaces.
Signed-off-by: Alexander Graf <agraf@suse.de> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
Alexander Graf [Fri, 4 Mar 2016 00:09:56 +0000 (01:09 +0100)]
disk/part.c: Expose list of available block drivers
We have a pretty nice and generic interface to ask for a specific block
device. However, that one is still based around the magic notion that
we know the driver name.
In order to be able to write fully generic disk access code, expose the
currently internal list to other source files so that they can scan through
all available block drivers.
Signed-off-by: Alexander Graf <agraf@suse.de> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
Alexander Graf [Fri, 4 Mar 2016 00:09:55 +0000 (01:09 +0100)]
arm64: Only allow dcache disabled in SPL builds
Now that we have an easy way to describe memory regions and enable the MMU,
there really shouldn't be anything holding people back from running with
caches enabled on AArch64. To make sure people catch early if they're missing
on the caching fun, give them a compile error.
Alexander Graf [Fri, 4 Mar 2016 00:09:54 +0000 (01:09 +0100)]
arm64: Remove non-full-va map code
By now the code to only have a single page table level with 64k page
size and 42 bit address space is no longer used by any board in tree,
so we can safely remove it.
To clean up code, move the layerscape mmu code to the new defines,
removing redundant field definitions.
Alexander Graf [Fri, 4 Mar 2016 00:09:53 +0000 (01:09 +0100)]
hikey: Add MMU tables
The hikey runs with dcache disabled today. There really should be no reason
not to use caches on AArch64, so let's add MMU definitions and enable the
dcache.
Alexander Graf [Fri, 4 Mar 2016 00:09:52 +0000 (01:09 +0100)]
dwmmc: Increase retry timeout
When enable dcache on HiKey, we're running into MMC command timeouts
because our retry loop is now faster than the eMMC (or an external SD
card) can answer.
Increase the retry count to the same as the timeout value for status
reports.
The real fix is obviously to not base this whole thing on a cycle counter
but on real wall time, but that would be slightly more intrusive.
Alexander Graf [Fri, 4 Mar 2016 00:09:48 +0000 (01:09 +0100)]
thunderx: Move mmu table into board file
The MMU range table can vary depending on things we may only find
out at runtime. While the very simple ThunderX variant does not
change, other boards will, so move the definition from a static
entry in a header file to the board file.
Alexander Graf [Fri, 4 Mar 2016 00:09:47 +0000 (01:09 +0100)]
arm64: Make full va map code more dynamic
The idea to generate our pages tables from an array of memory ranges
is very sound. However, instead of hard coding the code to create up
to 2 levels of 64k granule page tables, we really should just create
normal 4k page tables that allow us to set caching attributes on 2M
or 4k level later on.
So this patch moves the full_va mapping code to 4k page size and
makes it fully flexible to dynamically create as many levels as
necessary for a map (including dynamic 1G/2M pages). It also adds
support to dynamically split a large map into smaller ones when
some code wants to set dcache attributes.
With all this in place, there is very little reason to create your
own page tables in board specific files.
Alexander Graf [Fri, 4 Mar 2016 00:09:46 +0000 (01:09 +0100)]
arm64: Disable TTBR1 maps in EL1
When running in EL1, AArch64 knows two page table maps. One with addresses
that start with all zeros (TTBR0) and one with addresses that start with all
ones (TTBR1).
In U-Boot we don't care about the high up maps, so just disable them to ensure
we don't walk an invalid page table by accident.
Reported-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Alexander Graf <agraf@suse.de>
Alexander Graf [Fri, 4 Mar 2016 00:09:45 +0000 (01:09 +0100)]
thunderx: Calculate TCR dynamically
Based on the memory map we can determine a lot of hard coded fields of
TCR, like the maximum VA and max PA we want to support. Calculate those
dynamically to reduce the chance for pit falls.
This adds support for the omap4 reboot mode mechanism and exports the reboot
mode via an environment variable, that is used in the boot command to make it
possible to boot from the recovery partition or fastboot.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
power: twl6030: Clear VUSB_IN_PMID bit on USB device setup
When booting from USB, the bootrom sets the VUSB_IN_PMID bit of the MISC2
register of the TWL6030. However, U-Boot sets the VUSB_IN_VSYS bit to enable
VBUS input. As both bits are contradictory, enabling both disables the input,
according to the TWL6030 TRM.
Thus, we need to clear the VUSB_IN_PMID bit in case of an USB boot (which could
just as well be a memory boot after USB timed out).
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
omap-common: clocks-common: Setup USB DPLL when MUSB is in use
On (at least) OMAP4, the USB DPLL is required to be setup for the internal PHY
to work properly. The internal PHY is used by default with the MUSB USB OTG
controller.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
omap4: Move i2c clocks enable to enable_basic_clocks
I2C is often enabled withing the U-Boot SPL, thus those clocks are required to
be enabled early (especially when the bootrom doesn't enable them for us).
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Individual boards might provide their own emif_get_device_timings function and
use the jedec timings in their own way, hence those have to be exported.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Individual boards might provide their own emif_get_device_timings function and
use the elpidia timings in their own way, hence those have to be exported.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Individual boards might provide their own emif_get_device_details function and
use elpidia device details in their own way, hence those have to be exported.
This also wraps existing definitions with the proper ifdef logic.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
power: twl6030: Device-index-specific MMC power initialization
Not every device has multiple MMC slots available, so it makes sense to enable
only the required LDOs for the available slots. Generic code in omap_hsmmc will
enable both VMMC and VAUX1, in doubt.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
power: twl6030: Enable VAUX1 for eMMC power, depending on BOOT2 value
This enables the VAUX1 supply, used for eMMC power in standard configurations.
Its voltage is determined by the value of the BOOT2 pin of the TWL6030.
Note that the TWL6030 might already have enabled this regulator at startup
(depending on the value of the BOOT3 pin of the TWL6030), according to the
TWL6030 datasheet.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
This switches reboot mode handling to a string-based interface, that allows more
flexibility to set a common interface with the next generations of OMAP devices.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Reviewed-by: Tom Rini <trini@konsulko.com>
Lokesh Vutla [Tue, 8 Mar 2016 04:40:20 +0000 (10:10 +0530)]
ARM: DRA72-evm: Update mux and VIRTUAL/MANUAL mode timings
All the mux configurations needs to be done as part of the IODelay
sequence to avoid glitch. Adding all the mux configuration, MANUAL/VIRTUAL
mode configuration as needed for DRA72-evm.
Also update the mux for SD card detect on DRA74-evm.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Vignesh R <vigneshr@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Lokesh Vutla [Tue, 8 Mar 2016 03:48:09 +0000 (09:18 +0530)]
ARM: DRA7-evm: Update memory info in banks
Updating the memory banks properly so that DT is populated accordingly.
And updating this only after DDR is properly detected by eeprom, so that
git bisect is still maintained.
Lokesh Vutla [Tue, 8 Mar 2016 03:48:08 +0000 (09:18 +0530)]
ARM: DRA7: EMIF: Add 4GB DDR settings
The REVH and later versions of DRA7-evm uses MICRON MT41K512M16HA-125 memory
chips which is of size 4GB(2GB on EMIF1 and 2GB on EMIF2). Add support for the
same.
Lokesh Vutla [Tue, 8 Mar 2016 03:48:06 +0000 (09:18 +0530)]
ARM: DRA7: Move emif settings to board specific files
The newer versions of DRA7 boards has EEPROM populated with DDR
size specified in it. Moving DRA7 specific emif related settings
to board files so that emif settings can be identified based on EEPROM.
Lokesh Vutla [Tue, 8 Mar 2016 03:48:04 +0000 (09:18 +0530)]
ti: common: dra7: Add standard access for board description EEPROM
DRA7 EVM revH and later EVMs have EEPROM populated that can contain board
description information such as name, revision, DDR definition, etc. Adding
support for this EEPROM format.
Adam Ford [Tue, 8 Mar 2016 03:08:49 +0000 (21:08 -0600)]
ARM: Various: Future-proof serial platdata
A few boards still use ns16550_platdata structures, but assume the structure
is going to be in a specific order. By explicitly naming each entry,
this should also help 'future-proof' in the event the structure changes.
Tested on the Logic PD Torpedo + Wireless.
I only changed a handful of devices that used the same syntax as the Logic
board. Appologies if I missed one or stepped on toes. Thanks to Derald Woods
and Alexander Graf.
Signed-off-by: Adam Ford <aford173@gmail.com>
V6: Add fix to arch/arm/cpu/armv7/am33xx/board.c
V5: Add fix to arch/arm/cpu/arm926ejs/lpc32xx/devices.c
V4: Fix subject heading
V3: Remove reg_offset out in all the structs. It was reverted out, and and if
it did exist, it would get initialized to 0 by default.
V2: I hastily copy-pasted the boards without looking at the UART number.
This addresses 3 boards that use UART3 and not UART1. Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Lokesh Vutla [Mon, 7 Mar 2016 09:19:54 +0000 (14:49 +0530)]
ARM: OMAP4+: Allow arch specfic code to use early DM
Early system initialization is being done before initf_dm is being called
in U-Boot. Then system will fail to boot if any of the DM enabled driver
is being called in this system initialization code. So, rearrange the
code a bit so that DM enabled drivers can be called during early system
initialization.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Lokesh Vutla [Sat, 5 Mar 2016 12:02:30 +0000 (17:32 +0530)]
ARM: DRA7: emif: Check for enable bits before updating leveling output
Read and write leveling can be enabled independently. Check for these
enable bits before updating the read and write leveling output values.
This will allow to use the combination of software and hardware leveling.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Lokesh Vutla [Sat, 5 Mar 2016 12:02:29 +0000 (17:32 +0530)]
ARM: DRA7: emif: Fix DDR init sequence during warm reset
Commit (20fae0a - ARM: DRA7: DDR: Enable SR in Power Management Control)
enables Self refresh mode by default and during warm reset the EMIF
contents are preserved. After warm reset EMIF sees that it is idle and
puts DDR in self-refresh. When in SR, leveling operations cannot be done
as DDR can only accept SR exit command, so its hanging during warm reset.
In order to fix this reset the power management control register before
EMIF initialization if it is a warm reset.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Lokesh Vutla [Sat, 5 Mar 2016 11:10:32 +0000 (16:40 +0530)]
dm: omap_timer: Fix conversion of address to a pointer
OMAP timer driver directly typecasts fdt_addr_t to a pointer. This is
not strictly correct, as it gives a build warning when fdt_addr_t is u64.
So, use map_physmem for a proper typecasts.
This is inspired by commit 167efe01bc5a9 ("dm: ns16550: Use an address
instead of a pointer for the uart base")
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Because KS2 u-boot works in 32 bit address space the existing ram_size
global data field cannot be used. The maximum, which the get_ram_size()
can detect is 2GB only. The ft_board_setup() needs the actual ddr3 size
to fix up dtb.
This commit introduces the ddr3_get_size() which uses SPD data to
calculate the ddr3 size. This function replaces the "ddr3_size"
environment variable, which was used to get the SODIMM size.
For platforms, which don't have SODIMM with SPD and ddr3 is populated to
a board a simple ddr3_get_size function that returns ddr3 size has to be
implemented. See hardware-k2l.h
ARM: keystone2: use SPD info to configure K2HK and K2E DDR3
This commit replaces hard-coded EMIF and PHY DDR3 configurations for
predefined SODIMMs to a calculated configuration. The SODIMM parameters
are read from SODIMM's SPD and used to calculated the configuration.
The current commit supports calculation for DDR3 with 1600MHz and 1333MHz
only.
Lokesh Vutla [Fri, 4 Mar 2016 16:36:41 +0000 (10:36 -0600)]
ARM: keystone2: K2G: Add support for different arm/device speeds
The maximum device and arm speeds can be determined by reading
EFUSE_BOOTROM register. As there is already a framework for reading this
register, adding support for all possible speeds on k2g devices.
Lokesh Vutla [Fri, 4 Mar 2016 16:36:40 +0000 (10:36 -0600)]
ARM: keystone2: Allow for board specific speed definitions
Its not compulsory that speed definition should be same on EFUSE_BOOTROM
register for all keystone 2 devices. So, allow for board specific
speed definitions.
Suman Anna [Fri, 4 Mar 2016 16:36:39 +0000 (10:36 -0600)]
ARM: keystone2: K2G: power-off DSP during boot
The DSPs are powered on by default upon a Power ON reset, and
they are powered off on current Keystone 2 SoCs - K2HK, K2L, K2E
during the boot in u-boot. This is not functional on K2G though.
Extend the existing DSP power-off support to the only DSP present
on K2G. Do note that the PSC clock domain module id for DSP on K2G
differs from that of previous Keystone2 SoCs.
Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Suman Anna [Fri, 4 Mar 2016 16:36:38 +0000 (10:36 -0600)]
ARM: keystone2: Use macro for DSP GEM power domain
Define a macro for the DSP GEM power domain id number and
use it instead of a hard-coded number in the code that
disables all the DSPs on various Keystone2 SoCs.
Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Stefan Roese [Thu, 3 Mar 2016 08:34:12 +0000 (09:34 +0100)]
lib/crc16.c: Rename cyg_crc16() to crc16_ccitt() and add crc start value
The original name of this function is unclear. This patch renames this
CRC16 function to crc16_ccitt() matching its name with its
implementation.
To make the usage of this function more flexible, lets add the CRC start
value as parameter to this function. This way it can be used by other
functions requiring different start values than 0 as well.
Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com>
David Lechner [Fri, 26 Feb 2016 06:46:07 +0000 (00:46 -0600)]
arm: Add support for LEGO MINDSTORMS EV3
This is based on the davinci da850evm. It can boot from either the
on-board 16MB flash or from a microSD card. It also reads board
information from an I2C EEPROM.
The EV3 itself initally boots from write-protected EEPROM, so no
u-boot SPL is needed.
Signed-off-by: David Lechner <david@lechnology.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Nishanth Menon [Thu, 25 Feb 2016 18:53:47 +0000 (12:53 -0600)]
configs: k2g_evm: Add TI power processor support
Enable support for PMMC the TI power processor on K2G. This processor
manages all power management related activities on the SoC and and
allows the Operating Systems on compute processors such as ARM, DSP to
offload the power logic away into the power processor.
Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Nishanth Menon [Thu, 25 Feb 2016 18:53:46 +0000 (12:53 -0600)]
ARM: dts: k2g: Add support for PMMC
Enable support for PMMC the TI power processor on K2G. This processor
manages all power management related activities on the SoC and and
allows the Operating Systems on compute processors such as ARM, DSP to
offload the power logic away into the power processor. U-boot just has a
load responsibility, hence the view of the hardware from a bootloader
perspective is different from the view of hardware from a Operating
System perspective. While bootloader just loads up the firmware,
Operating Systems look at the resultant system as "hardware".
Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Nishanth Menon [Thu, 25 Feb 2016 18:53:45 +0000 (12:53 -0600)]
remoteproc: Add support for TI power processor
Many TI System on Chip (SoC) solutions do have a dedicated
microcontroller for doing power management functionality. These include
the AM335x, AM437x, Keystone K2G SoCs. The functionality provided by
these microcontrollers and the communication mechanisms vary very
widely. However, we are able to consolidate some basic functionality to
be generic enough starting with K2G SoC family. Introduce a basic remote
proc driver to support these microcontrollers. In fact, on SoCs starting
with K2G, basic power management functions are primarily accessible for
the High Level Operating Systems(HLOS) via these microcontroller solutions.
Hence, having these started at a bootloader level is pretty much
mandatory.
Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Nishanth Menon [Thu, 25 Feb 2016 18:53:44 +0000 (12:53 -0600)]
ARM: keystone2: psc: introduce function to hold and release module in reset.
These are useful for modules that need to be held in reset and are
enabled for data to be loaded on to them. Typically these are
microcontrollers or other processing entities in the system.
Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Nishanth Menon [Thu, 25 Feb 2016 18:53:42 +0000 (12:53 -0600)]
ARM: keystone2: psc: redo doc in kernel-doc format
u-boot coding style guidance in
http://www.denx.de/wiki/U-Boot/CodingStyle clearly mentions that the
kernel doc style shall be followed for documentation in u-boot.
Current PSC documentation standard does not, so fix that.
Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Nishanth Menon [Wed, 24 Feb 2016 23:48:43 +0000 (17:48 -0600)]
ARM: keystone2: Get rid of unused clock files
With commit fe772ebd285b ("ARM: keystone2: Use common definition for
clk_get_rate"), we have centralized the clock code into a common clock
logic and the redundant files, unfortunately remained... Clean that
up.
Kipisz, Steven [Wed, 24 Feb 2016 18:30:58 +0000 (12:30 -0600)]
board: ti: AM57xx: Add detection logic for AM57xx-evm
Current AM57xx evm supports both BeagleBoard-X15
(http://beagleboard.org/x15) and AM57xx EVM
(http://www.ti.com/tool/tmdxevm5728).
The AM572x EValuation Module(EVM) provides an affordable platform to
quickly start evaluation of Sitara. ARM Cortex-A15 AM57x Processors
(AM5728, AM5726, AM5718, AM5716) and accelerate development for HMI,
machine vision, networking, medical imaging and many other industrial
applications. This EVM is based on the same BeagleBoard-X15 Chassis
and adds mPCIe, mSATA, LCD, touchscreen, Camera, push button and TI's
wlink8 offering.
Since the EEPROM contents are compatible between the BeagleBoard-X15 and
the AM57xx-evm, we add support for the detection logic to enable
support for various user programmable scripting capability.
NOTE: U-boot configuration is currently a superset of AM57xx evm and
BeagleBoard-X15 and no additional configuration tweaking is needed.
This change also sets up the stage for future support of TI AM57xx EVMs
to the same base bootloader build.
Signed-off-by: Steve Kipisz <s-kipisz2@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Kipisz, Steven [Wed, 24 Feb 2016 18:30:57 +0000 (12:30 -0600)]
ARM: OMAP4/5: Add generic board detection hook
Many TI EVMs have capability to store relevant board information
such as DDR description in EEPROM. Further many pad configuration
variations can occur as part of revision changes in the platform.
In-order to support these at runtime, we for a board detection hook
which is available for override from board files that may desire to do
so.
NOTE: All TI EVMs are capable of detecting board information based on
early clocks that are configured. However, in case of additional needs
this can be achieved within the override logic from within the board
file.
Signed-off-by: Steve Kipisz <s-kipisz2@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Lokesh Vutla [Wed, 24 Feb 2016 18:30:54 +0000 (12:30 -0600)]
ARM: omap-common: Add standard access for board description EEPROM
Several TI EVMs have EEPROM that can contain board description information
such as revision, DDR definition, serial number, etc. In just about all
cases, these EEPROM are on the I2C bus and provides us the opportunity
to centralize the generic operations involved.
The on-board EEPROM on the BeagleBone Black, BeagleBone, AM335x EVM,
AM43x GP EVM, AM57xx-evm, BeagleBoard-X15 share the same format.
However, DRA-7* EVMs, OMAP4SDP use a modified format.
We hence introduce logic which is generic between these platforms
without enforcing any specific format. This allows the boards to use the
relevant format for operations that they might choose.
This module will compile for all TI SoC based boards when
CONFIG_TI_I2C_BOARD_DETECT is enabled to have optimal build times for
platforms that require this support.
It is important to note that this logic is fundamental to the board
configuration process such as DDR configuration which is needed in
SPL, hence cannot be part of the standard u-boot driver model (which
is available later in the process). Hence, to aid efficiency, the
eeprom contents are copied over to SRAM scratchpad memory area at the
first invocation to retrieve data.
To prevent churn with cases such as DRA7, where eeprom format maybe
incompatible, we introduce a generic common format in eeprom which
is made available over accessor functions for usage.
Special handling for BBG1 EEPROM had to be introduced thanks to the
weird eeprom rev contents used.
The follow on patches introduce the use of this library for AM335x,
AM437x, and AM57xx.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Steve Kipisz <s-kipisz2@ti.com> Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Kipisz, Steven [Wed, 24 Feb 2016 18:30:52 +0000 (12:30 -0600)]
ARM: OMAP4/5: Centralize early clock initialization
Early clock initialization is currently done in two stages for OMAP4/5
SoCs. The first stage is the initialization of console clocks and
then we initialize basic clocks for functionality necessary for SoC
initialization and basic board functionality.
By splitting up prcm_init and centralizing this clock initialization,
we setup the code for follow on patches that can do board specific
initialization such as board detection which will depend on these
basic clocks.
As part of this change, since the early clock initialization
is centralized, we no longer need to expose the console clock
initialization.
NOTE: we change the sequence slightly by initializing console clocks
timer after the io settings are complete, but this is not expected
to have any functioanlity impact since we setup the basic IO drive
strength initialization as part of do_io_settings.
Signed-off-by: Steve Kipisz <s-kipisz2@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
projects / u-boot.git / log
