Heiko Stuebner [Mon, 8 Oct 2018 11:01:56 +0000 (13:01 +0200)]
rockchip: rk3188: add support for usb-uart functionality
Rockchip socs can route the debug uart pins through the d+ and d- pins
of one specific usbphy per soc. Add a config option and implement the
setting on the rk3188.
Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
[Fixed up to mark grf as maybe unused:] Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
dts: arm: socfpga: merge gen5 devicetrees from linux
Add -u-boot.dtsi files to keep the current U-Boot behaviour:
- add u-boot,dm-pre-reloc where required
- disable watchdog
- set uart clock frequency
- add gpio bank-name properties
where appropriate:
- make qspi work (add alias for spi0, fix compatible for flash)
- enable usb (status okay, add alias for udc0)
Adapt board dts files that are not in Linux to keep their old
behaviour.
Change licenses to SPDX.
(Patman warnings/errors are in 1:1 copied files from Linux)
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
gpio: dwapb_gpio: fix binding without bank-name property
As a preparation for merging the socfpga gen5 devicetree files
from Linux, this patch makes the dwapb gpio driver work correctly
without the 'bank-name' property on the gpio-controller nodes.
This property is not present in the Linux drivers and thus is not
present in the Linux devicetrees. It is only used to access pins
via bank name.
This fallback is necessary since without it, the driver will
return an error code which will lead to an error in U-Boot
startup.
The bank names will still be added to the default board device
trees in follow-up patch, but other boards using this driver and
not including the bank name should also work with the socfpga.dtsi
without adding the bank-name property.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Ryder Lee [Thu, 15 Nov 2018 02:08:02 +0000 (10:08 +0800)]
serial: MediaTek: add high-speed uart driver for MediaTek SoCs
Many SoCs from MediaTek have a high-speed uart. This UART is compatible
with the ns16550 in legacy mode. It has extra registers for high-speed
mode which can reach a maximum baudrate at 921600.
However this UART will no longer be compatible if it's in high-speed mode.
Some BootROM of MediaTek's SoCs will change the UART into high-speed mode
and the U-Boot must use this driver to initialize the UART.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com> Tested-by: Ryder Lee <ryder.lee@mediatek.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Ryder Lee [Thu, 15 Nov 2018 02:08:00 +0000 (10:08 +0800)]
power domain: MediaTek: add power domain driver for MT7629 SoC
This adds a power domain driver for the Mediatek SCPSYS unit.
The System Control Processor System (SCPSYS) has several power
management related tasks in the system. The tasks include thermal
measurement, dynamic voltage frequency scaling (DVFS), interrupt
filter and lowlevel sleep control. The System Power Manager (SPM)
inside the SCPSYS is for the MTCMOS power domain control.
For now this driver only adds power domain support.
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Ryder Lee [Thu, 15 Nov 2018 02:07:58 +0000 (10:07 +0800)]
pinctrl: MediaTek: add pinctrl driver for MT7629 SoC
This patch adds pinctrl support for MT7629 SoC. The IO core found on
the SoC has the registers for pinctrl, pinconf and gpio mixed up in
the same register range. Hence the driver also implements the gpio
functionality through UCLASS_GPIO.
This also creates a common file as there might be other chips that use
the same binding and driver, then being a little more abstract could
help in the long run.
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Ryder Lee [Thu, 15 Nov 2018 02:07:54 +0000 (10:07 +0800)]
clk: MediaTek: add clock driver for MT7629 SoC.
This patch adds clock modules for MediaTek SoCs:
- Shared part: a common driver which contains the general operations
for plls, muxes, dividers and gates so that we can reuse it in future.
- Specific SoC part: the group of structures used to hold the hardware
configuration for each SoC.
We take MT7629 as an example to demonstrate how to implement driver if
any other MediaTek chips would like to use it.
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Ryder Lee [Thu, 15 Nov 2018 02:07:51 +0000 (10:07 +0800)]
arm: dts: MediaTek: add device tree for MT7623
This adds device tree for MT7623 development board - Bananapi R2
Detailed hardware information for BPI-R2 which could be found on
http://wiki.banana-pi.org/Banana_Pi_BPI-R2.
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com> Tested-by: Matthias Brugger <matthias.bgg@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Marcin Niestroj [Wed, 21 Nov 2018 19:32:02 +0000 (20:32 +0100)]
ARM: chiliboard: move towards driver model and device-tree boot
This patch mostly enables DM drivers in board defconfig and all their
dependencies. Additionally we remove ethernet platform data, as all
details are in device-tree now.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Otavio Salvador [Tue, 20 Nov 2018 18:47:12 +0000 (16:47 -0200)]
ARM: vexpress_*_defconfig: Enable CMD_UBI support
This allow for convenient use of QEMU machine to test loading of UBI
filesystem. There are a couple of changes made together of this which
are required:
1) The malloc must be at least 512 KiB to allow the use of UBI
filesystem. We are going to enable it in a next patch.
2) MTD_DEVICE must be enabled, otherwise we get missing symbols
during the build
Adam Ford [Tue, 20 Nov 2018 14:43:13 +0000 (08:43 -0600)]
board: da8xxevm: Fix Environmental CRC error
When the spi_flash_probe_bus_cs() was previously called, it was
called using 0's for two values where CONFIG_ENV_SPI_MAX_HZ and
CONFIG_ENV_SPI_MODE are now used. When changed this
caused the environment to fail the CRC check and the default
was used. This patch defines both of these values back 0.
Fixes: 25a17652c9c2 ("fix: env: Fix the SPI flash device setup
for DM mode")
Andrew F. Davis [Mon, 19 Nov 2018 20:47:53 +0000 (14:47 -0600)]
ARM: armv7: Add early stack for erratum workarounds
Some erratum workarounds call into C code before the stack
is setup, this can lead to values pushed onto the stack
being lost, firewall exceptions, and other undefined behavior.
Setup a temporary stack to allow these functions to work
correctly.
Signed-off-by: Andrew F. Davis <afd@ti.com> Acked-by: Andreas Dannenberg <dannenberg@ti.com> Reviewed-by: Nishanth Menon <nm@ti.com>
Recent removal of obsolete partition led to shifting of starting address
of "reserved" partition (which reflects U-Boot environment). Fix its
start address to keep it in sync with ENV_OFFSET and DFU environment.
This patch also provides fixed start address for "reserved" partition,
so that we can track when it's shifted next time.
While at it, move it before "misc" partition to keep all Android
partitions together.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Acked-By: Praneeth Bajjuri <praneeth@ti.com>
Lokesh Vutla [Thu, 15 Nov 2018 05:34:50 +0000 (11:04 +0530)]
armv7r: K3: Allow SPL to run only on core 0
Based on the MCU R5 efuse settings, R5F cores in MCU domain
either work in split mode or in lock step mode.
If efuse settings are in lockstep mode: ROM release R5 cores
and SPL continues to run on the R5 core is lockstep mode.
If efuse settings are in split mode: ROM releases both the R5
cores simultaneously and allow SPL to run on both the cores.
In this case it is bootloader's responsibility to detect core
1 and park it. Else both the core will be running bootloader
independently which might result in an unexpected behaviour.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
with this patch the selected Entry in bootmenu can be set by
environment-var bootmenu_default=<number> Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
This fixes link issues when building the SPL without USB driver model
but with USB storage support. CONFIG_BLK can be enabled and disabled
independently for SPL and non-SPL builds. We leverage that existing
functionality here.
Signed-off-by: Sven Schwermer <sven@svenschwermer.de>
Sven Schwermer [Wed, 21 Nov 2018 07:43:56 +0000 (08:43 +0100)]
usb: s/CONFIG_DM_USB/CONFIG_IS_ENABLED(DM_USB)/
This allows to disable the USB driver model in SPL because it checks
the CONFIG_SPL_DM_USB variable for SPL builds. Nothing changes for
regular non-SPL builds.
Signed-off-by: Sven Schwermer <sven@svenschwermer.de>
Sven Schwermer [Wed, 21 Nov 2018 07:43:55 +0000 (08:43 +0100)]
usb: Remove CMD_USB dependency for common code
Common USB code is built whenever USB is enabled (in non-SPL builds).
The USB uclass is built whenever (SPL_)DM_USB is enabled. Both need to
be independent from CMD_USB.
Signed-off-by: Sven Schwermer <sven@svenschwermer.de>
Sven Schwermer [Wed, 21 Nov 2018 07:43:53 +0000 (08:43 +0100)]
usb: Introduce CONFIG_SPL_DM_USB
This allows building the SPL without driver model for USB. Since
CONFIG_SPL_DM_USB is enabled if and only if CONFIG_DM_USB was enabled
before, this patch does not change the build behaviour.
Signed-off-by: Sven Schwermer <sven@svenschwermer.de>
Neil Armstrong [Fri, 27 Jul 2018 12:10:00 +0000 (14:10 +0200)]
ARM: meson: Add boot device discovery
The Amlogic Meson SoCs ROM supports a boot over USB with a custom protocol.
When no other boot medium are available (or by forcing the USB mode), the
ROM sets the primary USB port as device mode and waits for a Host to
enumerate.
When enumerated, a custom protocol described at [1] permits writing to
memory and execute some specific FIP init code to run the loaded
Arm Trusted Firmware BL2 and BL3 stages before running the BL33 stage.
In this mode, we can load different binaries that can be used by U-boot
like a script image file.
This adds support for a custom USB boot stage only available when the
boot mode is USB and the script file at a pre-defined address is valid.
This support was heavily copied from the Sunxi Allwinner FEL U-Boot support.
The tool pyamlboot described at [2], permits using this boot mode on boards
exposing the first USB port, either as OTG or Host port.
Jerome Brunet [Wed, 24 Oct 2018 12:57:54 +0000 (14:57 +0200)]
ARM: meson: factorize common code out amlogic's boards
Now we have moved all the Amlogic board support to common generic board code,
we can move the identical board_init() and ft_board_setup() functions to
weak functions into the board-common mach-meson file.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Neil Armstrong [Wed, 5 Sep 2018 13:56:52 +0000 (15:56 +0200)]
ARM: dts: Sync Amlogic Meson AXG DT from Linux 4.20-rc1
Synchronize the Amlogic AXG Device Tree files and bindings include from
the recent Linux 4.20-rc1, because it includes patches fixing support for
U-boot.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Neil Armstrong [Wed, 5 Sep 2018 13:56:12 +0000 (15:56 +0200)]
ARM: meson: Add support for AXG family
This patch adds support for the Amlogic AXG SoC, which is very close from
the Amlogic GXL SoCs with :
- Same 4xCortex-A53 CPUs but clocked at 1.2GHZ max
- DDR Interface limited to DDR4 16bit
- The whole physical register address space has been moved to 0xfxxxxxxx
- The pinctrl setup has changed
- The clock tree is different enough to use a different driver
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Jerome Brunet [Fri, 5 Oct 2018 15:00:37 +0000 (17:00 +0200)]
ARM: meson: rework soc arch file to prepare for new SoC
We are about to add support for the Amlogic AXG SoC. While very close to
the Gx SoC family, we will need to handle a few thing which are different
in this SoC. Rework the meson arch directory to prepare for this.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Jerome Brunet [Fri, 5 Oct 2018 07:35:26 +0000 (09:35 +0200)]
pinctrl: meson: rework gx pmx function
In preparation of supporting the new Amlogix AGX SoCs, we need to move
the Amlogic GX pinmux functions out of the common code to be able to
add a different set of SoC specific pinmux functions for AXG.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Jerome Brunet [Wed, 24 Oct 2018 14:27:51 +0000 (16:27 +0200)]
configs: meson: change default load addresses
The original chosen addresses conflict with the BL2 initialisation.
So far there was no issue with them but if we preload binaries in
RAM (ROMUSB boot) before running the BL2 they get corrupted by the
execution of BL2 init.
If we load them around 0x08000000, there is no such issue.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Jerome Brunet [Thu, 25 Oct 2018 14:41:37 +0000 (16:41 +0200)]
ARM: rework amlogic configuration
Rework the board SYS_BOARD, SYS_VENDOR and SYS_CONFIG_NAME setup by moving
the board Kconfig into the mach-meson Kconfig to make it easier to add
new boards for a SoC architecture and add a custom config header or custom
board handler for a platform.
This drops the board CONFIGs and the duplicate boards configs headers in
favor of a single meson64.h config header.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Jerome Brunet [Fri, 19 Oct 2018 11:27:40 +0000 (13:27 +0200)]
board: amlogic: factorise gxbb boards
The nanopi-k2 and the odroid-c2 are similar enough to be supported
by the same u-boot board. This change use odroid-c2 u-boot board
for the nanopi-k2 as well. Dedicated defconfig are kept to customize
the names and device tree.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Jerome Brunet [Fri, 19 Oct 2018 10:14:57 +0000 (12:14 +0200)]
board: amlogic: remove p212 derivatives
The Khadas vim and the libretech aml-s905x-cc (aka Potato) derive
from amlogic s905x reference design (P212).
All the code in these board is a copy/paste from the p212, which is
tedious to maintain. This change use p212 u-boot board for all these
boards, while keeping a dedicated defconfig to customize the names
and device tree.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
MESON_FDTFILE_SETTING is used to define the default name of the fdt
file in u-boot environment. We can easily derive it from
CONFIG_DEFAULT_DEVICE_TREE instead. This will help factorize the code
a bit
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Jerome Brunet [Fri, 5 Oct 2018 08:25:47 +0000 (10:25 +0200)]
ARM: meson: clean-up platform selection
Even if multiple board are selected through Kconfig, u-boot will only
compile one. This makes sense since compiling these targets will export
global symbols, such as board_init()
The change rework amlogic Kconfig so only one board may be selected at
a time
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Simon Glass [Fri, 16 Nov 2018 01:44:09 +0000 (18:44 -0700)]
spl: Add support for passing handoff info to U-Boot proper
There is some basic informaton that SPL normally wants to pass through to
U-Boot, such as the SDRAM size and bank information.
Mkae use of the new bloblist structure for this. Add a new 'handoff' blob
which is set up in SPL and passed to U-Boot proper. Also adda test for
sandbox_spl that checks that this works correctly and a new 'sb' command
to show the information passed from SPL.
Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Fri, 16 Nov 2018 01:44:08 +0000 (18:44 -0700)]
sandbox: Boot in U-Boot through the standard call
Most architectures use jump_to_image_no_args() to jump from SPL to U-Boot.
At present sandbox is special in that it jumps in its
spl_board_load_image() call. This is not strictly correct, and means that
sandbox misses out some parts of board_init_r(), just as calling
bloblist_finish(), for example.
Change spl_board_load_image() to just identify the filename to boot, and
implement jump_to_image_no_args() to actually jump to it.
Simon Glass [Fri, 16 Nov 2018 01:44:07 +0000 (18:44 -0700)]
sandbox: Filter arguments when starting U-Boot
The current method of starting U-Boot from U-Boot adds arguments to pass
the memory file through, so that memory is preserved. This is fine for a
single call, but if we call from TPL -> SPL -> U-Boot the arguments build
up and we have several memory files in the argument list.
Adjust the implementation to filter out arguments that we want to replace
with new ones. Also print a useful error if the exec() call fails.
Simon Glass [Fri, 16 Nov 2018 01:44:06 +0000 (18:44 -0700)]
sandbox: Use malloc() and free() from os layer
At present sandbox calls malloc() from various places in the OS layer and
this results in calls to U-Boot's malloc() implementation. It is better to
use the on in the OS layer, since it does not mix allocations with the
main U-Boot code.
Fix this by replacing calls with malloc() to os_malloc(), etc.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Simon Glass [Fri, 16 Nov 2018 01:44:04 +0000 (18:44 -0700)]
sandbox: Allow puts() output before global_data is set up
We support putc() in this case but not puts(), but this is more useful
since it is what printf() uses.
This particularly affects debugging early in SPL, where currently printf()
statements result in no output. Fix this by adding a special case into
puts() for sandbox, just like putc().
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Simon Glass [Fri, 16 Nov 2018 01:44:03 +0000 (18:44 -0700)]
sandbox: Add a new 'sb' command
The old 'sb' command was deprecated in 2015 and replaced with 'host'. It
is useful to be able to access some internal sandbox state, particularly
for testing.
Resurrect the old command and provide a way to print some basic state
information (currently just the arguments to sandbox).
Simon Glass [Fri, 16 Nov 2018 01:44:02 +0000 (18:44 -0700)]
sandbox: Drop the deprecated 'sb' command
The old 'sb' command was deprecated in 2015 and replaced with 'host'.
Remove the remaining users and the command, so that the name is available
for other purposes.
Simon Glass [Fri, 16 Nov 2018 01:44:00 +0000 (18:44 -0700)]
test/py: Add a way to pass flags to sandbox
It is sometimes useful to restart sandbox with some particular flags to
test certain functionality. Add a new method to ConsoleSandbox to handle
this, without changing the existing APIs.
Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com>
Simon Glass [Fri, 16 Nov 2018 01:43:58 +0000 (18:43 -0700)]
spl: Add a comment to spl_set_bd()
There is a strange feature to set global_data to a data-section variable
early in SPL. This only works if SPL actually has access to SRAM which is
not the case on x86, for eaxmple. Add a comment to this effect.
Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Fri, 16 Nov 2018 01:43:56 +0000 (18:43 -0700)]
spl: Add a define for SPL_TPL_PROMPT
We should use a macro rather than hard-coding the SPL prompt to 'spl'
since the code can be used by TPL too. Add a macro that works for both
and use it in various places.
This allows TPL to use the same code without printing confusing messages.
Note that the string is lower case ('spl', 'tpl') which is a change from
previously.
Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Fri, 16 Nov 2018 01:43:55 +0000 (18:43 -0700)]
spl: Support hash, input, pch, pci, rtc, tpm in SPL
At present these subsystems are only supported in U-Boot proper but it is
sometimes necessary to support them in SPL, or even TPL. Update the
Kconfig and Makefile to support this. Also adjust GPIO so that it can be
used in TPL if required.
Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Fri, 16 Nov 2018 01:43:50 +0000 (18:43 -0700)]
Add core support for a bloblist to convey data from SPL
At present there is no standard way in U-Boot to pass information from SPL
to U-Boot proper. But sometimes SPL wants to convey information to U-Boot
that U-Boot cannot easily figure out. For example, if SPL sets up SDRAM
then it might want to pass the size of SDRAM, or the location of each
bank, to U-Boot proper.
Add a new 'bloblist' feature which provides this. A bloblist is set up in
the first phase of U-Boot that runs (i.e. TPL or SPL). The location of
this info may be in SRAM or CAR (x86 cache-as-RAM) or somewhere else.
Information placed in this region is preserved (with a checksum) through
TPL and SPL and ends up in U-Boot. At this point it is copied into SDRAM
so it can be used after relocation.
Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Andreas Dannenberg <dannenberg@ti.com>
AndeStar RISC-V(V5) provide mcache_ctl register which
can configure I/D cache as enabled or disabled.
This CSR will be encapsulated by CONFIG_RISCV_NDS.
If you want to configure cache on AndeStar V5
AE350 platform. YOu can enable [*] AndeStar V5 ISA support
by make menuconfig.
This approach also provide the expansion when the
vender specific features are going to join in.
Signed-off-by: Rick Chen <rick@andestech.com> Cc: Greentime Hu <greentime@andestech.com>
Rick Chen [Tue, 13 Nov 2018 07:13:34 +0000 (15:13 +0800)]
riscv: dts: Sync to Linux Kernel ae350 dts.
Use same dts to boot U-Boot and Kernel.
Following are the change notes :
1 Remove early printk bootargs.
2 Timer frequency are changed to 60MHz.
3 Add dma, snd, lcd, virtio nodes which are used
in kernel drivers. They does not been used by U-Boot.
4 Change spi irq from 3 to 4.
Signed-off-by: Rick Chen <rick@andestech.com> Cc: Greentime Hu <greentime@andestech.com>
Lukas Auer [Thu, 22 Nov 2018 10:26:37 +0000 (11:26 +0100)]
riscv: qemu: clear kernel-start/-end in device tree as workaround for BBL
QEMU specifies the location of Linux (supplied with the -kernel
argument) in the device tree using the riscv,kernel-start and
riscv,kernel-end properties. We currently rely on the SBI implementation
of BBL to run Linux and therefore embed Linux as payload in BBL. This
causes an issue, because BBL detects the kernel properties in the device
tree and ignores the Linux payload as a result.
Work around this issue by clearing the kernel properties in the device
tree before booting Linux.
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
projects / u-boot.git / log
![6 years agoriscv: cache: Implement i/dcache [status, enable, disable]](/img/sics.gif?p=u-boot.git;a=commit;h=52923c6db7f00e0197ec894c8c1bb8a7681974bb){kind=link}
