Masahiro Yamada [Sat, 8 Oct 2016 04:25:30 +0000 (13:25 +0900)]
reset: declare fdtdec_phandle_args as struct to fix warning
The of_xlate() callback needs to know fdtdec_phandle_args is struct.
Otherwise, the following warning is displayed.
include/reset-uclass.h:40:11: warning: 'struct fdtdec_phandle_args'
declared inside parameter list
struct fdtdec_phandle_args *args);
^
include/reset-uclass.h:40:11: warning: its scope is only this
definition or declaration, which is probably not what you want
Masahiro Yamada [Sat, 8 Oct 2016 04:25:29 +0000 (13:25 +0900)]
ARM: uniphier: insert udelay() just before support_card_reset_deassert()
As for LD11/LD20, we can no longer rely on the udelay() in the PLL
init functions. udelay(200) is needed here to keep the ethernet
device in the reset state for enough time. Anyway, 200 usec is
quite short for humans, so nobody cares it.
Masahiro Yamada [Sat, 8 Oct 2016 04:25:27 +0000 (13:25 +0900)]
ARM: uniphier: enable CONFIG_SYS_NO_FLASH if no CONFIG_MICRO_SUPPORT_CARD
NOR flash devices are seldom used on UniPhier platforms these days.
The only use case I see is the Micro Support Card is connected.
Otherwise, define CONFIG_SYS_NO_FLASH to disable NOR FLASH.
Masahiro Yamada [Sat, 8 Oct 2016 04:25:24 +0000 (13:25 +0900)]
ARM: uniphier: update DRAM init code for LD20 SoC (2nd)
- Do not reference CONFIG_DDR_FREQ; now the DDR frequency
is passed from the uniphier_board_data structure
- Constify parameter arrays
- Tidy up cluttered macros
- Lots of code cleanups
- Lots of coding style fixes
ARM: uniphier: do not setup pins for System Bus on NAND boot mode
For LD11 and LD20 SoCs, the System Bus and NAND are multiplexed
in the same I/O pins. When booting from a NAND device, pin-mux
for the System Bus must not be set-up because they are exclusive
with each other.
Lokesh Vutla [Tue, 4 Oct 2016 04:04:50 +0000 (09:34 +0530)]
ARM: AM437X: Add Silicon ID support
Add silicon ID code for AM437x silicon. This can be used to print
the cpu info using CONFIG_DISPLAY_CPUINFO.
Also printing "CPU :" along with cpu name in order to be consistent
with other OMAP platforms.
Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
B, Ravi [Wed, 28 Sep 2016 09:16:18 +0000 (14:46 +0530)]
spl: saveenv: adding saveenv support in SPL
By default saveenv option is not supported for SPL. This patch
enable the support for save environment variable for SPL build.
Enable save environment support in SPL after setenv. By default
the saveenv option is not provided in SPL, but some boards need
this support in 'Falcon' boot, where SPL need to boot from
different images based on environment variable set by OS. For
example OS may set "reboot_image" environment variable to
"recovery" inorder to boot recovery image by SPL. The SPL read
"reboot_image" and act accordingly and change the reboot_image
to default mode using setenv and save the environemnt.
Signed-off-by: Ravi Babu <ravibabu@ti.com> Reviewed-by: Simon Glass <sig@chromium.org>
change in v1:
- dropped SUPPORT, use CONFIG_SPL_SAVEENV
- updates the comments in mmc_private.h
Moritz Fischer [Tue, 27 Sep 2016 22:42:07 +0000 (15:42 -0700)]
cros_ec: Honor the google,remote-bus dt property
Boards where ECs that use a I2C port != 0 specify this in the
devicetree file via the google,remote-bus property.
Previously this was ignored and hardcoded to port 0.
Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com> Cc: Simon Glass <sjg@chromium.org> Cc: Heiko Schocher <hs@denx.de> Cc: u-boot@lists.denx.de Acked-by: Simon Glass <sjg@chromium.org>
Mugunthan V N [Tue, 27 Sep 2016 07:31:41 +0000 (13:01 +0530)]
ARM: dts: dra72: add rev C evm support
Add DTS support for dra72 evm Rev C which has the following
changes
* Two ethernet ports now instead of the single one in rev B.
* DP83867 ethernet phy instead of DP838865.
Cc: Vignesh R <vigneshr@ti.com> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Alexander Graf [Tue, 27 Sep 2016 07:30:32 +0000 (09:30 +0200)]
arm: Add return value argument to longjmp
The normal longjmp command allows for a caller to pass the return value
of the setjmp() invocation. This patch adds that semantic to the arm
implementation of it and adjusts the efi_loader call respectively.
Signed-off-by: Alexander Graf <agraf@suse.de> Reviewed-by: Simon Glass <sjg@chromium.org>
B, Ravi [Mon, 26 Sep 2016 12:54:08 +0000 (18:24 +0530)]
env: tool: add command line option to input lockfile path
The default lockname is set to /var/lock. This limits the
usage of this application where OS uses different lockfile
location parameter.
For example, In case of android, the default lock
path location is /data.
Hence by providing the command line option to input lockfile
path will be useful to reuse the tool across multiple
operating system.
The build failure of k2*evm boards was fixed in a different way by
the previous commit. It is nasty to patch generic drivers around
with #ifdef CONFIG_CLK just for the KeyStone's matter.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
Ken Lin [Fri, 7 Oct 2016 14:26:56 +0000 (10:26 -0400)]
board: ge: bx50v3: Pass video bootargs for b850v3
Due to clock source restrictions on i.MX6, certain pixel clock rates can
not be supported. Hence default the resolution/frame rate during boot to a
supported value by passing video bootargs 1024x768@60 for
HDMI (Display Port1) and LVDS (Display Port2) on B850v3.
Signed-off-by: Ken Lin <ken.lin@advantech.com.tw> Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com>
kbuild: generate u-boot.cfg as a byproduct of include/autoconf.mk
Our build system still parses ad-hoc CONFIG options in header files
and generates include/autoconf.mk so that Makefiles can reference
them. This gimmick was introduced in the pre-Kconfig days and will
be kept until Kconfig migration is completed.
The include/autoconf.mk is generated like follows:
[1] Preprocess include/common.h with -DDO_DEPS_ONLY and
retrieve macros into include/autoconf.mk.tmp
[2] Reformat include/autoconf.mk.dep into include/autoconf.mk
with tools/scripts/define2mk.sed script
[3] Remove include/autoconf.mk.tmp
Here, include/autoconf.mk.tmp is similar to u-boot.cfg, which is
also generated by preprocessing include/config.h with -DDO_DEPS_ONLY.
In other words, there is much overlap among include/autoconf.mk and
u-boot.cfg build rules.
So, the idea is to split the build rule of include/autoconf.mk
into two stages. The first preprocesses headers into u-boot.cfg.
The second parses the u-boot.cfg into include/autoconf.mk. The
build rules of u-boot.cfg in Makefile and spl/Makefile will be gone.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Simon Glass <sjg@chromium.org>
build-whitelist: do not add new options to whitelist when update
If somebody adds references to new CONFIG options in source files,
they will be added in the whitelist when we sync it. (For example,
if we run scripts/build-whitelist.sh against commit 42f75050667b,
new options CONFIG_SPL_DFU_SUPPORT and CONFIG_USB_XHCI_UNIPHIER will
appear in the list.)
In order to make steady progress of Kconfig migration, we want to
only decrease whitelist options, but never increase.
So, when we update the whitelist, we should create a temporary list,
then take the intersection of the temporary one and the current one.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Simon Glass <sjg@chromium.org>
vexpress: disable cci ace slave ports when booting in non-sec/hyp mode
Commit f225d39d3093 ("vexpress: Check TC2 firmware support before defaulting
to nonsec booting") added support to check if the firmware on TC2 is
configured appropriately before booting in nonsec/hyp mode.
However when booting in non-secure/hyp mode, CCI control must be done in
secure firmware and can't be done in non-secure/hyp mode. In order to
ensure that, this patch disables the cci slave port inteface so that it
is not accessed at all.
Cc: Jon Medhurst <tixy@linaro.org> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> Acked-by: Jon Medhurst <tixy@linaro.org> Tested-by: Jon Medhurst <tixy@linaro.org>
Chris Packham [Fri, 23 Sep 2016 03:59:43 +0000 (15:59 +1200)]
common/console.c: ensure GD_FLG_SILENT is set or cleared
When CONFIG_SILENT_CONSOLE is defined and the default environment has
silent=1 it is not possible for a user to make the console un-silent if
the environment is not available when console_init_f() is called (for
example because the environment is in SPI).
Add a new helper function console_update_silent() and call it from both
console_init_f() and console_init_r().
Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Stefan Agner [Wed, 28 Sep 2016 09:29:28 +0000 (11:29 +0200)]
ARM: vf610: use strcpy for soc environment variable
To create the soc environment variable we concatenate two strings
on the stack. So far, strcat has been used for the first string as
well as for the second string. Since the variable on the stack is
not initialized, the first strcat may not start using the first
entry in the character array. This then could lead to an buffer
overflow on the stack.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Stefan Agner [Wed, 5 Oct 2016 22:27:10 +0000 (15:27 -0700)]
arm: dts: imx7: add Ricoh RN5T567 PMIC node
Add device tree node for Ricoh RN5T567. Currently we do not need
the individual DC/DC converters or LDO's (and they are also not
yet supported by the driver).
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Stefan Agner [Wed, 5 Oct 2016 22:27:05 +0000 (15:27 -0700)]
arm: dts: imx7: add pinctrl defines
Add pinctrl defines for NXP i.MX 7Solo/7Dual SoC. The pinctrl format
is compatible to the Linux kernel, hence this file is a simple copy
from the Linux kernel (commit 97f5c1817b7e).
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
ARM: OMAP5+: Override switch_to_hypervisor function
Override the switch_to_hypervisor function to switch cpu to hypervisor
mode using the available ROM code hook early in the boot phase before
the boot loader checks for HYP mode.
Based on the work done by Jonathan Bergsagel jbergsagel@ti.com.
Cc: beagleboard-x15@googlegroups.com Signed-off-by: Keerthy <j-keerthy@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
ARM: Introduce function to switch to hypervisor mode
On some of the SoCs one cannot enable hypervisor mode directly from the
u-boot because the ROM code puts the chip to supervisor mode after it
jumps to boot loader. Hence introduce a weak function which can be
overridden based on the SoC type and switch to hypervisor mode in a
custom way.
Cc: beagleboard-x15@googlegroups.com Signed-off-by: Keerthy <j-keerthy@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
omap: Set appropriate cache configuration for LPAE and non-LAPE cases
Cache configuration methods is different for LPAE and non-LPAE cases.
Hence the bits and the interpretaion is different for two cases.
In case of non-LPAE mode short descriptor format is used and we need
to set Cache and Buffer bits.
In the case of LPAE the cache configuration happens via MAIR0 lookup.
Signed-off-by: Keerthy <j-keerthy@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
omap: Remove hardcoding of mmu section shift to 20
As of now the mmu section shift is hardcoded to 20 but with LPAE
coming into picture this can be different. Hence replacing 20 with
MMU_SECTION_SHIFT macro.
Signed-off-by: Keerthy <j-keerthy@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Tweaks (no functional changes) to include/search.h, including:
* use standard multiple inclusion check
* fix spelling mistakes
* have comments match actual names in function prototypes
* remove obsolete reference to "do_apply"
* replace "hashing table" with "hash table"
Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
When enabled sec firmware framework, but lack of definition of
the marco SEC_FIRMWARE_FIT_IMAGE, SEC_FIRMEWARE_FIT_CNF_NAME
and SEC_FIRMWARE_TARGET_EL, there will be some build errors,
so give a default definition.
ARM: Respect CONFIG_SPL_STACK define in lowlevel_init.S
The SPL and U-Boot proper may use different initial stack
locations, which are configured via CONFIG_SPL_STACK and
CONFIG_SYS_INIT_SP_ADDR defines. The lowlevel_init.S
code needs to handle this in the same way as crt0.S
Without this fix, setting the U-Boot stack location to some
place, which is not safely accessible by the SPL (such as
the DRAM), causes a very early SPL deadlock.
Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Andreas Fenkart [Mon, 29 Aug 2016 21:17:00 +0000 (23:17 +0200)]
Suspected Spam: Do not open attachements![PATCH 4/6] tools/env: flash_write_buf: enforce offset to be start of environment
This allows to take advantage of the environment being block aligned.
This is not a new constraint. Writes always start at the begin of the
environment, since the header with CRC/length as there.
Every environment modification requires updating the header
Signed-off-by: Andreas Fenkart <andreas.fenkart@digitalstrom.com>
Andreas Fenkart [Mon, 29 Aug 2016 21:16:59 +0000 (23:16 +0200)]
tools/env: lookup dev_type directly from flash_read_buf/flash_write_buf
flash_write_buf already looks up size/offset/#sector from struct
envdev_s. It can look up mtd_type as well. Same applies to
flash_read_buf. Makes the interface simpler
Signed-off-by: Andreas Fenkart <andreas.fenkart@digitalstrom.com>
Andreas Fenkart [Mon, 29 Aug 2016 21:16:58 +0000 (23:16 +0200)]
tools/env: pass bad block offset by value
the offset is not modified by linux ioctl call
see mtd_ioctl{drivers/mtd/mtdchar.c}
Makes the interface less ambiguous, since the caller can
now exclude a modification of blockstart
Signed-off-by: Andreas Fenkart <andreas.fenkart@digitalstrom.com>
Clemens Gruber [Mon, 29 Aug 2016 15:10:36 +0000 (17:10 +0200)]
gunzip: cache-align write buffer memory
When using gzwrite to eMMC on an i.MX6Q board, the following warning
occurs repeatedly:
CACHE: Misaligned operation at range [4fd63318, 4fe63318]
This patch cache-aligns the memory allocation for the gzwrite writebuf,
therefore avoiding the misaligned dcache flush and the warning from
check_cache_range.
Signed-off-by: Clemens Gruber <clemens.gruber@pqgruber.com> Reviewed-by: Eric Nelson <eric@nelint.com> Reviewed-by: Stefan Agner <stefan.agner@toradex.com>
Simon Glass [Mon, 3 Oct 2016 00:01:11 +0000 (18:01 -0600)]
README: Fix CONFIG_SYS_NAND_MAX_DEVICE typo
This should be CONFIG_SYS_MAX_NAND_DEVICE. Fix it.
Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Scott Wood <oss@buserror.net> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: York Sun <york.sun@nxp.com>
Simon Glass [Mon, 3 Oct 2016 00:01:08 +0000 (18:01 -0600)]
atmel: Drop README.at91-soc
This issue covered by this doc appears to be fixed, so let's remove the
README.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: York Sun <york.sun@nxp.com> Acked-by: Andreas Bießmann <andreas@biessmann.org>
Simon Glass [Mon, 3 Oct 2016 00:01:05 +0000 (18:01 -0600)]
README: i2c: Drop unused i2c CONFIG options
CONFIG_SYS_NUM_I2C_ADAPTERS and CONFIG_SYS_I2C_MULTI_NOPROBES are not used
in U-Boot, so drop them.
Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: York Sun <york.sun@nxp.com>
York Sun [Wed, 5 Oct 2016 20:19:08 +0000 (13:19 -0700)]
spi: fsl_qspi: Preserve endianness of QSPI MCR
The endianness can be changed by RCW + PBI sequence. It may have
other than power on reset value.
Signed-off-by: York Sun <york.sun@nxp.com> CC: Yuan Yao <yao.yuan@nxp.com> CC: Peng Fan <peng.fan@nxp.com> CC: Alison Wang <alison.wang@nxp.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
Simon Glass [Sun, 25 Sep 2016 00:20:17 +0000 (18:20 -0600)]
spl: Make spl_boot_list a local variable
There is no need for this to be in the BSS region. By moving it we can delay
use of BSS in SPL. This is useful for machines where the BSS region is not
in writeable space. On 64-bit x86, SPL runs from SPI flash and it is easier
to eliminate BSS use than link SPL to run with BSS at a particular
cache-as-RAM (CAR) address.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
projects / u-boot.git / log
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