Dmitry Rokosov [Wed, 1 Nov 2023 14:04:57 +0000 (17:04 +0300)]
drivers: sm: bind child sm devices in the device tree
One well-known sm child device that provides secure power control is the
Secure Power Controller. This device utilizes SMC calls to communicate
with power domains on the secure monitor side.
Signed-off-by: Dmitry Rokosov <ddrokosov@salutedevices.com> Signed-off-by: Alexey Romanov <avromanov@salutedevices.com> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20231101140500.9025-3-avromanov@salutedevices.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Baruch Siach [Wed, 25 Oct 2023 08:08:44 +0000 (11:08 +0300)]
net: designware: add DMA offset awareness
Older DesignWare Ethernet MAC versions that this driver supports can
only work with 32-bit DMA source/destination addresses. Some platforms
have no physical RAM at the lowest 4GB address space. For these
platforms the driver must translate DMA addresses to/from physical
memory addresses.
Call translation routines so that properly configured platforms can use
the DesignWare Ethernet MAC. For platforms using device-tree this
usually means adding dma-ranges property to the bus the device node is
in.
Bin Meng [Wed, 11 Oct 2023 10:58:25 +0000 (18:58 +0800)]
net: e1000: Drop e1000_eth_ids[]
e1000_eth_ids holds compatible strings for e1000 devices, but it
is meaningless as e1000 is a PCI device and there is no such
compatible string assigned to e1000 by the DT bindings community.
Drop it.
Signed-off-by: Bin Meng <bmeng@tinylab.org> Reviewed-by: Simon Glass <sjg@chromium.org>
Sean Anderson [Sun, 8 Oct 2023 01:53:12 +0000 (21:53 -0400)]
net: Add option for tracing packets
Add an option to trace all packets send/received. This can be helpful when
debugging protocol issues, as the packets can then be imported into
wireshark [1] and analyzed further.
net: phy: TI DP83869 fix invalid clock delay configuration
Setting the clock delay from the device tree settings
rx-internal-delay-ps and tx-internal-delay-ps was broken:
- The expected value in the device tree is suppose to be a
delay in picoseconds, but the driver only allowed an array index.
- Driver converted this array index to the actual delay in
picoseconds and tried to apply this in the device register. This
however is not a valid register value. The actual logic here was
reversed, it converted an register representation of the delay to
the device tree delay in picoseconds.
Only when the internal delays were NOT configured in the device tree
and they default value of 7 (=2000ps) was used, a valid value was
loaded in the register.
Signed-off-by: Frank de Brabander <debrabander@gmail.com>
Michal Simek [Fri, 15 Sep 2023 14:10:06 +0000 (16:10 +0200)]
net: eth-uclass: Setup ROM source only when ROM reading passes
There is no reason to setup ROM source if read_rom_hwaddr hook doesn't
exist or reading mac address fails. It is ending up with confusion about
mac address source.
It is nicely visible if you put mac address to DT as
local-mac-address = [ff ff ff ff ff ff];
but also save ethaddr to variables
setenv -f ethaddr 02:18:31:7e:3e:01
Before this patch U-Boot prints that source is ROM
Address in ROM is ff:ff:ff:ff:ff:ff
Address in environment is 02:18:31:7e:3e:01
After that source is DT:
Address in DT is ff:ff:ff:ff:ff:ff
Address in environment is 02:18:31:7e:3e:01
Signed-off-by: Michal Simek <michal.simek@amd.com>
Yang Xiwen [Tue, 22 Aug 2023 17:03:42 +0000 (01:03 +0800)]
net: add hifemac Ethernet driver for HiSilicon platform
It adds the driver for HIFEMAC Ethernet controller found on HiSilicon
SoCs like Hi3798MV200. It's based on the mainstream linux driver, but
quite a lot of code gets rewritten and cleaned up to adopt u-boot driver
model.
Signed-off-by: Yang Xiwen <forbidden405@outlook.com>
Robert Marko [Tue, 8 Aug 2023 16:05:16 +0000 (18:05 +0200)]
net: mv88e6xxx: add Clause 45 support
Marvell LinkStreet switches support Clause 45 MDIO on the internal bus.
C45 read or writes require the register address to be written first to
the SMI PHY Data register, and then a special C45 Write Address Register
OP is used on the SMI PHY Register before making a C45 Read Data Register
OP and being able to actually read the register.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Robert Marko [Tue, 8 Aug 2023 16:05:15 +0000 (18:05 +0200)]
net: mv88e6xxx: use generic bitfield macros for MDIO
Driver is currently defining the mask and bit shifting itself,
there is no need for that as U-Boot has generic bitfield macros that help
us achieve the same result but in a cleaner way.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Sean Edmond [Tue, 25 Jul 2023 23:13:29 +0000 (16:13 -0700)]
net: dhcp6: Fix OPT_BOOTFILE_PARAM parsing
RFC 5970 states that OPT_BOOTFILE_PARAM (option 60) can be
multiple parameters that start with a 16-bit length field followed
by the parameter. For example:
[ param-len 1 (16-bits) ] [ parameter 1 (variable length) ]
This fix ensure we're considering "param-len 1" in the parsing.
Signed-off-by: Sean Edmond <seanedmond@microsoft.com>
Svyatoslav Ryhel [Tue, 24 Oct 2023 07:49:03 +0000 (10:49 +0300)]
sysreset: tegra: create arch specific sysreset driver
Tegra uses built in Power Management Controller (PMC) to perform
CPU reset. Code to perform this was located in mach-tegra, so lest
create DM driver to handle this.
Svyatoslav Ryhel [Fri, 27 Oct 2023 08:26:09 +0000 (11:26 +0300)]
power: regulator: palmas: fix ldoln and ldousb detection
dev->driver_data will carry the tail of ldo if there is a number and
if there is no number it will be an error code, anyway it will not be
zero. This results in a wrong ldo regulator detection.
To avoid this check for non-numerical ldo first and then manipulate
dev->driver_data.
Svyatoslav Ryhel [Fri, 27 Oct 2023 08:26:08 +0000 (11:26 +0300)]
power: pmic: palmas: support TI TPS65913 PMIC
Existing PALMAS PMIC driver is fully compatible with TI TPS65913
PMIC found in many Tegra 4 devices, like Tegra Note 7 and ASUS
TF701T. TPS65913 shares same structure of regulators like TPS659038
so data can be reused.
Remove nvidia_board_late_init calls from board since this setup is
performed in board2 of mach-tegra. Call of nvidia_board_late_init
from within the board does not provide any additional data.
Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS Transformer T30 Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # LG P895 T30 Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Board specific late init allows vendors to set up different device
or board specific env variables (like serial number, platform name).
In case this information is missing, u-boot will lack info regards
serial or platform.
To avoid this prior nvidia_board_late_init internal generic function
is called which fills required data. In this case platform name is
obtained from get_chip and serialno is filled with SoC id.
Though SoC id is not dedicated to be devices serial but it fits well
in case of restriction of data about device and since SoC is basically
a main chip of the device.
Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS Transformers Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # Nvidia Tegratab Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
ARM: tegra20: tegra30: support EBTUPDATE on non-encrypted devices
Re-crypt support was extended to devices without burnt SBK. In case
SBK is not set, place from where it is read is filled with zeroes.
This patch adds support for ebtupdate function to detect nosbk device
and avoid crypto operations for it.
Tested-by: Maksim Kurnosenko <asusx2@mail.ru> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
ARM: tegra114: enable base voltages setup from board
Tegra 4, same as Tegra 3, requires configuration of CPU and CORE
voltages in the SPL stage to boot properly. Expose function to be
able perform this configuration in the SPL section of the device
board.
mmc: tegra: get default-tap and default-trim from device tree
Default-tap and default-trim values are used for eMMC setup
mostly on T114+ devices. As for now, those values are hardcoded
for T210 and ignored for all other Tegra generations. Fix this
by passing tap and trim values from dts.
ARM: tegra210: set default-tap and default-trim values in sdhci nodes
Tegra MMC driver has hardcoded tap and trim values as for now.
Set default-tap and default-trim values in sdhci nodes to avoid
regressions in case Tegra MMC driver is upated to use dts values.
Tom Rini [Fri, 3 Nov 2023 13:53:01 +0000 (09:53 -0400)]
Merge tag 'qcom-pull-20231103' of https://source.denx.de/u-boot/custodians/u-boot-snapdragon
As discussed, here is the maintainers update for Snapdragon. Sumit Garg
who maintains a few of the Qualcomm platforms in U-boot has also been
added as a reviewer.
Simon Glass [Wed, 1 Nov 2023 17:17:50 +0000 (11:17 -0600)]
u_boot_pylib: Ensure subprocess is closed down
It isn't clear why we need to have two different paths for closing down
the pipe. Unify them and use the Python to avoid this warning:
subprocess.py:1127: ResourceWarning: subprocess 83531 is still running
Note that this code appears to originally have come from [1] and was
committed into the ChromeOS chromiumos/platform/crosutils repo in the
bin/cros_image_to_target.py file. The addition of the extra code path
came later, so that is chosen for the fixes tag.
Simon Glass [Mon, 30 Oct 2023 17:22:30 +0000 (10:22 -0700)]
buildman: Support upstream branch name containing /
Buildman assumes that branch names do not have a slash in them, since
slash is used to delimit remotes, etc. This means that a branch called
'WIP/tryme' in remote dm ends up being 'tryme'.
Adjust the logic a little, to try to accommodate this.
For now, no tests are added for this behaviour.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
binman: openssl: x509: ti_secure_rom: Add support for bootcore_opts
According to the TRMs of K3 platform of devices, the ROM boot image
format specifies a "Core Options Field" that provides the capability to
set the boot core in lockstep when set to 0 or to split mode when set
to 2. Add support for providing the same from the binman DTS. Also
modify existing test case for ensuring future coverage.
Signed-off-by: Neha Malcom Francis <n-francis@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 23 Oct 2023 07:52:43 +0000 (00:52 -0700)]
buildman: Include symbols in the read-only data section
When symbols switch between the inited data section and the read-only
data section their visbility changes, at present, with the -B option.
This is confusing, since adding 'const' to a variable declaration can
make it look like a significant improvement in bloat. But in fact
nothing has changed.
Add 'r' to the list of symbols types that are recorded, to correct this
problem. Add a constant to make it easier to find this code next time.
Signed-off-by: Simon Glass <sjg@chromium.org> Reported-by: Tom Rini <trini@konsulko.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Simon Glass [Sat, 14 Oct 2023 20:40:27 +0000 (14:40 -0600)]
binman: Ensure attributes always come last in the metadata
cbfsutil changed to write zero bytes instead of 0xff when a small
padding must be added. Adjust the binman implementation to do the same.
Drop the code which looks for an unused attribute tag, since it is not
used. A future patch moves the attributes to the end of the header in
any case, so no data will follow the attributes.
Simon Glass [Sat, 14 Oct 2023 20:40:25 +0000 (14:40 -0600)]
binman: Reset missing bintools after testing
For tests which fake bintools being missing, we need to reset the list
afterwards, to ensure that future tests do not also see the bintools as
missing.
Reset the list when processing is complete.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Maxim Cournoyer [Fri, 13 Oct 2023 03:06:24 +0000 (23:06 -0400)]
patman: Add a 'keep_change_id' setting
A Change-Id can be useful for traceability purposes, and some projects
may wish to have them preserved. This change makes it configurable
via a new 'keep_change_id' setting.
Signed-off-by: Maxim Cournoyer <maxim.cournoyer@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Thu, 2 Nov 2023 14:12:33 +0000 (10:12 -0400)]
Merge tag 'i2cfixes-for-v2024-01-rc2' of https://source.denx.de/u-boot/custodians/u-boot-i2c
i2c updates for v2024.01-rc2
- nuvoton: support standard/fast/fast plus mode
- bootcount: remove legacy i2c driver and implement
DM based version
Bugfixes:
- designware_i2c: adjust timing calculation
SPL probing failed on the StarFive VisionFive 2 board
Heinrich fixed this, by syncing timing calculation with
linux implementation.
+ CI: Use OpenSBI 1.3.1 release for testing
+ riscv: Support resume after exception
+ rng: Support RNG provided by RISC-V Zkr ISA extension
+ board: starfive VF2: Support jtag
+ board: starfive VF2: Support TRNG driver
+ board: sifive unmatched: Move kernel load address
Paul Barker [Wed, 1 Nov 2023 20:05:53 +0000 (20:05 +0000)]
arm: mach-rmobile: Drop <common.h>
For most source files we can just drop <common.h>. We need to add an
include for <asm/u-boot.h> in a couple of places. Also sort the include
list in memmap-gen3.c while we're here.
Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Chanho Park [Wed, 1 Nov 2023 12:16:50 +0000 (21:16 +0900)]
rng: Add StarFive JH7110 RNG driver
Adds to support JH7110 TRNG driver which is based on linux kernel's
jh7110-trng.c. This can support to generate 256-bit random numbers and
128-bit but this makes 256-bit default for convenience.
Signed-off-by: Chanho Park <chanho61.park@samsung.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Samuel Holland [Tue, 31 Oct 2023 05:37:20 +0000 (00:37 -0500)]
riscv: Weakly define invalidate_icache_range()
Some RISC-V CPUs, such as the T-HEAD XuanTie series, have a
vendor-specific way to invalidate a portion of the instruction cache.
Allow them to override invalidate_icache_range().
Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Samuel Holland [Tue, 31 Oct 2023 05:35:41 +0000 (00:35 -0500)]
riscv: Align the trap handler to 64 bytes
This is required on CPUs which always operate in CLIC mode, such as the
T-HEAD E906 and E907. Per the CLIC specification: "In this mode, the
trap vector base address held in mtvec is constrained to be aligned on a
64-byte or larger power-of-two boundary."
Reported-by: Madushan Nishantha <jlmadushan@gmail.com> Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Yong-Xuan Wang [Thu, 26 Oct 2023 03:22:52 +0000 (03:22 +0000)]
board: sifive: unmatched: move kernel load address to 0x80200000
U-boot initially loads the kernel image to the kernel_addr_r, and
subsequently relocates it to memory address 0x80200000. Setting
kernel_addr_r to 0x80200000 can eliminate one copy operation.
Signed-off-by: Yong-Xuan Wang <yongxuan.wang@sifive.com> Reviewed-by: Tom Rini <trini@konsulko.com>
projects / u-boot.git / log
![13 months agonet: e1000: Drop e1000_eth_ids[]](/img/sics.gif?p=u-boot.git;a=commit;h=9e4cabcf4356d13ad0abb602278b34e4a7ca57ae){kind=link}
