Stephen Warren [Thu, 15 Sep 2016 18:19:37 +0000 (12:19 -0600)]
ARM: tegra: fix USB ULPI PHY reset signal inversion confusion
USB ULPI PHY reset signals are typically active low. Consequently, they
should be marked as GPIO_ACTIVE_LOW in device tree, and indeed they are in
the Linux kernel DTs, and in DT properties that U-Boot doesn't yet use.
However, in DT properties that U-Boot does use, the value has been set to
0 (== GPIO_ACTIVE_HIGH) to work around a bug in U-Boot.
This change fixes the DT to correctly represent the HW, and fixes the
Tegra USB driver to cope with the fact that dm_gpio_set_value() internally
handles any inversions implied by the DT value GPIO_ACTIVE_LOW.
Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
Stephen Warren [Tue, 13 Sep 2016 16:46:02 +0000 (10:46 -0600)]
i2c: tegra: only use new clock/reset APIs
Now that the standard clock/reset APIs are available for all Tegra SoCs,
convert the I2C driver to use them exclusively, and remove any references
to the custom Tegra-specific APIs.
Cc: Heiko Schocher <hs@denx.de> Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
Stephen Warren [Tue, 13 Sep 2016 16:46:01 +0000 (10:46 -0600)]
mmc: tegra: only use new clock/reset APIs
Now that the standard clock/reset APIs are available for all Tegra SoCs,
convert the MMC driver to use them exclusively, and remove any references
to the custom Tegra-specific APIs.
Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
Stephen Warren [Fri, 23 Sep 2016 22:44:51 +0000 (16:44 -0600)]
ARM: tegra: fix clock_get_periph_rate() for UART clocks
Make clock_get_periph_rate() return the correct value for UART clocks.
This change needs to be applied before the patches that enable CONFIG_CLK
for Tegra SoCs before Tegra186, since enabling that option causes
ns16550_serial_ofdata_to_platdata() to rely on clk_get_rate() for UART
clocks, and clk_get_rate() eventually calls clock_get_periph_rate().
This change is a rather horrible hack, as explained in the comment added
to the clock driver. I've tried fixing this correctly for all clocks as
described in that comment, but there's too much fallout elsewhere. I
believe the clock driver has a number of bugs which all cancel each-other
out, and unravelling that chain is too complex at present. This change is
the smallest change that fixes clock_get_periph_rate() for UART clocks
while guaranteeing no change in behaviour for any other clock, which
avoids other regressions.
Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
Stephen Warren [Tue, 13 Sep 2016 16:45:59 +0000 (10:45 -0600)]
clock: implement a driver for the Tegra CAR
Implement a clock uclass driver for the Tegra CAR. This allows clients to
use standard clock APIs on Tegra. This device is intended to be
instantiated by the core Tegra CAR driver, rather than being instantiated
directly from DT. The implementation uses the existing custom Tegra-
specific clock APIs to avoid coupling the series with significant
refactoring of the existing Tegra clock/clock code. The driver currently
only supports peripheral clocks, and avoids support for other clocks such
as PLLs and external clocks. This should be sufficient to convert over all
Tegra peripheral drivers, and avoids a complex implementation which calls
different Tegra-specific clock APIs based on the type of clock being
manipulated.
Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
Stephen Warren [Tue, 13 Sep 2016 16:45:58 +0000 (10:45 -0600)]
reset: implement a driver for the Tegra CAR
Implement a reset uclass driver for the Tegra CAR. This allows clients to
use standard reset APIs on Tegra. This device is intended to be
instantiated by the core Tegra CAR driver, rather than being instantiated
directly from DT. The implementation uses the existing custom Tegra-
specific reset APIs to avoid coupling the series with significant
refactoring of the existing Tegra clock/reset code.
Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
Stephen Warren [Tue, 13 Sep 2016 16:45:57 +0000 (10:45 -0600)]
misc: implement Tegra CAR core driver
The Tegra CAR (Clock And Reset) module provides control of most clocks
and reset signals within the Tegra SoC. This change implements a driver
for this module. However, since the module implements multiple kinds of
services (clocks, resets, perhaps more), all this driver does is bind
various sub-devices, which in turn provide the real services. This driver
is essentially an "MFD" (Multi-Function Device) in Linux kernel speak.
Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
Stephen Warren [Tue, 13 Sep 2016 16:45:56 +0000 (10:45 -0600)]
ARM: tegra: add APIs the clock uclass driver will need
A future patch will implement a clock uclass driver for Tegra. That driver
will call into Tegra's existing clock code to simplify the transition;
this avoids tieing the clock uclass patches into significant refactoring
of the existing custom clock API implementation.
Some of the Tegra clock APIs that manipulate peripheral clocks require
both the peripheral clock ID and parent clock ID to be passed in together.
However, the clock uclass API does not require any such "parent"
parameter, so the clock driver must determine this information itself.
This patch implements new Tegra- specific clock API
clock_get_periph_parent() for this purpose.
The new API is implemented in the core Tegra clock code rather than SoC-
specific clock code. The implementation uses various SoC-/clock-specific
data. That data is only available in SoC-specific clock code.
Consequently, two new internal APIs are added that enable the core clock
code to retrieve this information from the SoC-specific clock code. Due to
the structure of the Tegra clock code, this leads to some unfortunate code
duplication. However, this situation predates this patch.
Ideally, future work will de-duplicate the Tegra clock code, and migrate
it into drivers/clk/tegra. However, such refactoring is kept separate from
this series.
Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
Stephen Warren [Tue, 13 Sep 2016 16:45:55 +0000 (10:45 -0600)]
ARM: tegra: add peripheral clock init table
Currently, Tegra peripheral drivers control two aspects of their HW module
clock(s):
1) The clock enable/rate for the peripheral clock itself.
2) The system-level clock tree setup, i.e. the clock parent.
Aspect 1 is reasonable, but aspect 2 is a system-level decision, not
something that an individual peripheral driver should in general know
about or influence. Such system-level knowledge ties the driver to a
specific SoC implementation, even when they use generic APIs for clock
manipulation, since they must have SoC-specific knowledge such as parent
clock IDs. Limited exceptions exist, such as where peripheral HW is
expected to dynamically switch between clock sources at run-time, such
as CPU clock scaling or display clock conflict management in a multi-head
scenario.
This patch enhances the Tegra core code to perform system-level clock
tree setup, in a similar fashion to the Linux kernel Tegra clock driver.
This will allow future patches to simplify peripheral drivers by removing
the clock parent setup logic.
This change is required prior to converting peripheral drivers to use the
standard clock APIs, since:
1) The clock uclass doesn't currently support a set_parent() operation.
Adding one is possible, but not necessary at the moment.
2) The clock APIs retrieve all clock IDs from device tree, and the DT
bindings for almost all peripherals only includes information about the
relevant peripheral clocks, and not any potential parent clocks.
Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
Stephen Warren [Tue, 13 Sep 2016 16:45:54 +0000 (10:45 -0600)]
ARM: tegra: pull Tegra210 SoC DT from Linux v4.7
The primary benefit of this change is that it adds all missing clocks and
resets properties to peripherals. This will allow peripheral drivers to
migrate to the standard clock and reset APIs in the future.
Main changes:
* Brought in the correct Tegra210 CAR binding; the old file in U-Boot
appears to be a renamed version of the Tegra124 bindings rather than
the real Tegra210 version.
* Conversion of SPI and UART nodes to standard DMA bindings. U-Boot
doesn't use DMA so isn't affected.
* Split of EHCI and USB PHY nodes. The EHCI nodes continue to contain all
information required by U-Boot, so U-Boot is not affected.
* Conversion of many magic numbers to named defines.
* Addition of many nodes not used by U-Boot, including separation of the
Tegra LIC (Legacy IRQ controller) and GIC.
* Node sort order fixes.
Remaining deltas relative to the Linux DT:
* U-Boot has enabled PCIe for Tegra210, but the kernel hasn't yet.
* The GPIO node compatible value in the kernel explicitly includes
Tegra124 values whereas U-Boot does not. I'll send a kernel patch to
correct this.
Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
Stephen Warren [Tue, 13 Sep 2016 16:45:53 +0000 (10:45 -0600)]
ARM: tegra: pull Tegra124 SoC DT from Linux v4.7
The primary benefit of this change is that it adds all missing clocks and
resets properties to peripherals. This will allow peripheral drivers to
migrate to the standard clock and reset APIs in the future.
Main changes:
* USB phy_type property is aligned with the kernel, so board files are
updated so the final DT content doesn't change. I'm not convinved that
Nyan uses HSIC phy_type. However, I'd rather this change be a no-op,
and any DT bug-fixes be separate.
* Sync misc changes from the kernel: missing DT content, minor compatible
value fixes, typos.
Remaining deltas relative to the Linux DT:
* U-Boot uses #address-cells/#size-cells of 1 whereas the kernel uses 2.
I believe U-Boot's DT parsing currently assumes that these values match
the physical address size, so I didn't synchronize this part of the DT.
* U-Boot uses the original XUSB PHY DT binding, wherease the kernel DT
has moved to a newer version. Thus, XUSB client nodes include properties
names phys and phy-names that do not appear in the kernel, and don't
include pad definitions in the padctl node.
Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
Stephen Warren [Tue, 13 Sep 2016 16:45:52 +0000 (10:45 -0600)]
ARM: tegra: pull Tegra114 SoC DT from Linux v4.7
The primary benefit of this change is that it adds all missing clocks and
resets properties to peripherals. This will allow peripheral drivers to
migrate to the standard clock and reset APIs in the future.
Main changes:
* Conversion of SPI nodes to standard DMA bindings. U-Boot doesn't use
DMA so isn't affected.
* Split of EHCI and USB PHY nodes. The EHCI nodes continue to contain all
information required by U-Boot, so U-Boot is not affected.
* Boards need to define the clk32k_in clock that feeds the Tegra PMC.
* Addition of tegra114-mc.h since tegra114.dtsi now includes it.
* Conversion of many magic numbers to named defines.
* Addition of many nodes not used by U-Boot.
* Node sort order fixes.
Remaining deltas relative to the Linux DT:
* USB node compatible values in U-Boot explicitly list Tegra114 values
whereas the kernel does not. I'll send a kernel patch to correct this.
Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
Stephen Warren [Tue, 13 Sep 2016 16:45:51 +0000 (10:45 -0600)]
ARM: tegra: pull Tegra30 SoC DT from Linux v4.7
The primary benefit of this change is that it adds all missing clocks and
resets properties to peripherals. This will allow peripheral drivers to
migrate to the standard clock and reset APIs in the future.
Main changes:
* Modification of PCIe memory region addresses. The HW memory layout is
programmable, so this should work fine, and Beaver PCIe was tested
without issue.
* Removal of pcie_xclk from the PCIe node and clock binding header. This
clock doesn't exist and isn't used; only a reset with this ID exists.
* Conversion of SPI nodes to standard DMA bindings. U-Boot doesn't use
DMA so isn't affected.
* Split of EHCI and USB PHY nodes. The EHCI nodes continue to contain all
information required by U-Boot, so U-Boot is not affected.
* Changed the phy_type value for the second USB port. This required board
DTs to be updated to keep the same configuration.
* Boards need to define the clk32k_in clock that feeds the Tegra PMC.
* Addition of tegra30-mc.h since tegra30.dtsi now includes it.
* Conversion of many magic numbers to named defines.
* Addition of many nodes not used by U-Boot.
* Node sort order fixes.
Remaining deltas relative to the Linux DT:
* None.
Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
Stephen Warren [Tue, 13 Sep 2016 16:45:50 +0000 (10:45 -0600)]
ARM: tegra: pull Tegra20 SoC DT from Linux v4.7
This brings in a few minor fixes since the last sync. The largest change
is the removal of the definition for TEGRA20_CLK_PCIE_XCLK. This clock
doesn't actually exist.
Remaining deltas:
* Addition of u-boot,dm-pre-reloc property to a couple of nodes.
* Addition of the NAND controller, which Linux doesn't yet support.
Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
Stephen Warren [Tue, 13 Sep 2016 16:45:49 +0000 (10:45 -0600)]
ARM: tegra: remove "0, " from DT unit addresses
Apparently the unit address in a DT node name is now supposed to be a
single integer value, rather than a comma-separated list of individual
cell values. Fix the U-Boot DTs to comply with this naming convention.
Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
Tom Warren [Tue, 13 Sep 2016 16:45:48 +0000 (10:45 -0600)]
mmc: tegra: Add DM_MMC support to Tegra MMC driver
Convert the Tegra MMC driver to DM_MMC. Support for non-DM is removed
to avoid ifdefs in the code. DM_MMC is now enabled for all Tegra builds.
Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
(swarren, fixed some NULL pointer dereferences, removed extraneous
changes, rebased on various other changes, removed non-DM support etc.) Signed-off-by: Stephen Warren <swarren@nvidia.com>
Stephen Warren [Tue, 13 Sep 2016 16:45:47 +0000 (10:45 -0600)]
ARM: tegra: set MMC pin mux in board_init()
Most other pin mux is configured in this function. This removes the
need to do it in an MMC-specific initialization function, which is good
since that function is going away later in this series.
Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
Stephen Warren [Tue, 13 Sep 2016 16:45:46 +0000 (10:45 -0600)]
mmc: tegra: priv struct and naming cleanup
struct mmc_host is a Tegra-specific structure, but the name implies it's
something defined by core MMC code, which is confusing. Rename it to
struct tegra_mmc_priv to make its purpose more obvious. The new name is
also more appropriate for a DM driver private data structure, which will
be relevant later in this series.
Nothing needs access to this type except the MMC driver itself. Move the
definition into the driver C file.
Make sure all Tegra MMC functions are named tegra_mmc_*. Even though
they're all static, it's useful to have good naming so that symbol tables
are easy to interpret. A few functions aren't renamed by this patch since
they'll be deleted by a subsequent patch in this series.
Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
Stephen Warren [Tue, 13 Sep 2016 16:45:45 +0000 (10:45 -0600)]
mmc: tegra: don't use periph_id in pad_init_mmc()
The MMC driver will soon be converted to use standard clock/reset APIs,
and so the periph_id field in the MMC device priv struct will disappear.
Rework the implementation of pad_init_mmc() to rely on this; using the
device register address is a much more direct test anyway.
Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
Stephen Warren [Tue, 13 Sep 2016 16:45:44 +0000 (10:45 -0600)]
mmc: tegra: move pad_init_mmc() into MMC driver
pad_init_mmc() is performing an SoC-specific operation, using registers
within the MMC controller. There's no reason to implement this code
outside the MMC driver, so move it inside the driver.
Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
Stephen Warren [Tue, 13 Sep 2016 16:45:43 +0000 (10:45 -0600)]
mmc: tegra: use correct alias for SDHCI/MMC nodes
The Tegra MMC driver currently honors "sdhci" entries in /aliases. The
MMC core however uses "mmc" entries in /aliases. This difference will be
relevant once the Tegra MMC driver is converted to DM, and the MMC core
handles alias lookups. To avoid issues during that conversion, fix the
Tegra MMC driver and all Tegra DTs to use the same alias name as the MMC
core does.
Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
Tom Warren [Tue, 13 Sep 2016 16:45:42 +0000 (10:45 -0600)]
ARM: tegra: fdt: Add 'non-removable' property to all eMMC nodes
During debug of the DM_MMC changes to the Tegra MMC driver, I
noticed that the 'removable' property wasn't being set correctly
for the eMMC parts on most Tegra boards. Since the kernel DTS has
this property set correctly, it should be in U-Boot's Tegra DT too.
Signed-off-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org>
ARM: tegra: increase console buffer size and sys args num
The Linux-for-Tegra kernel uses a very long command line.
The default value of CONFIG_SYS_CBSIZE is too small to printf out the
long command line and causes a message like:
bootarg overflow 602+0+0+1 > 512
on the console, and the board refuses to boot.
The default value of CONFIG_SYS_MAXARGS is too small to add a long
long command line, and the kernel won't boot without the complete
bootargs.
Increasing these two config options solves this problem.
Signed-off-by: Bryan Wu <pengw@nvidia.com> Signed-off-by: Peter Chubb <Peter.Chubb@data61.csiro.au> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andrew F. Davis <afd@ti.com>
Reviewed by: Evgeni Dobrev <evgeni at studio-punkt.com>
York Sun [Mon, 26 Sep 2016 15:09:26 +0000 (08:09 -0700)]
armv8: ls1012a: Convert CONFIG_LS1012A to Kconfig option ARCH_LS1021A
Move this config to Kconfig option and clean up existing uses.
Signed-off-by: York Sun <york.sun@nxp.com> CC: Calvin Johnson <calvin.johnson@nxp.com> CC: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: Tom Rini <trini@konsulko.com>
York Sun [Mon, 26 Sep 2016 15:09:24 +0000 (08:09 -0700)]
armv8: ls1046a: Convert CONFIG_LS1046A to Kconfig option ARCH_LS1046A
Move this option to Kconfig and clean up existing uses.
Signed-off-by: York Sun <york.sun@nxp.com> CC: Mingkai Hu <mingkai.hu@nxp.com> CC: Gong Qianyu <Qianyu.Gong@nxp.com> Reviewed-by: Tom Rini <trini@konsulko.com>
This board is a plug in card for Marvell's switch system development
kits. Form-factor aside it is similar to the DB-88F6820-GP with the
following differences.
- TCLK is 200MHz
- SPI1 is used
- No SATA
- No MMC
- NAND flash
Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
88F6820 is a specific Armada-38x chip that is used on the DB-88F6820-GP
board. Rather than having DB_88F6820_GP and TARGET_DB_88F6820_GP which
selects the former. Rename DB_88F6820_GP to 88F6820 so that other boards
using the 88F6820 can be added.
Stefan Roese [Thu, 25 Aug 2016 14:22:10 +0000 (16:22 +0200)]
arm: mvebu: theadorable: Configure board for PCIe 2.0 capability
Use a board-specific board_sat_r_get() function to configure the board
for PCIe 2.0 capability (e.g. 5GB/s link speed). Otherwise the default
of 2.5GB/s will be established.
My motivation for this patch is to make reset control handling
optional for generic drivers.
I want to add reset control to drivers/usb/host/ehci-generic.c,
but it is used by several platforms, some will implement a reset
controller driver, some will not.
Add no-op stubs in order to avoid link error for drivers that
implement reset controlling, but still it is optional.
Move error macros from <asm-generic/errno.h> to <linux/errno.h>
There are no files that include <asm-generic/errno.h> any more.
Move error macro defines to include/linux/errno.h and remove
include/asm-generic/errno.h.
Going forward, please include <linux/errno.h> when you need error
macros.
treewide: replace #include <asm-generic/errno.h> with <linux/errno.h>
Now, include/linux/errno.h is a wrapper of <asm-generic/errno.h>.
Replace all include directives for <asm-generic/errno.h> with
<linux/errno.h>.
<asm-generic/...> is supposed to be included from <asm/...> when
arch-headers fall back into generic implementation. Generally, they
should not be directly included from .c files.
Unlike Linux, nothing about errno.h is arch-specific in U-Boot.
As you see, all of arch/${ARCH}/include/asm/errno.h is just a
wrapper of <asm-generic/errno.h>. Actually, U-Boot does not
export headers to user-space, so we just have to care about the
consistency in the U-Boot tree.
Now all of include directives for <asm/errno.h> are gone.
Deprecate <asm/errno.h>.
treewide: use #include <...> to include public headers
We are supposed to use #include <...> to include headers in the
public include paths. We should use #include "..." only for headers
in local directories.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Stefan Brüns [Sat, 17 Sep 2016 00:10:10 +0000 (02:10 +0200)]
ext4: Use helper function to access group descriptor and its fields
The descriptor size is variable, thus array indices are not generically
applicable. The larger group descriptors also contain e.g. high parts
of block numbers, which have to be read and written.
Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
Stefan Brüns [Mon, 19 Sep 2016 23:12:42 +0000 (01:12 +0200)]
ext4: Add helper functions for block group descriptor field access
The helper functions encapsulate access of the block group descriptors,
independent of group descriptor size. The helpers also deal with the
endianess of the fields, and with split fields like free_blocks/
free_blocks_high.
Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
Stefan Brüns [Tue, 6 Sep 2016 02:36:56 +0000 (04:36 +0200)]
ext4: Fix memory leak of journal buffer if block is updated multiple times
If the same block is updated multiple times in a row during a single
file system operation, gd_index is decremented to use the same journal
entry again. Avoid loosing the already allocated buffer.
Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
Stefan Brüns [Tue, 6 Sep 2016 02:36:55 +0000 (04:36 +0200)]
ext4: Correct block number handling, empty block vs. error code
read_allocated block may return block number 0, which is just an indicator
a chunk of the file is not backed by a block, i.e. it is sparse.
During file deletions, just continue with the next logical block, for other
operations treat blocknumber <= 0 as an error.
For writes, blocknumber 0 should never happen, as U-Boot always allocates
blocks for the whole file. Reading already handles this correctly, i.e. the
read buffer is 0-fillled.
Not treating block 0 as sparse block leads to FS corruption, e.g.
./sandbox/u-boot -c 'host bind 0 ./sandbox/test/fs/3GB.ext4.img ;
ext4write host 0 0 /2.5GB.file 1 '
The 2.5GB.file from the fs test is actually a sparse file.
Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
Stefan Brüns [Tue, 6 Sep 2016 02:36:54 +0000 (04:36 +0200)]
ext4: remove duplicated block release code for extents
The data blocks are identical for files using traditional direct/indirect
block allocation scheme and extent trees, thus this code part can be
common. Only the code to deallocate the indirect blocks to record the
used blocks has to be seperate, respectively the code to release extent
tree index blocks.
Actually the code to release the extent tree index blocks is still missing,
but at least add a FIXME at the appropriate place.
Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
Stefan Brüns [Tue, 6 Sep 2016 02:36:50 +0000 (04:36 +0200)]
ext4: Avoid out-of-bounds access of block bitmap
If the blocksize is 1024, count is initialized with 1. Incrementing count
by 8 will never match (count == fs->blksz * 8), and ptr may be
incremented beyond the buffer end if the bitmap is filled. Add the
startblock offset after the loop.
Remove the second loop, as only the first iteration will be done.
Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
Stefan Brüns [Tue, 6 Sep 2016 02:36:49 +0000 (04:36 +0200)]
ext4: After completely filled group, scan next group from the beginning
The last free block of a block group may be in its middle. After it has
been allocated, the next block group should be scanned from its beginning.
The following command triggers the bad behaviour (on a blocksize 1024 fs):
./sandbox/u-boot -c 'i=0; host bind 0 ./disk.raw ;
while test $i -lt 260 ; do echo $i; setexpr i $i + 1;
ext4write host 0:2 0 /X${i} 0x1450; done ;
ext4write host 0:2 0 /X240 0x2000 ; '
When 'X240' is extended from 5200 byte to 8192 byte, the new blocks should
start from the first free block (8811), but it uses the blocks 8098-8103
and 16296-16297 -- 8103 + 1 + 8192 = 16296. This can be shown with
debugfs, commands 'ffb' and 'stat X240'.
Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
Stefan Brüns [Tue, 6 Sep 2016 02:36:48 +0000 (04:36 +0200)]
ext4: Do not clear zalloc'ed buffers a second time
zero_buffer is never written, thus clearing it is pointless.
journal_buffer is completely initialized by ext4fs_devread (or in case
of failure, not used).
Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
Stefan Brüns [Tue, 6 Sep 2016 02:36:47 +0000 (04:36 +0200)]
ext4: Only update number of of unused inodes if GDT_CSUM feature is set
e2fsck warns about "Group descriptor 0 marked uninitialized without
feature set."
The bg_itable_unused field is only defined if FEATURE_RO_COMPAT_GDT_CSUM
is set, and should be set (kept) zero otherwise.
Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
Stefan Brüns [Tue, 6 Sep 2016 02:36:46 +0000 (04:36 +0200)]
ext4: Scan all directory blocks when looking up an entry
Scanning only the direct blocks of the directory file may falsely report
an existing file as nonexisting, and worse can also lead to creation
of a duplicate entry on file creation.
Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
Stefan Brüns [Tue, 6 Sep 2016 02:36:45 +0000 (04:36 +0200)]
ext4: Avoid corruption of directories with hash tree indexes
While directories can be read using the old linear scan method, adding a
new file would require updating the index tree (alternatively, the whole
tree could be removed).
Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
Stefan Brüns [Tue, 6 Sep 2016 02:36:44 +0000 (04:36 +0200)]
ext4: Scan all directory blocks for space when inserting a new entry
Previously, only the last directory block was scanned for available space.
Instead, scan all blocks back to front, and if no sufficient space is
found, eventually append a new block.
Blocks are only appended if the directory does not use extents or the new
block would require insertion of indirect blocks, as the old code does.
Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
Stefan Brüns [Tue, 6 Sep 2016 02:36:41 +0000 (04:36 +0200)]
ext4: fix possible crash on directory traversal, ignore deleted entries
The following command triggers a segfault in search_dir:
./sandbox/u-boot -c 'host bind 0 ./sandbox/test/fs/3GB.ext4.img ;
ext4write host 0 0 /./foo 0x10'
The following command triggers a segfault in check_filename:
./sandbox/u-boot -c 'host bind 0 ./sandbox/test/fs/3GB.ext4.img ;
ext4write host 0 0 /. 0x10'
"." is the first entry in the directory, thus previous_dir is NULL. The
whole previous_dir block in search_dir seems to be a bad copy from
check_filename(...). As the changed data is not written to disk, the
statement is mostly harmless, save the possible NULL-ptr reference.
Typically a file is unlinked by extending the direntlen of the previous
entry. If the entry is the first entry in the directory block, it is
invalidated by setting inode=0.
The inode==0 case is hard to trigger without crafted filesystems. It only
hits if the first entry in a directory block is deleted and later a lookup
for the entry (by name) is done.
Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
Michael Walle [Thu, 1 Sep 2016 09:21:40 +0000 (11:21 +0200)]
ext4: fix endianess problems in ext4 write support
All fields were accessed directly instead of using the proper byte swap
functions. Thus, ext4 write support was only usable on little-endian
architectures. Fix this.
Michael Walle [Mon, 29 Aug 2016 08:46:43 +0000 (10:46 +0200)]
ext4: change structure fields to __le/__be types
Change all the types of ext2/4 fields to little endian types and all the
JBD fields to big endian types. Now we can use sparse (make C=1) to check
for statements where we need byteswaps.
Stefan Brüns [Tue, 13 Sep 2016 23:01:30 +0000 (01:01 +0200)]
test/fs: Check ext4 behaviour if dirent is first entry in directory block
This is a regression test for a crash happening if the first dirent
in the block matches. Code tried to access a predecessor entry which
does not exist.
The crash happened for any block, but "." is always the first entry in
the first directory block and thus easy to check for.
Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
Stefan Brüns [Tue, 13 Sep 2016 23:01:29 +0000 (01:01 +0200)]
test/fs: strip noise from filesystem code prior to checking results
ext4 and fat code emit some diagnostic messages during command execution.
These additional lines force a match window size which strictly is not
necessary.
Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
Stefan Brüns [Tue, 13 Sep 2016 23:01:27 +0000 (01:01 +0200)]
test/fs: Restructure file path specification to allow some flexibility
Instead of providing the full path, specify directory and filename
separately. This allows to specify intermediate directories, required
for some additional tests.
Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
projects / u-boot.git / log
