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11 months agortc: driver for Goldfish RTC
Heinrich Schuchardt [Sat, 30 Dec 2023 23:53:00 +0000 (00:53 +0100)]
rtc: driver for Goldfish RTC

The Goldfish RTC is a virtual device which may be supplied by QEMU.
It is enabled by default on QEMU's RISC-V virt machine.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
11 months agofs: remove explicit efi configuration dependency
AKASHI Takahiro [Wed, 17 Jan 2024 04:39:44 +0000 (13:39 +0900)]
fs: remove explicit efi configuration dependency

Now it is clear that the feature actually depends on efi interfaces,
not "bootefi" command. efi_set_bootdev() will automatically be nullified
if necessary efi component is disabled.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
11 months agonet: tftp: remove explicit efi configuration dependency
AKASHI Takahiro [Wed, 17 Jan 2024 04:39:43 +0000 (13:39 +0900)]
net: tftp: remove explicit efi configuration dependency

Now it is clear that the feature actually depends on efi interfaces,
not "bootefi" command. efi_set_bootdev() will automatically be nullified
if necessary efi component is disabled.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
11 months agoefi_loader: rename BOOTEFI_BOOTMGR to EFI_BOOTMGR
AKASHI Takahiro [Wed, 17 Jan 2024 04:39:42 +0000 (13:39 +0900)]
efi_loader: rename BOOTEFI_BOOTMGR to EFI_BOOTMGR

At this point, EFI boot manager interfaces is fully independent from
bootefi command. So just rename the configuration parameter.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
11 months agoefi_loader: split unrelated code from efi_bootmgr.c
AKASHI Takahiro [Wed, 17 Jan 2024 04:39:41 +0000 (13:39 +0900)]
efi_loader: split unrelated code from efi_bootmgr.c

Some code moved from cmd/bootefi.c is actually necessary only for "bootefi
<addr>" command (starting an image manually loaded by a user using U-Boot
load commands or other methods (like JTAG debugger).

The code will never been opted out as unused code by a compiler which
doesn't know how EFI boot manager is implemented. So introduce a new
configuration, CONFIG_EFI_BINARY_EXEC, to enforce them opted out
explicitly.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
11 months agodoc: update requirements.txt
Heinrich Schuchardt [Sun, 14 Jan 2024 13:18:23 +0000 (14:18 +0100)]
doc: update requirements.txt

Update requirements.txt to most current packages as produced by

   python3 -m pip install six sphinx-rtd-theme sphinx-prompt
   python3 -m pip freeze

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
11 months agodoc: import Sphinx theme.css and pygments.css
Heinrich Schuchardt [Sun, 14 Jan 2024 13:18:22 +0000 (14:18 +0100)]
doc: import Sphinx theme.css and pygments.css

We want to override the Sphinx theme only partially. So we need to
import the Sphinx theme.css. Cf.
https://docs.readthedocs.io/en/stable/guides/adding-custom-css.html

We also need to import the pygments.css for syntax highlighing.

Use sans-serif for body.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
11 months agodoc: update theme_overrides.css
Heinrich Schuchardt [Sun, 14 Jan 2024 13:18:21 +0000 (14:18 +0100)]
doc: update theme_overrides.css

Update theme_overrides.css from Linux v6.7.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
11 months agodoc: add sphinx_rtd_theme extension
Heinrich Schuchardt [Sun, 14 Jan 2024 13:18:20 +0000 (14:18 +0100)]
doc: add sphinx_rtd_theme extension

Newer versions of sphinx_rtd_theme require to add sphinx_rtd_theme to the
list of extensions. Cf.
https://github.com/readthedocs/readthedocs.org/pull/9654

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
11 months agodocs/sphinx: Explicitly convert Sphinx paths to str
Oliver Faso [Sun, 14 Jan 2024 13:18:19 +0000 (14:18 +0100)]
docs/sphinx: Explicitly convert Sphinx paths to str

Sphinx 7.2+ is switching to using pathlib.Path
instead of str to represent paths. This fixes the
current deprecation warnings and eventual breakage.
This conversion will be a no-op when using older
Sphinx versions.

Signed-off-by: Oliver Faso <erer1243@gmail.com>
Tested-by: Akira Yokosawa <akiyks@gmail.com>
Signed-off-by: Jonathan Corbet <corbet@lwn.net>
Link: https://lore.kernel.org/r/20230910040811.53046-1-erer1243@gmail.com
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
11 months agodoc: create index entries for commands
Heinrich Schuchardt [Sun, 14 Jan 2024 13:53:13 +0000 (14:53 +0100)]
doc: create index entries for commands

Add the description of CLI commands to the generated index.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
11 months agodoc: add generated index to table of contents
Heinrich Schuchardt [Sun, 14 Jan 2024 13:54:03 +0000 (14:54 +0100)]
doc: add generated index to table of contents

Show the index in the navigation sidebar.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
11 months agodoc: dfu: fix a handful of typos
Mattijs Korpershoek [Wed, 3 Jan 2024 08:00:04 +0000 (09:00 +0100)]
doc: dfu: fix a handful of typos

Reword some sentences, add missing periods and fix various typos in the
dfu documentation.

This was originally contributed on [1]

[1] https://github.com/Maalobs/u-boot/commit/9a21ed8ba722d904b68945f40ca6697b4b1cc4d4

Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
11 months agoMerge tag 'qcom-2024.04-rc1' of https://gitlab.denx.de/u-boot/custodians/u-boot-snapd...
Tom Rini [Tue, 16 Jan 2024 14:51:16 +0000 (09:51 -0500)]
Merge tag 'qcom-2024.04-rc1' of https://gitlab.denx.de/u-boot/custodians/u-boot-snapdragon

Qualcomm architecture changes:

* Move clock and pinctrl drivers out of mach-snapdragon
* Various clock driver improvements
* Convert PMIC power/reset key driver to use the button API
* Preparetory work for migrating to upstream DT

11 months agoMerge tag 'u-boot-imx-20240115' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
Tom Rini [Tue, 16 Jan 2024 14:49:48 +0000 (09:49 -0500)]
Merge tag 'u-boot-imx-20240115' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

11 months agosandbox_flattree: enable button support
Caleb Connolly [Mon, 15 Jan 2024 18:03:17 +0000 (18:03 +0000)]
sandbox_flattree: enable button support

sandbox_flattree enables QCOM_PMIC_GPIO which now depends on BUTTON. As
a result the button tests now get run, but fail because the ADC and GPIO
button drivers aren't enabled.

Enable them to run the tests for sandbox_flattree.

Reported-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
11 months agotest: spmi: fix tests
Caleb Connolly [Mon, 8 Jan 2024 15:30:51 +0000 (15:30 +0000)]
test: spmi: fix tests

With the recent changes to the Qualcomm PMIC GPIO driver the sandbox
tests for it no longer pass, update the DTS and tests to work with the
changes.

Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
11 months agopmic: qcom: dont use dev_read_addr to get USID
Caleb Connolly [Tue, 5 Dec 2023 13:46:54 +0000 (13:46 +0000)]
pmic: qcom: dont use dev_read_addr to get USID

Linux DTs stuff a value indicating if the USID is a USID or a GSID in the
reg property, the Linux SPMI driver then reads the two address cells
separately. U-boot's dev_read_addr() doesn't know how to handle this, so
use ofnode_read_u32_index() to get just the USID.

The Qcom pmic driver doesn't have support for GSID handling, so just
ignore the second value for now.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Tested-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
11 months agospmi: msm: fix register range names
Caleb Connolly [Tue, 5 Dec 2023 13:46:53 +0000 (13:46 +0000)]
spmi: msm: fix register range names

The core and chnl register ranges were swapped on SDM845. Fix it, and
fetch the register ranges by name instead of by index.

Drop the cosmetic "version" variable and clean up the debug logging.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Tested-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
11 months agogpio: qcom_pmic: drop gpio-count property
Caleb Connolly [Tue, 5 Dec 2023 13:46:52 +0000 (13:46 +0000)]
gpio: qcom_pmic: drop gpio-count property

This property is not part of the dt bindings and all boards use the new
gpio-ranges property instead. Drop support for this.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Tested-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
11 months agodts: qcom: adjust pmic gpio to use upstream bindings
Caleb Connolly [Tue, 5 Dec 2023 13:46:51 +0000 (13:46 +0000)]
dts: qcom: adjust pmic gpio to use upstream bindings

Use the upstream gpio-ranges property instead of gpio-count, and drop
the bank-name property for Qualcomm boards.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Tested-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
11 months agogpio: qcom_pmic: support upstream DT
Caleb Connolly [Tue, 5 Dec 2023 13:46:50 +0000 (13:46 +0000)]
gpio: qcom_pmic: support upstream DT

Upstream uses the gpio-ranges property to define the number of GPIOs,
support for parsing this when gpio-count is unspecified

Additionally, drop the bank-name property as it isn't used in upstream,
and we can just hardcode the bank name instead.

Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Tested-by: Sumit Garg <sumit.garg@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
11 months agogpio: qcom_pmic: drop pon GPIO driver
Caleb Connolly [Tue, 5 Dec 2023 13:46:49 +0000 (13:46 +0000)]
gpio: qcom_pmic: drop pon GPIO driver

Remove the (now unused) GPIO driver for the power and resin buttons on
the PMIC.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Tested-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
11 months agomach-snapdragon: switch to PMIC button driver
Caleb Connolly [Tue, 5 Dec 2023 13:46:48 +0000 (13:46 +0000)]
mach-snapdragon: switch to PMIC button driver

The PMIC button driver is a much better representation of the hardware
here, adjust the boards to use upstream DT and the PMIC button driver
instead of exposing the buttons as GPIOs and relying on the GPIO-button
driver.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Tested-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
11 months agobutton: qcom-pmic: introduce Qualcomm PMIC button driver
Caleb Connolly [Tue, 5 Dec 2023 13:46:47 +0000 (13:46 +0000)]
button: qcom-pmic: introduce Qualcomm PMIC button driver

Qualcomm PMICs include a "pon" function which handles two buttons, the
power button and "resin" button (usually volume down). Introduce a new
driver following upstream Linux DT to enable these and map them to Enter
and Down respectively to enable use in boot menus.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Tested-by: Sumit Garg <sumit.garg@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
11 months agogpio: qcom_pmic: fix silent dev_read_addr downcast
Caleb Connolly [Tue, 5 Dec 2023 13:46:46 +0000 (13:46 +0000)]
gpio: qcom_pmic: fix silent dev_read_addr downcast

priv->pid is uint32_t, but dev_read_addr() returns a uint64_t on arm64,
with the upper bits being used for error codes. Do error checking before
downcasting to u32 to prevent errors being silently ignored.

Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Tested-by: Sumit Garg <sumit.garg@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
11 months agoserial: msm-geni: handle devm_clk_get() errors
Caleb Connolly [Tue, 14 Nov 2023 12:51:12 +0000 (12:51 +0000)]
serial: msm-geni: handle devm_clk_get() errors

devm_clk_get() returns an ERR_PTR on failure, not null. Fix the check to
avoid the board crashing when the clock isn't available.

Additionally, add the missing error handling for this function.

Fixes: 324df15a292e ("serial: qcom: add support for GENI serial driver")
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
11 months agoserial: msm-geni: don't rely on parent misc device
Caleb Connolly [Tue, 14 Nov 2023 12:51:11 +0000 (12:51 +0000)]
serial: msm-geni: don't rely on parent misc device

commit 1b15483deb3f ("misc: add Qualcomm GENI SE QUP device driver")
introduced support for platform-specific oversampling values, necessary
to configure the UART clocks on all platforms at runtime. However it
relies in probing a parent device. Despite the DM_FLAG_PRE_RELOC flag,
this is not done consistently during boot.

Instead, take another approach by relying on ofnode_ helpers to read the
serial engine base address and do the read directly. This fixes early
UART on boards with a non-default oversampling rate.

Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
11 months agomsm_gpio: use unsigned int
Caleb Connolly [Tue, 14 Nov 2023 12:55:43 +0000 (12:55 +0000)]
msm_gpio: use unsigned int

Replaces the uses of "unsigned" with "unsigned int".

Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
11 months agopinctrl: qcom: make compatible with linux DTs
Caleb Connolly [Tue, 14 Nov 2023 12:55:42 +0000 (12:55 +0000)]
pinctrl: qcom: make compatible with linux DTs

The pinctrl and GPIO drivers are currently heavily incompatible with
upstream. Most Qualcomm pinctrl blocks feature "tiles" of pins, each at
it's own address. Introduce support for these by allowing the soc driver
to specify per-pin register offsets similarly to the Linux driver.

Adjust the GPIO driver to handle these too, and finally enable support
for all pins with the same numbering as used in Linux.

Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
11 months agopinctrl: qcom: move ipq4019 driver from mach-ipq40xx
Caleb Connolly [Tue, 14 Nov 2023 12:55:41 +0000 (12:55 +0000)]
pinctrl: qcom: move ipq4019 driver from mach-ipq40xx

Drop the duplicated pinctrl-snapdragon driver from mach-ipq40xx and add
it to drivers/pinctrl/qcom.

Acked-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
11 months agopinctrl: qcom: move out of mach-snapdragon
Caleb Connolly [Tue, 14 Nov 2023 12:55:40 +0000 (12:55 +0000)]
pinctrl: qcom: move out of mach-snapdragon

Move the Qualcomm pinctrl drivers out of mach-snapdragon and over to the
rest of the pinctrl drivers, adjust the drivers so that support for each
platform can be enabled/disabled individually and introduce platform
specific configuration options.

Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
11 months agoclk/qcom: fix rcg divider value
Caleb Connolly [Tue, 7 Nov 2023 12:41:05 +0000 (12:41 +0000)]
clk/qcom: fix rcg divider value

The RCG divider field takes a value of (2*h - 1) where h is the divisor.
This allows fractional dividers to be supported by calculating them at
compile time using a macro.

However, the clk_rcg_set_rate_mnd() function was also performing the
calculation. Clean this all up and consistently use the F() macro to
calculate these at compile time and properly support fractional divisors.

Additionally, improve clk_bcr_update() to timeout with a warning rather
than hanging the board, and make the freq_tbl struct and helpers common
so that they can be reused by future platforms.

Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
11 months agoclk/qcom: add mnd_width to clk_rcg_set_rate_mnd()
Caleb Connolly [Tue, 7 Nov 2023 12:41:04 +0000 (12:41 +0000)]
clk/qcom: add mnd_width to clk_rcg_set_rate_mnd()

This property is needed on some platforms to ensure that only the
relevant bits are set in the M/N/D registers.

Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
11 months agoclk/qcom: use function pointers for enable and set_rate
Caleb Connolly [Tue, 7 Nov 2023 12:41:03 +0000 (12:41 +0000)]
clk/qcom: use function pointers for enable and set_rate

Currently, it isn't possible to build clock drivers for more than one
platform due to how the msm_enable() and msm_set_rate() callbacks are
implemented.

Extend qcom_clk_data to include function pointers for these and convert
all platforms to use them.

Previously, clock drivers relied on include/configs/<board.h> to include the
board specific sysmap header, however as most of the header contents are clock
driver related, import the contents directly into each clock driver and
remove the header. The only exception here is the dragonboard820c board file
which includes some pinctrl macros, those are also inlined.

Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
[caleb: remove additional sysmap-sdm845.h mention]

11 months agoclk/qcom: sdm845: add register map for simple gate clocks
Caleb Connolly [Tue, 7 Nov 2023 12:41:02 +0000 (12:41 +0000)]
clk/qcom: sdm845: add register map for simple gate clocks

Many gate clocks can be enabled with a single register write, add support
for defining these simple gate clocks and add the ones found on SDM845.

While we're here, inline clk_init_uart() into msm_set_rate().

Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
11 months agoclk/qcom: handle resets and clocks in one device
Konrad Dybcio [Tue, 7 Nov 2023 12:41:01 +0000 (12:41 +0000)]
clk/qcom: handle resets and clocks in one device

Qualcomm's clock controller blocks actually do much more than it
says on the tin.. They provide clocks, resets and power domains.
Currently, U-Boot requires one to spawn 2 separate devices for
controlling clocks and resets, both spanning the same register space.
Refactor the code to make it work with just a single DT node, making
it compatible with upstream Linux bindings and dropping the dedicated
reset driver in favour of including it in the clock driver.

Heavily inspired by Renesas code for a similar hw block.

[caleb: moved drivers to clk/qcom, added reset driver and adjusted bind
logic. Imported qcom,gcc-ipq4019.h from Linux]

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
11 months agoclk/qcom: move ipq4019 driver from mach-ipq40xx
Caleb Connolly [Tue, 7 Nov 2023 12:41:00 +0000 (12:41 +0000)]
clk/qcom: move ipq4019 driver from mach-ipq40xx

This driver is just a stub, but it's necessary to support the upcoming
reset driver changes.

Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
11 months agoclk/qcom: move from mach-snapdragon
Caleb Connolly [Tue, 7 Nov 2023 12:40:59 +0000 (12:40 +0000)]
clk/qcom: move from mach-snapdragon

Clock drivers don't belong here, move them to the right place and
declutter mach-snapdragon a bit.

To de-couple these drivers from specific "target" platforms, add
additional config options to enable each clock driver gated behind a
common CLK_QCOM option and enable them by default for the respective
targets. This will make future work easier as we move towards a generic
Qualcomm target.

Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
11 months agoMerge tag 'u-boot-nand-20240115' of https://source.denx.de/u-boot/custodians/u-boot...
Tom Rini [Mon, 15 Jan 2024 14:29:57 +0000 (09:29 -0500)]
Merge tag 'u-boot-nand-20240115' of https://source.denx.de/u-boot/custodians/u-boot-nand-flash

Pull request for u-boot-nand-20240115

The first patch is by Heinrich Schuchardt and fixes an integer overflow

The following two patches are by Dario Binacchi and add arguments check
to the nand_mtd_to_devnum() and nand_register() functions.

The remaining patches are by Roger Quadros and include various fixes for
the OMAP platform.

11 months agoarm: xea: Add support for boot image source descriptor in SPL
Anatolij Gustschin [Mon, 15 Jan 2024 13:51:30 +0000 (14:51 +0100)]
arm: xea: Add support for boot image source descriptor in SPL

We load two boot image source descriptor structures from last
two sectors in the SPI NOR flash and determine the boot source
for loading the kernel/DTB images, then adjust the boot order for
loading image from eMMC boot0 or boot1 partition.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Lukasz Majewski <lukma@denx.de>
11 months agoarm: config: Enable CRC8 support in SPL on imx287 XEA board
Lukasz Majewski [Mon, 15 Jan 2024 13:51:29 +0000 (14:51 +0100)]
arm: config: Enable CRC8 support in SPL on imx287 XEA board

The boot0/1 feature uses simple CRC8 to check (in SPL) if
SPI-NOR content is not corrupted, hence the need to enable
it.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
11 months agoarm: xea: Move XEA's environment variables from xea.h to xea.env
Lukasz Majewski [Mon, 15 Jan 2024 13:51:28 +0000 (14:51 +0100)]
arm: xea: Move XEA's environment variables from xea.h to xea.env

The default set of environment variables from CFG_EXTRA_ENV_SETTINGS
has been moved to a separate file - board/liebherr/xea/xea.env

Adjustments done:
- fitImage support
- SPI-NOR layout re-organization

Signed-off-by: Lukasz Majewski <lukma@denx.de>
11 months agoboard: phytec: fix link error when disabling PHYTEC_SOM_DETECTION
Yannic Moog [Mon, 15 Jan 2024 09:31:41 +0000 (10:31 +0100)]
board: phytec: fix link error when disabling PHYTEC_SOM_DETECTION

Commit aa7858fe5e2e ("board: phytec: som_detection: move definitions to
source file") moved function definitions from header to source file.
Makefile however was not updated to unconditionally (from
[..]_SOM_DETECTION) build the imx8 and phytec som detection units.
Also remove unused includes that cause build failures on arm 32bit
boards. SoM detection shall support 32bit boards as well, but arch
specific code should not be included in the generic module.

Fixes: aa7858fe5e2e ("board: phytec: som_detection: move definitions to source file")
Signed-off-by: Yannic Moog <y.moog@phytec.de>
11 months agoarm: mach-k3: am642: Define NAND boot device
Roger Quadros [Thu, 11 Jan 2024 13:19:20 +0000 (15:19 +0200)]
arm: mach-k3: am642: Define NAND boot device

AM642 SoC supports booting from GPMC NAND device.
Define boot device for it.

Signed-off-by: Roger Quadros <rogerq@kernel.org>
Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499180.html
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
11 months agomtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND
Roger Quadros [Thu, 11 Jan 2024 13:19:19 +0000 (15:19 +0200)]
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND

Set NAND chip ofnode and device so OF based partition parsing
can work.

Signed-off-by: Roger Quadros <rogerq@kernel.org>
Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
11 months agomtd: rawnand: omap_gpmc: Use DT provided IO address
Roger Quadros [Thu, 11 Jan 2024 13:19:18 +0000 (15:19 +0200)]
mtd: rawnand: omap_gpmc: Use DT provided IO address

For DM case we can get the NAND chip's IO address from DT
so we don't need to rely on CFG_SYS_NAND_BASE.

Signed-off-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
11 months agomemory: ti-gpmc: Fix build
Roger Quadros [Thu, 11 Jan 2024 13:19:17 +0000 (15:19 +0200)]
memory: ti-gpmc: Fix build

sys_proto.h no longer exists for K3 platform so drop it.
Include sizes.h to so SZ_16M is visible.

Signed-off-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499176.html
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
11 months agomtd: rawnand: omap_elm: Fix elm_init definition
Roger Quadros [Mon, 11 Dec 2023 11:46:00 +0000 (13:46 +0200)]
mtd: rawnand: omap_elm: Fix elm_init definition

The macro ELM_BASE is defined in mach/hardware.h and is
not visible at the omap_elm.h header file. Avoid using it
in omap_elm.h.

Reported-by: Hong Guan <hguan@ti.com>
Fixes: 7363cf0581a3 ("mtd: rawnand: omap_elm: u-boot driver model support")
Signed-off-by: Roger Quadros <rogerq@kernel.org>
Link: https://lore.kernel.org/all/20231211114600.4414-3-rogerq@kernel.org
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
11 months agomtd: nand: omap_gpmc: Fix NAND in SPL for AM335x
Roger Quadros [Mon, 11 Dec 2023 11:45:59 +0000 (13:45 +0200)]
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x

AM335x uses a special driver "am335x_spl_bch.c" as SPL
NAND loader. This driver expects 1 sector at a time ECC
and doesn't work well with multi-sector ECC that was implemented in
commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction")

Additionally, the omap_elm driver does not support multi sector ECC and will
need more work and tests to get multi sector working correctly on all
platforms.

Switch back to 1 sector at a time read/ECC.

Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction")
Signed-off-by: Roger Quadros <rogerq@kernel.org>
Tested-by: Enrico Leto <enrico.leto@siemens.com>
Tested-by: Heiko Schocher <hs@denx.de>
Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
11 months agomtd: nand: check nand_mtd_to_devnum() argument
Dario Binacchi [Thu, 2 Nov 2023 11:38:22 +0000 (12:38 +0100)]
mtd: nand: check nand_mtd_to_devnum() argument

If the "mtd" parameter is NULL, the search will definitely yield a
negative result. In that case, it's better to exit immediately.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Link: https://lore.kernel.org/all/20231102113829.58852-1-dario.binacchi@amarulasolutions.com
11 months agomtd: nand: complete nand_register() arguments check
Dario Binacchi [Thu, 2 Nov 2023 11:27:33 +0000 (12:27 +0100)]
mtd: nand: complete nand_register() arguments check

The patch checks that the "mtd" parameter is accessible before
proceeding.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Link: https://lore.kernel.org/all/20231102112743.57420-1-dario.binacchi@amarulasolutions.com
11 months agocmd: mtd: avoid unintentional integer overflow
Heinrich Schuchardt [Thu, 11 Jan 2024 07:31:55 +0000 (08:31 +0100)]
cmd: mtd: avoid unintentional integer overflow

mtd dump beyond 4 GiB will show incorrect results.

Multiplying two u32 will yield a u32. Add a missing cast.

Fixes: 5db66b3aee6f ("cmd: mtd: add 'mtd' command")
Addresses-Coverity-ID: 477205 ("Unintentional integer overflow")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/all/20240111073155.19545-1-heinrich.schuchardt@canonical.com
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
11 months agoMerge branch 'master-sync-dts-663' of https://source.denx.de/u-boot/custodians/u...
Tom Rini [Sun, 14 Jan 2024 23:07:49 +0000 (18:07 -0500)]
Merge branch 'master-sync-dts-663' of https://source.denx.de/u-boot/custodians/u-boot-sh

11 months agoARM: dts: renesas: Synchronize R-Car R8A779F0 S4 DTs with Linux 6.6.3
Marek Vasut [Sun, 3 Dec 2023 13:15:24 +0000 (14:15 +0100)]
ARM: dts: renesas: Synchronize R-Car R8A779F0 S4 DTs with Linux 6.6.3

Synchronize R-Car R8A779F0 S4 DTs with Linux 6.6.3,
commit bd3a9e5771a8b332f466d06f7c130a69cab0d526 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
11 months agoARM: dts: renesas: Synchronize R-Car R8A77990 E3 DTs with Linux 6.6.3
Marek Vasut [Sun, 3 Dec 2023 13:15:23 +0000 (14:15 +0100)]
ARM: dts: renesas: Synchronize R-Car R8A77990 E3 DTs with Linux 6.6.3

Synchronize R-Car R8A77990 E3 DTs with Linux 6.6.3,
commit bd3a9e5771a8b332f466d06f7c130a69cab0d526 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
11 months agoARM: dts: renesas: Synchronize R-Car R8A77970 V3M DTs with Linux 6.6.3
Marek Vasut [Sun, 3 Dec 2023 13:15:22 +0000 (14:15 +0100)]
ARM: dts: renesas: Synchronize R-Car R8A77970 V3M DTs with Linux 6.6.3

Synchronize R-Car R8A77970 V3M DTs with Linux 6.6.3,
commit bd3a9e5771a8b332f466d06f7c130a69cab0d526 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
11 months agoARM: dts: renesas: Synchronize R-Car R8A7792 V2H DTs with Linux 6.6.3
Marek Vasut [Sun, 3 Dec 2023 13:15:21 +0000 (14:15 +0100)]
ARM: dts: renesas: Synchronize R-Car R8A7792 V2H DTs with Linux 6.6.3

Synchronize R-Car R8A7792 V2H DTs with Linux 6.6.3,
commit bd3a9e5771a8b332f466d06f7c130a69cab0d526 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
11 months agoclk: renesas: Synchronize RZ R8A774E1 RZ/G2H clock tables with Linux 6.6.3
Marek Vasut [Sun, 3 Dec 2023 13:15:20 +0000 (14:15 +0100)]
clk: renesas: Synchronize RZ R8A774E1 RZ/G2H clock tables with Linux 6.6.3

Synchronize RZ R8A774E1 RZ/G2H clock tables with Linux 6.6.3,
commit bd3a9e5771a8b332f466d06f7c130a69cab0d526 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
11 months agoclk: renesas: Synchronize RZ R8A774C0 RZ/G2E clock tables with Linux 6.6.3
Marek Vasut [Sun, 3 Dec 2023 13:15:19 +0000 (14:15 +0100)]
clk: renesas: Synchronize RZ R8A774C0 RZ/G2E clock tables with Linux 6.6.3

Synchronize RZ R8A774C0 RZ/G2E clock tables with Linux 6.6.3,
commit bd3a9e5771a8b332f466d06f7c130a69cab0d526 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
11 months agoclk: renesas: Synchronize RZ R8A774B1 RZ/G2N clock tables with Linux 6.6.3
Marek Vasut [Sun, 3 Dec 2023 13:15:18 +0000 (14:15 +0100)]
clk: renesas: Synchronize RZ R8A774B1 RZ/G2N clock tables with Linux 6.6.3

Synchronize RZ R8A774B1 RZ/G2N clock tables with Linux 6.6.3,
commit bd3a9e5771a8b332f466d06f7c130a69cab0d526 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
11 months agoclk: renesas: Synchronize RZ R8A774A1 RZ/G2M clock tables with Linux 6.6.3
Marek Vasut [Sun, 3 Dec 2023 13:15:17 +0000 (14:15 +0100)]
clk: renesas: Synchronize RZ R8A774A1 RZ/G2M clock tables with Linux 6.6.3

Synchronize RZ R8A774A1 RZ/G2M clock tables with Linux 6.6.3,
commit bd3a9e5771a8b332f466d06f7c130a69cab0d526 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
11 months agoclk: renesas: Synchronize R-Car R8A77995 D3 clock tables with Linux 6.6.3
Marek Vasut [Sun, 3 Dec 2023 13:15:16 +0000 (14:15 +0100)]
clk: renesas: Synchronize R-Car R8A77995 D3 clock tables with Linux 6.6.3

Synchronize R-Car R8A77995 D3 clock tables with Linux 6.6.3,
commit bd3a9e5771a8b332f466d06f7c130a69cab0d526 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
11 months agoclk: renesas: Synchronize R-Car R8A77990 E3 clock tables with Linux 6.6.3
Marek Vasut [Sun, 3 Dec 2023 13:15:15 +0000 (14:15 +0100)]
clk: renesas: Synchronize R-Car R8A77990 E3 clock tables with Linux 6.6.3

Synchronize R-Car R8A77990 E3 clock tables with Linux 6.6.3,
commit bd3a9e5771a8b332f466d06f7c130a69cab0d526 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
11 months agoclk: renesas: Synchronize R-Car R8A77965 M3-N clock tables with Linux 6.6.3
Marek Vasut [Sun, 3 Dec 2023 13:15:14 +0000 (14:15 +0100)]
clk: renesas: Synchronize R-Car R8A77965 M3-N clock tables with Linux 6.6.3

Synchronize R-Car R8A77965 M3-N clock tables with Linux 6.6.3,
commit bd3a9e5771a8b332f466d06f7c130a69cab0d526 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
11 months agoclk: renesas: Synchronize R-Car R8A77960 M3-W and R8A77961 M3-W+ clock tables with...
Marek Vasut [Sun, 3 Dec 2023 13:15:13 +0000 (14:15 +0100)]
clk: renesas: Synchronize R-Car R8A77960 M3-W and R8A77961 M3-W+ clock tables with Linux 6.6.3

Synchronize R-Car R8A77960 M3-W and R8A77961 M3-W+ clock tables with Linux 6.6.3,
commit bd3a9e5771a8b332f466d06f7c130a69cab0d526 .

Add ZG clock macro into rcar-gen3-cpg.h to cover the new clock type .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
11 months agoMerge tag 'efi-2024-04-rc1' of https://source.denx.de/u-boot/custodians/u-boot-efi
Tom Rini [Sun, 14 Jan 2024 14:34:14 +0000 (09:34 -0500)]
Merge tag 'efi-2024-04-rc1' of https://source.denx.de/u-boot/custodians/u-boot-efi

Pull request efi-2024-04-rc1

Documentation:

* update coreboot graphics documentation
* fix '---' rendering

UEFI:

* add missing pointer check after memory allocation in efidebug
* replace duplicate functions efi_dp_append and efi_dp_concat
* support fmp versioning for multi bank update
* avoid using dm_scan_other() in EFI app

11 months agoARM: imx: Set stdio to serial on Data Modul i.MX8M Mini/Plus eDM SBC
Marek Vasut [Sat, 13 Jan 2024 17:59:13 +0000 (18:59 +0100)]
ARM: imx: Set stdio to serial on Data Modul i.MX8M Mini/Plus eDM SBC

In case CONSOLE_MUX and SYS_CONSOLE_IS_IN_ENV are enabled, the console
stdin, stdout, stderr must be defined in environment. Define the default
settings to fix the following warning on boot:

"
In:    No input devices available!
Out:   No output devices available!
Err:   No error devices available!
"

Sort the default environment as well.

Signed-off-by: Marek Vasut <marex@denx.de>
11 months agoARM: imx: Set stdio to serial on DH i.MX8M Plus DHCOM
Marek Vasut [Sat, 13 Jan 2024 17:58:30 +0000 (18:58 +0100)]
ARM: imx: Set stdio to serial on DH i.MX8M Plus DHCOM

In case CONSOLE_MUX and SYS_CONSOLE_IS_IN_ENV are enabled, the console
stdin, stdout, stderr must be defined in environment. Define the default
settings to fix the following warning on boot:

"
In:    No input devices available!
Out:   No output devices available!
Err:   No error devices available!
"

Sort the default environment as well.

Signed-off-by: Marek Vasut <marex@denx.de>
11 months agocmd: efidebug: check pointer after memory allocation
Heinrich Schuchardt [Thu, 11 Jan 2024 08:25:35 +0000 (09:25 +0100)]
cmd: efidebug: check pointer after memory allocation

After calling efi_alloc() we must check that the return value is not NULL.

Fixes: f01c961ee34c ("cmd: efidebug: add uri device path")
Addresses-Coverity-ID: 477185 Dereference null return value
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
11 months agoefi_loader: support fmp versioning for multi bank update
Masahisa Kojima [Thu, 11 Jan 2024 05:35:40 +0000 (14:35 +0900)]
efi_loader: support fmp versioning for multi bank update

This commit stores the firmware version into the array
of fmp_state structure to support the fmp versioning
for multi bank update. The index of the array is identified
by the bank index.

This modification keeps the backward compatibility with
the existing versioning feature.

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
11 months agofwu: fix fwu_get_image_index interface
Masahisa Kojima [Thu, 11 Jan 2024 05:35:39 +0000 (14:35 +0900)]
fwu: fix fwu_get_image_index interface

The capsule update uses the DFU framework for updating
storage. fwu_get_image_index() currently returns the
image_index calculated by (dfu_alt_num + 1), but this is
different from the image_index in UEFI terminology.

Since capsule update implementation calls dfu_write_by_alt
function, it is better that FWU returns the dfu_alt_num.

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
11 months agoefi_loader: Clean up efi_dp_append and efi_dp_concat
Ilias Apalodimas [Mon, 8 Jan 2024 08:55:33 +0000 (10:55 +0200)]
efi_loader: Clean up efi_dp_append and efi_dp_concat

Looking back at the initrd storing functionality, we introduced three
functions, efi_dp_append_or_concatenate(), efi_dp_append/concat(). In
hindsight we could have simplified that by a lot. First of all none of
the functions append anything. They all allocate a new device path and
concatenate the contents of two device paths in one. A boolean parameter
controls the final device path -- if that's true an end node is injected
between the two device paths.

So let's rewrite this and make it a bit easier to read. Get rid of
efi_dp_append(), efi_dp_concat() and rename
efi_dp_append_or_concatenate() to efi_dp_concat(). This is far more
intuitive and the only adjustment that is needed is an extra boolean
argument on all callsites.

Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
11 months agodoc: fix three-dash references in reStructuredText
Grzegorz Szymaszek [Sat, 6 Jan 2024 10:36:54 +0000 (11:36 +0100)]
doc: fix three-dash references in reStructuredText

The "Sending patches" and "Patman patch manager" documents refer to the
three-dash, "---", that separates patch parts. The symbol is written in
the documentation in the same form as it is in actual patches: as three
U+002D HYPHEN-MINUS characters. When building the documentation, Sphinx
converts this symbol to a U+2014 EM DASH, that is invalid in this case.

Make the three-dash symbol a reStructuredText inline literal to prevent
its conversion; that is, enclose it in a pair of double backquotes (`).

Signed-off-by: Grzegorz Szymaszek <gszymaszek@short.pl>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
11 months agodoc: coreboot: Update stale graphics enabling instructions
Bin Meng [Thu, 4 Jan 2024 23:25:42 +0000 (07:25 +0800)]
doc: coreboot: Update stale graphics enabling instructions

With latest coreboot (e.g.: v4.22.01), the instructions to enable
graphics support has changed. Refresh the doc.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
11 months agoefi_loader: remove unused members from struct efi_disk_obj
Masahisa Kojima [Mon, 25 Dec 2023 04:43:54 +0000 (13:43 +0900)]
efi_loader: remove unused members from struct efi_disk_obj

part and dev_index in struct efi_disk_obj are not used,
let's remove it.

This commit also removes the invalid structure comment
for @dev, it does not exist.

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
11 months agoefi: Avoid using dm_scan_other()
Simon Glass [Tue, 19 Dec 2023 14:27:19 +0000 (07:27 -0700)]
efi: Avoid using dm_scan_other()

This function is defined by bootstd so using it precludes using that
feature. Use the board_early_init_r() feature instead.

Nove the affected code into a new file, so that it is clear that
this relates to board init.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
11 months agoefi_loader: fix iteration of FMP protocols
Masahisa Kojima [Mon, 18 Dec 2023 09:57:41 +0000 (18:57 +0900)]
efi_loader: fix iteration of FMP protocols

If one of the FMP protocols fails when calling GetImageInfo(),
populating the ESRT ends up with failure and other FMP protocols
are not added to the ESRT. We should still add all other FMP
protocols to the ESRT.

With this commit, iteration of all FMP protocols continues
even though one of the FMP protocols fails.

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Tested-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
11 months agodefconfig: xea: Change default spi-nor memory bus to 2 (single binary)
Lukasz Majewski [Fri, 12 Jan 2024 16:01:48 +0000 (17:01 +0100)]
defconfig: xea: Change default spi-nor memory bus to 2 (single binary)

After the re-sync with Linux kernel (v6.0) of the XEA DTS
(SHA1: 7d08ddd09b75e7a3c103cc0d0d3ed700287f268e) the alias
for SPI bus, to which SPI-NOR  memory is connected, has changed from
'spi3' to 'spi2'.

To be in sync with current u-boot's xea dts, the default bus number
(which allows running 'sf probe' without any extra parameters given)
has been adjusted.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
11 months agoimx: imx9: fixup thermal trips from fuses
Primoz Fiser [Thu, 11 Jan 2024 12:56:25 +0000 (13:56 +0100)]
imx: imx9: fixup thermal trips from fuses

Read i.MX9 CPU temp grade from fuses and fixup thermal trips in Linux
device-tree accordingly.

Based on commit 0543a1ed2787 ("imx8m: fixup thermal trips")

Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
11 months agoboard: phytec: MAINTAINERS: add missing phytec doc files
Yannic Moog [Wed, 10 Jan 2024 13:35:46 +0000 (14:35 +0100)]
board: phytec: MAINTAINERS: add missing phytec doc files

Add rst documentation files to the respective MAINTAINERS file for
PHYTEC boards.

Signed-off-by: Yannic Moog <y.moog@phytec.de>
Reviewed-by: Teresa Remmet <t.remmet@phytec.de>
11 months agodoc: board: phytec: Add phyGATE-Tauri board documentation
Yannic Moog [Wed, 10 Jan 2024 13:35:45 +0000 (14:35 +0100)]
doc: board: phytec: Add phyGATE-Tauri board documentation

Add brief documentation on how to build a bootable U-Boot image for the
phyGATE-Tauri-L.

Signed-off-by: Yannic Moog <y.moog@phytec.de>
Reviewed-by: Teresa Remmet <t.remmet@phytec.de>
11 months agoAdd support for phyGATE-Tauri-L-iMX8MM
Yannic Moog [Wed, 10 Jan 2024 13:35:44 +0000 (14:35 +0100)]
Add support for phyGATE-Tauri-L-iMX8MM

phyGATE-Tauri-L-iMX8MM is a Gateway based on the phycore-imx8mm SoM.
As a result, all the board code of the phycore-imx8mm is used.
Device tree synced with kernel v6.7.

Signed-off-by: Yannic Moog <y.moog@phytec.de>
Reviewed-by: Teresa Remmet <t.remmet@phytec.de>
11 months agoimx8m: Select BINMAN at SoC level
Fabio Estevam [Mon, 8 Jan 2024 21:11:40 +0000 (18:11 -0300)]
imx8m: Select BINMAN at SoC level

All i.MX8M targets rely on using binman to generate the U-Boot
binary.

Select it at the SoC level instead of per board.

Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
11 months agoimx9: Select BINMAN at SoC level
Fabio Estevam [Mon, 8 Jan 2024 21:11:39 +0000 (18:11 -0300)]
imx9: Select BINMAN at SoC level

All i.MX93 targets rely on using binman to generate the U-Boot
binary.

Select it at the SoC level instead of per board.

Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
11 months agodoc: imx93_var_som: Adjust the underline length
Fabio Estevam [Mon, 8 Jan 2024 21:11:38 +0000 (18:11 -0300)]
doc: imx93_var_som: Adjust the underline length

Adjust the underline length so that it matches the title length.

Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
11 months agoMerge branch '2024-01-12-assorted-fixes'
Tom Rini [Fri, 12 Jan 2024 13:34:50 +0000 (08:34 -0500)]
Merge branch '2024-01-12-assorted-fixes'

- Allow defconfigs to #include files (so we can construct a defconfig
  from fragments), update phy-mtk-tphy binding, assorted test fixes,
  allow building host tools without cryptographic libraries again,
  android_ab bugfix, and make some SPL debugging cases easier.

11 months agoMakefile: Run defconfig files through the C preprocessor
Andrew Davis [Wed, 1 Nov 2023 17:05:18 +0000 (12:05 -0500)]
Makefile: Run defconfig files through the C preprocessor

This allows us to use some of the normal preprocessor directives inside
defconfig files. Such as #define and #include.

Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Nishanth Menon <nm@ti.com>
11 months agoandroid_ab: don't ignore ab_control_store return code
Alexey Romanov [Mon, 25 Dec 2023 10:22:45 +0000 (13:22 +0300)]
android_ab: don't ignore ab_control_store return code

ab_control_store() can return an error if writing to disk fails.
In this case, we have to pass the error code to the caller.

Signed-off-by: Alexey Romanov <avromanov@salutedevices.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
11 months agotools: fix build without LIBCRYPTO support
Paul-Erwan Rio [Thu, 21 Dec 2023 07:26:11 +0000 (08:26 +0100)]
tools: fix build without LIBCRYPTO support

Commit cb9faa6f98ae ("tools: Use a single target-independent config to
enable OpenSSL") introduced a target-independent configuration to build
crypto features in host tools.

But since commit 2c21256b27d7 ("hash: Use Kconfig to enable hashing in
host tools and SPL") the build without OpenSSL is broken, due to FIT
signature/encryption features. Add missing conditional compilation
tokens to fix this.

Signed-off-by: Paul-Erwan Rio <paulerwan.rio@gmail.com>
Tested-by: Alexander Dahl <ada@thorsis.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
11 months agotools: kwbimage: Allow disabling build on non-mvebu platforms
Alexander Dahl [Thu, 21 Dec 2023 07:26:10 +0000 (08:26 +0100)]
tools: kwbimage: Allow disabling build on non-mvebu platforms

Some users want to build with CONFIG_TOOLS_LIBCRYPTO disabled, which in
general is possible for at least some boards.  32-bit mvebu however
requires kwbimage for building SPL, and kwbimage has a hard dependency
to host OpenSSL.

The new symbol CONFIG_TOOLS_KWBIMAGE allows disabling kwbimage build on
non-mvebu platforms, and thus building without host libcrypto from
OpenSSL.

Based on previous work and discussions, see links below.

Link: https://lore.kernel.org/u-boot/20211021093304.25399-1-pali@kernel.org/
Link: https://lore.kernel.org/u-boot/20220111153120.1276641-1-marex@denx.de/
Link: https://lore.kernel.org/u-boot/20230121154743.667253-2-paulerwan.rio@gmail.com/
Cc: Marek Vasut <marex@denx.de>
Cc: Paul-Erwan Rio <paulerwan.rio@gmail.com>
Signed-off-by: Alexander Dahl <ada@thorsis.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
11 months agotest: fs: fs-test: Move the tests to use sha256sum
Peter Robinson [Tue, 19 Dec 2023 22:01:50 +0000 (22:01 +0000)]
test: fs: fs-test: Move the tests to use sha256sum

Move the use of md5s for recording filesystem file integrity
checks to sha256 hashes as they're preferred due to being
less likely to produce clashing hashes. In the process
generalise some of the wording to use the more generic
hash term.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
11 months agoti: am335x: Remove unused linker script
Tom Rini [Tue, 19 Dec 2023 14:03:30 +0000 (09:03 -0500)]
ti: am335x: Remove unused linker script

The board specific linker script has not been used in a long time here,
remove it.

Signed-off-by: Tom Rini <trini@konsulko.com>
11 months agoarm: spl: Use separate fault handlers instead of a single common one
Csókás Bence [Tue, 19 Dec 2023 13:33:18 +0000 (14:33 +0100)]
arm: spl: Use separate fault handlers instead of a single common one

It may be necessary to set breakpoints etc. on a specific fault handler in SPL.
Add a Kconfig option to separate the different handlers into their own individual infinite loops.

Signed-off-by: Csókás Bence <csokas.bence@prolan.hu>
11 months agotest: CONFIG_UT_BOOTSTD must depend on CONFIG_BOOTSTD
Heinrich Schuchardt [Sat, 16 Dec 2023 15:46:31 +0000 (16:46 +0100)]
test: CONFIG_UT_BOOTSTD must depend on CONFIG_BOOTSTD

Building sandbox_defconfig with

    CONFIG_BOOTSTD=n
    CONFIG_UT_BOOTSTD=y

leads to an error

    /usr/bin/ld: test/cmd_ut.o:(.data.rel.cmd_ut_sub+0xc0):
    undefined reference to `do_ut_bootstd'

Add the missing dependency.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
11 months agoboot: CONFIG_CEDIT must depend on CONFIG_EXPO
Heinrich Schuchardt [Sat, 16 Dec 2023 15:38:36 +0000 (16:38 +0100)]
boot: CONFIG_CEDIT must depend on CONFIG_EXPO

Building sandbox_defconfig with

    CONFIG_CMD_CEDIT=y
    CONFIG_EXPO=n

fails with

    cmd/cedit.c:258:(.text.do_cedit_run+0x4c):
    undefined reference to `expo_apply_theme

Fix the dependencies.

Fixes: a0874dc4ac71 ("expo: Add a configuration editor")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
11 months agotest: build test/boot for CONFIG_UT_BOOTSTD=n
Heinrich Schuchardt [Sat, 16 Dec 2023 15:19:54 +0000 (16:19 +0100)]
test: build test/boot for CONFIG_UT_BOOTSTD=n

Building sandbox_defconfig with

    CONFIG_UT_BOOTSTD=n
    CONFIG_MEASURMENT=y

results in an error:

    /usr/bin/ld: test/cmd_ut.o:(.data.rel.cmd_ut_sub+0x408):
    undefined reference to `do_ut_measurement'

Fixes: 5999ea20fa42 ("test: Add sandbox TPM boot measurement")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
11 months agoboot: Support decompressing non-kernel OS images
Simon Glass [Fri, 15 Dec 2023 23:54:16 +0000 (16:54 -0700)]
boot: Support decompressing non-kernel OS images

Sometimes the kernel is built as an EFI application rather than a
binary. We still want to support compression for this case.

For arm64 the entry point is set later in the bootm_load_os() function,
since these images are typically relocated due to the 2MB-alignment
requirement of arm64 images. But since the EFI image is not in the same
format, we need to update the entry point earlier.

Set the entry point always, for kernel_noload to resolve this problem.
It should be harmless to do this always.

Signed-off-by: Simon Glass <sjg@chromium.org>
11 months agophy: phy-mtk-tphy: add properties for phy tuning
Chunfeng Yun [Wed, 13 Dec 2023 06:41:34 +0000 (14:41 +0800)]
phy: phy-mtk-tphy: add properties for phy tuning

Add properties to improve eye diagram which sometimes need adjust
some parameters of u2phy;
Add a property to tune disconnect threshold;

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
11 months agodt-bindings: phy-mtk-tphy: add properties for phy tuning
Chunfeng Yun [Wed, 13 Dec 2023 06:41:33 +0000 (14:41 +0800)]
dt-bindings: phy-mtk-tphy: add properties for phy tuning

Add properties to improve eye diagram which sometimes need adjust
some parameters of u2phy;
Add a property to tune disconnect threshold;

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>