]>
git.dujemihanovic.xyz Git - u-boot.git/log
Marek Vasut [Sun, 17 Sep 2023 14:13:18 +0000 (16:13 +0200)]
ARM: dts: renesas: Synchronize RZ R8A774E1 RZ/G2H DTs with Linux 6.5.3
Synchronize RZ R8A774E1 RZ/G2H DTs with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:13:17 +0000 (16:13 +0200)]
ARM: dts: renesas: Synchronize RZ R8A774C0 RZ/G2E DTs with Linux 6.5.3
Synchronize RZ R8A774C0 RZ/G2E DTs with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:13:16 +0000 (16:13 +0200)]
ARM: dts: renesas: Synchronize RZ R8A774B1 RZ/G2N DTs with Linux 6.5.3
Synchronize RZ R8A774B1 RZ/G2N DTs with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:13:15 +0000 (16:13 +0200)]
ARM: dts: renesas: Synchronize RZ R8A774A1 RZ/G2M DTs with Linux 6.5.3
Synchronize RZ R8A774A1 RZ/G2M DTs with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Adam Ford <aford173@gmail.com>
Marek Vasut [Sun, 17 Sep 2023 14:13:14 +0000 (16:13 +0200)]
ARM: dts: renesas: Synchronize RZ R7S72100 RZ/A1 DTs with Linux 6.5.3
Synchronize RZ R7S72100 RZ/A1 DTs with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:13:13 +0000 (16:13 +0200)]
ARM: dts: renesas: Synchronize R-Car R8A779G0 V4H DTs with Linux 6.5.3
Synchronize R-Car R8A779G0 V4H DTs with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:13:12 +0000 (16:13 +0200)]
ARM: dts: renesas: Synchronize R-Car R8A779F0 S4 DTs with Linux 6.5.3
Synchronize R-Car R8A779F0 S4 DTs with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:13:11 +0000 (16:13 +0200)]
ARM: dts: renesas: Synchronize R-Car R8A779A0 E3 DTs with Linux 6.5.3
Synchronize R-Car R8A779A0 E3 DTs with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:13:10 +0000 (16:13 +0200)]
ARM: dts: renesas: Synchronize R-Car R8A77995 D3 DTs with Linux 6.5.3
Synchronize R-Car R8A77995 D3 DTs with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:13:09 +0000 (16:13 +0200)]
ARM: dts: renesas: Synchronize R-Car R8A77990 E3 DTs with Linux 6.5.3
Synchronize R-Car R8A77990 E3 DTs with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:13:08 +0000 (16:13 +0200)]
ARM: dts: renesas: Synchronize R-Car R8A77980 V3H DTs with Linux 6.5.3
Synchronize R-Car R8A77980 V3H DTs with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:13:07 +0000 (16:13 +0200)]
ARM: dts: renesas: Synchronize R-Car R8A77970 V3M DTs with Linux 6.5.3
Synchronize R-Car R8A77970 V3M DTs with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:13:06 +0000 (16:13 +0200)]
ARM: dts: renesas: Synchronize R-Car R8A77965 M3-N DTs with Linux 6.5.3
Synchronize R-Car R8A77965 M3-N DTs with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:13:05 +0000 (16:13 +0200)]
ARM: dts: renesas: Synchronize R-Car R8A77960 M3-W and R8A77961 M3-W+ DTs with Linux 6.5.3
Synchronize R-Car R8A77960 M3-W and R8A77961 M3-W+ DTs with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:13:04 +0000 (16:13 +0200)]
ARM: dts: renesas: Synchronize R-Car R8A77951 H3 DTs with Linux 6.5.3
Synchronize R-Car R8A77951 H3 DTs with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:13:03 +0000 (16:13 +0200)]
ARM: dts: renesas: Synchronize R-Car R8A7794 E2 DTs with Linux 6.5.3
Synchronize R-Car R8A7794 E2 DTs with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:13:02 +0000 (16:13 +0200)]
ARM: dts: renesas: Synchronize R-Car R8A7791 M2-W and R8A7793 M2-N DTs with Linux 6.5.3
Synchronize R-Car R8A7791 M2-W and R8A7793 M2-N DTs with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:13:01 +0000 (16:13 +0200)]
ARM: dts: renesas: Synchronize R-Car R8A7790 H2 DTs with Linux 6.5.3
Synchronize R-Car R8A7790 H2 DTs with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:11:41 +0000 (16:11 +0200)]
clk: renesas: Synchronize R8A774E1 RZ/G2H clock tables with Linux 6.5.3
Synchronize R8A774E1 RZ/G2H clock tables with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:11:40 +0000 (16:11 +0200)]
clk: renesas: Synchronize R8A774C0 RZ/G2E clock tables with Linux 6.5.3
Synchronize R8A774C0 RZ/G2E clock tables with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:11:39 +0000 (16:11 +0200)]
clk: renesas: Synchronize R8A774B1 RZ/G2N clock tables with Linux 6.5.3
Synchronize R8A774B1 RZ/G2N clock tables with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:11:38 +0000 (16:11 +0200)]
clk: renesas: Synchronize R8A774A1 RZ/G2M clock tables with Linux 6.5.3
Synchronize R8A774A1 RZ/G2M clock tables with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:11:37 +0000 (16:11 +0200)]
clk: renesas: Synchronize R8A779G0 V4H clock tables with Linux 6.5.3
Synchronize R-Car R8A779G0 V4H clock tables with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
The PLL2_VAR is not implemented yet and PLL2 is still configured
as regular PLL2 only.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:11:36 +0000 (16:11 +0200)]
clk: renesas: Synchronize R8A779F0 S4 clock tables with Linux 6.5.3
Synchronize R-Car R8A779F0 S4 clock tables with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:11:35 +0000 (16:11 +0200)]
clk: renesas: Synchronize R8A779A0 V3U clock tables with Linux 6.5.3
Synchronize R-Car R8A779A0 V3U clock tables with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:11:34 +0000 (16:11 +0200)]
clk: renesas: Synchronize R8A77995 D3 clock tables with Linux 6.5.3
Synchronize R-Car R8A77995 D3 clock tables with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:11:33 +0000 (16:11 +0200)]
clk: renesas: Synchronize R8A77990 E3 clock tables with Linux 6.5.3
Synchronize R-Car R8A77990 E3 clock tables with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:11:32 +0000 (16:11 +0200)]
clk: renesas: Synchronize R8A77980 V3H clock tables with Linux 6.5.3
Synchronize R-Car R8A77980 V3H clock tables with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:11:31 +0000 (16:11 +0200)]
clk: renesas: Synchronize R8A77970 V3M clock tables with Linux 6.5.3
Synchronize R-Car R8A77970 V3M clock tables with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:11:30 +0000 (16:11 +0200)]
clk: renesas: Synchronize R8A77965 M3-N clock tables with Linux 6.5.3
Synchronize R-Car R8A77965 M3-N clock tables with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:11:29 +0000 (16:11 +0200)]
clk: renesas: Synchronize R8A77960 M3-W and R8A77961 M3-W+ clock tables with Linux 6.5.3
Synchronize R-Car R8A77960 M3-W and R8A77961 M3-W+ clock tables with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:11:28 +0000 (16:11 +0200)]
clk: renesas: Synchronize R8A77951 H3 clock tables with Linux 6.5.3
Synchronize R-Car R8A77951 H3 clock tables with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:11:27 +0000 (16:11 +0200)]
clk: renesas: Synchronize R8A7794 E2 clock tables with Linux 6.5.3
Synchronize R-Car R8A7794 E2 clock tables with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:11:26 +0000 (16:11 +0200)]
clk: renesas: Synchronize R8A7792 V2H clock tables with Linux 6.5.3
Synchronize R-Car R8A7792 V2H clock tables with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:11:25 +0000 (16:11 +0200)]
clk: renesas: Synchronize R8A7791 M2-W and R8A7793 M2-N clock tables with Linux 6.5.3
Synchronize R-Car R8A7791 M2-W and R8A7793 M2-N clock tables with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:11:24 +0000 (16:11 +0200)]
clk: renesas: Synchronize R8A7790 H2 clock tables with Linux 6.5.3
Synchronize R-Car R8A7790 H2 clock tables with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:11:23 +0000 (16:11 +0200)]
clk: renesas: Synchronize R8A779F0 S4 DT headers with Linux 6.5.3
Synchronize R-Car R8A779F0 S4 DT headers with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:11:22 +0000 (16:11 +0200)]
clk: renesas: Synchronize R8A77951 H3 DT headers with Linux 6.5.3
Synchronize R-Car R8A77951 H3 DT headers with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:09:39 +0000 (16:09 +0200)]
linux/compat.h: Define empty __initconst and __initdata
Introduce two new empty macros used in various static tables in Linux.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Marek Vasut [Sun, 17 Sep 2023 14:08:49 +0000 (16:08 +0200)]
pinctrl: renesas: Synchronize R8A779G0 V4H PFC tables with Linux 6.5.3
Synchronize R-Car R8A779G0 V4H PFC tables with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:08:48 +0000 (16:08 +0200)]
pinctrl: renesas: Synchronize R8A779F0 S4 PFC tables with Linux 6.5.3
Synchronize R-Car R8A779F0 S4 PFC tables with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:08:47 +0000 (16:08 +0200)]
pinctrl: renesas: Synchronize R8A779A0 V3U PFC tables with Linux 6.5.3
Synchronize R-Car R8A779A0 V3U PFC tables with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:08:46 +0000 (16:08 +0200)]
pinctrl: renesas: Synchronize R8A77995 D3 PFC tables with Linux 6.5.3
Synchronize R-Car R8A77995 D3 PFC tables with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:08:45 +0000 (16:08 +0200)]
pinctrl: renesas: Synchronize R8A77990 E3 PFC tables with Linux 6.5.3
Synchronize R-Car R8A77990 E3 PFC tables with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:08:44 +0000 (16:08 +0200)]
pinctrl: renesas: Synchronize R8A77980 V3H PFC tables with Linux 6.5.3
Synchronize R-Car R8A77980 V3H PFC tables with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:08:43 +0000 (16:08 +0200)]
pinctrl: renesas: Synchronize R8A77970 V3M PFC tables with Linux 6.5.3
Synchronize R-Car R8A77970 V3M PFC tables with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:08:42 +0000 (16:08 +0200)]
pinctrl: renesas: Synchronize R8A77965 M3-N PFC tables with Linux 6.5.3
Synchronize R-Car R8A77965 M3-N PFC tables with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:08:41 +0000 (16:08 +0200)]
pinctrl: renesas: Synchronize R8A77960 M3-W and R8A77961 M3-W+ PFC tables with Linux 6.5.3
Synchronize R-Car R8A77960 M3-W and R8A77961 M3-W+ PFC tables with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:08:40 +0000 (16:08 +0200)]
pinctrl: renesas: Synchronize R8A77951 H3 PFC tables with Linux 6.5.3
Synchronize R-Car R8A77951 H3 PFC tables with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:08:39 +0000 (16:08 +0200)]
pinctrl: renesas: Synchronize R8A7794 E2 PFC tables with Linux 6.5.3
Synchronize R-Car R8A7794 E2 PFC tables with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:08:38 +0000 (16:08 +0200)]
pinctrl: renesas: Synchronize R8A7792 V2H PFC tables with Linux 6.5.3
Synchronize R-Car R8A7792 V2H PFC tables with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:08:37 +0000 (16:08 +0200)]
pinctrl: renesas: Synchronize R8A7791 M2-W and R8A7793 M2-N PFC tables with Linux 6.5.3
Synchronize R-Car R8A7791 M2-W and R8A7793 M2-N PFC tables with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:08:36 +0000 (16:08 +0200)]
pinctrl: renesas: Synchronize R8A7790 H2 PFC tables with Linux 6.5.3
Synchronize R-Car R8A7790 H2 PFC tables with Linux 6.5.3,
commit
238589d0f7b421aae18c5704dc931595019fa6c7 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:08:35 +0000 (16:08 +0200)]
pinctrl: renesas: Add support for 1.8V/2.5V I/O voltage levels
Currently, the Renesas pin control driver supports pins that can switch
their I/O voltage levels between either 1.8V and 3.3V, or between 2.5V
and 3.3V. However, some SoCs have pins that can switch between 1.8V and
2.5V.
Add support for this by replacing the separate SH_PFC_PIN_CFG_IO_VOLTAGE
capability and voltage level flags by a 2-bit field, to cover three
possible I/O voltage switching options.
Ported from Linux kernel commit by Geert Uytterhoeven:
b88e733ac517 ("pinctrl: renesas: Add support for 1.8V/2.5V I/O voltage levels")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:08:34 +0000 (16:08 +0200)]
pinctrl: renesas: Drop R8A77950 H3 ES1.x PFC table entry
Drop outstanding R8A77950 H3 ES1.x PFC table entry from sh_pfc.h .
No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:08:33 +0000 (16:08 +0200)]
pinctrl: renesas: Rename RZ/A1 R7S72100 PFC tables to RZ/A1
Rename pfc-r7s72100.c to pfc-rza1.c to match the file name with Linux.
Rename the Kconfig symbol to match.
No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 14:08:32 +0000 (16:08 +0200)]
pinctrl: renesas: Rename R8A7795 H3 PFC tables file name to R8A77951
Rename pfc-r8a7795.c to pfc-r8a77951.c to match the file name with Linux
and to indicate the PFC driver does not support R8A77950 H3 ES1.* .
No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 11:51:03 +0000 (13:51 +0200)]
ARM: renesas: Enable DM_ETH_PHY on 64-bit R-Car boards
Enable DM_ETH_PHY to correctly release the PHY on these boards from reset.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 17 Sep 2023 11:49:30 +0000 (13:49 +0200)]
ARM: dts: renesas: Add compatible properties to KSZ9031 Ethernet PHYs on Salvator-X boards
Add compatible values to Ethernet PHY subnodes representing Micrel
KSZ9031 PHYs on R-Car Gen3 Salvator-X boards. This allows software
to identify the PHY model at any time, regardless of the state of
the PHY reset line.
This is a fix for missed addition of these properties on Salvator-X
boards.
Ported from Linux kernel commit
722d55f3a9bd810f3a1a31916cc74e2915a994ce .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Tom Rini [Sun, 24 Sep 2023 16:43:00 +0000 (12:43 -0400)]
Merge tag 'dm-next-23sep23' of https://source.denx.de/u-boot/custodians/u-boot-dm into next
buildman file-keeping and build-progress improvements
dm tree enhancement
adjust meaning of bootph-pre-ram/sram
Simon Glass [Fri, 15 Sep 2023 00:21:46 +0000 (18:21 -0600)]
common: Drop linux/printk.h from common header
This old patch was marked as deferred. Bring it back to life, to continue
towards the removal of common.h
Move this out of the common header and include it only where needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Thu, 7 Sep 2023 16:00:20 +0000 (10:00 -0600)]
kontron_sl28: Use u-boot-update.bin instead of u-boot.update
A '.update' extension does not get preserved by buildman, so change it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Michael Walle <michael@walle.cc>
Simon Glass [Thu, 7 Sep 2023 16:00:19 +0000 (10:00 -0600)]
buildman: Start the clock when the build starts
The Kconfig and maintainer processing can take a while, sometimes 5
seconds or more. This skews the timing printed by buildmand when the build
completes. Start the clock when the threads start to avoid this problem.
Signed-off-by: Simon Glass <sjg@chromium.org>
Suggested-by: Tom Rini <trini@konsulko.com>
Simon Glass [Thu, 7 Sep 2023 16:00:18 +0000 (10:00 -0600)]
buildman: Show progress when regenerating the board.cfg file
This can take a while, so show a message when starting.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by Tom Rini <trini@konsulko.com>
Simon Glass [Thu, 7 Sep 2023 16:00:17 +0000 (10:00 -0600)]
buildman: Keep all common output files
Make a list of common output extensions and use it to ensure that the -k
option preserves all of these.
Signed-off-by: Simon Glass <sjg@chromium.org>
Suggested-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
AKASHI Takahiro [Wed, 23 Aug 2023 01:49:47 +0000 (10:49 +0900)]
cmd: dm: allow for selecting uclass and device
The output from "dm tree" or "dm uclass" is a bit annoying
if the number of devices available on the system is huge.
(This is especially true on sandbox when I debug some DM code.)
With this patch, we can specify the uclass name or the device
name that we are interested in in order to limit the output.
For instance,
=> dm uclass usb
uclass 121: usb
0 usb@1 @
0bcff8b0 , seq 1
uclass 124: usb
=> dm tree usb:usb@1
Class Index Probed Driver Name
-----------------------------------------------------------
usb 0 [ ] usb_sandbox usb@1
usb_hub 0 [ ] usb_hub `-- hub
usb_emul 0 [ ] usb_sandbox_hub `-- hub-emul
usb_emul 1 [ ] usb_sandbox_flash |-- flash-stick@0
usb_emul 2 [ ] usb_sandbox_flash |-- flash-stick@1
usb_emul 3 [ ] usb_sandbox_flash |-- flash-stick@2
usb_emul 4 [ ] usb_sandbox_keyb `-- keyb@3
If you want forward-matching against a uclass or udevice name,
you can specify "-e" option.
=> dm uclass -e usb
uclass 15: usb_emul
0 hub-emul @
0bcffb00 , seq 0
1 flash-stick@0 @
0bcffc30 , seq 1
2 flash-stick@1 @
0bcffdc0 , seq 2
3 flash-stick@2 @
0bcfff50 , seq 3
4 keyb@3 @
0bd000e0 , seq 4
uclass 64: usb_mass_storage
uclass 121: usb
0 usb@1 @
0bcff8b0 , seq 1
uclass 122: usb_dev_generic
uclass 123: usb_hub
0 hub @
0bcff9b0 , seq 0
uclass 124: usb
=> dm tree -e usb
Class Index Probed Driver Name
-----------------------------------------------------------
usb 0 [ ] usb_sandbox usb@1
usb_hub 0 [ ] usb_hub `-- hub
usb_emul 0 [ ] usb_sandbox_hub `-- hub-emul
usb_emul 1 [ ] usb_sandbox_flash |-- flash-stick@0
usb_emul 2 [ ] usb_sandbox_flash |-- flash-stick@1
usb_emul 3 [ ] usb_sandbox_flash |-- flash-stick@2
usb_emul 4 [ ] usb_sandbox_keyb `-- keyb@3
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Jonas Karlman [Sun, 20 Aug 2023 22:03:18 +0000 (22:03 +0000)]
dm: core: Report bootph-pre-ram/sram node as pre-reloc after relocation
Nodes with bootph-pre-sram/ram props are bound in multiple phases:
1. At TPL (bootph-pre-sram) or SPL (bootph-pre-ram) phase
2. At U-Boot proper pre-relocation phase
3. At U-Boot proper normal phase
However the binding and U-Boot Driver Model documentation indicate that
only nodes marked with bootph-all or bootph-some-ram should be bound in
the U-Boot proper pre-relocation phase.
Change ofnode_pre_reloc to report a node with bootph-pre-ram/sram prop
with a pre-reloc status only after U-Boot proper pre-relocation phase.
Also update the ofnode_pre_reloc documentation to closer reflect the
binding and driver model documentation.
This changes behavior of what nodes are bound in the U-Boot proper
pre-relocation phase. Change to bootph-all or add bootph-some-ram prop
to restore prior behavior.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Fri, 22 Sep 2023 15:16:22 +0000 (11:16 -0400)]
Merge tag 'x86-pull-
20230922 ' of https://source.denx.de/u-boot/custodians/u-boot-x86 into next
- Add bootstd support to 64-bit efi payload
- Fix a bug of missing setting size of initrd in pxeboot
- Allow Python packages to be dropped
- Reland "x86: Move FACP table into separate functions"
- Fixes for chromebook_link64 and chromebook_samus_tpl
- Fixes and improvements for coreboot
- x86 documentation updates
Simon Glass [Wed, 20 Sep 2023 03:00:21 +0000 (21:00 -0600)]
x86: doc: coreboot: Mention 64-bit Linux distros
Add a little more detail as to why coreboot64 is preferred for booting
Linux distros.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 20 Sep 2023 03:00:20 +0000 (21:00 -0600)]
x86: doc: Split out manual booting into its own file
Move this out of the main file since for simple users it is easier to
rely on standard boot.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Thu, 21 Sep 2023 13:37:45 +0000 (07:37 -0600)]
x86: doc: Update summaries and add links
Refresh the summary information so it is more up-to-date. Add links to
the coreboot and slimbootloader docs.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 20 Sep 2023 03:00:18 +0000 (21:00 -0600)]
x86: doc: Move into its own directory
There is enough material that it makes sense to split this up into
several files. Create an x86/ directory for this purpose.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 20 Sep 2023 03:00:17 +0000 (21:00 -0600)]
x86: coreboot: Record the position of the SMBIOS tables
Make a note of where coreboot installed the SMBIOS tables so that we can
pass this on to EFI.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 20 Sep 2023 13:29:51 +0000 (07:29 -0600)]
efi: Use the installed SMBIOS tables
U-Boot should set up the SMBIOS tables during startup, as it does on x86.
Ensure that it does this correctly on non-x86 machines too, by creating
an event spy for last-stage init.
Tidy up the installation-condition code while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 20 Sep 2023 03:00:15 +0000 (21:00 -0600)]
Record the position of the SMBIOS tables
Remember where these end up so that we can pass this information on to
the EFI layer.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 20 Sep 2023 13:29:49 +0000 (07:29 -0600)]
bootstd: Keep track of use of usb stop
When 'usb stop' is run, doing 'bootflow scan' does not run the USB hunter
again so does not see any devices. Fix this by telling bootstd about the
state of USB.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 20 Sep 2023 03:00:13 +0000 (21:00 -0600)]
x86: smbios: Add a Kconfig indicating SMBIOS-table presence
When booted from coreboot, U-Boot does not build the SMBIOS tables, but
it should still pass them on to the OS. Add a new option which indicates
whether SMBIOS tables are present, however they were built.
Flip the ordering so that the dependency is listed first, which is less
confusing.
Adjust GENERATE_SMBIOS_TABLE to depend on this new symbol.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 20 Sep 2023 03:00:12 +0000 (21:00 -0600)]
efi: x86: Correct the condition for installing ACPI tables
It is not always the case that U-Boot builds the ACPI tables itself. For
example, when booting from coreboot, the ACPI tables are built by
coreboot.
Correct the Makefile condition so that U-Boot can pass on tables built
by a previous firmware stage.
Tidy up the installation-condition code while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 20 Sep 2023 03:00:11 +0000 (21:00 -0600)]
x86: coreboot: Enable VIDEO_COPY
At least on modern machines the write-back mechanism for the frame buffer
is quite slow when scrolling, since it must read the entire frame buffer
and write it back.
Enable the VIDEO_COPY feature to resolve this problem.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 20 Sep 2023 03:00:10 +0000 (21:00 -0600)]
x86: coreboot: Align options between coreboot and coreboot64
These two builds are similar but have some different options for not good
reason. Line them up to be as similar as possible.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Thu, 21 Sep 2023 13:37:44 +0000 (07:37 -0600)]
x86: coreboot: Drop USB init on startup
This is very annoying as it is quite slow on many machines. Also, U-Boot
has an existing 'preboot' mechanism to enable this feature if desired.
Drop this code so that it is possible to choose whether to init USB or
not.
Use the existing USE_PREBOOT mechanism instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 20 Sep 2023 03:00:08 +0000 (21:00 -0600)]
x86: coreboot: Enable CONFIG_SYS_NS16550_MEM32
The debug UART on modern machines uses a 32-bit wide transfer. Without
this, setting debug output causes a hang or no output. It is not obvious
(when enabling CONFIG_DEBUG_UART) that this is needed.
Enable 32-bit access to avoid this trap.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 20 Sep 2023 03:00:07 +0000 (21:00 -0600)]
x86: coreboot: Look for DBG2 UART in SPL too
If coreboot does not set up sysinfo for the UART, SPL currently hangs.
Use the DBG2 technique there as well. This allows coreboot64 to boot from
coreboot even if the console info is missing from sysinfo
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 20 Sep 2023 03:00:06 +0000 (21:00 -0600)]
x86: Allow APCI in SPL
This is needed so we can find the DBG2 table provided by coreboot. Add a
Kconfig so it can be enabled.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 20 Sep 2023 03:00:05 +0000 (21:00 -0600)]
x86: Set the CPU vendor in SPL
We don't read this information in 64-bit mode, since we don't have the
macros for doing it. Set it to Intel by default. This allows the TSC timer
to work correctly.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 20 Sep 2023 03:00:04 +0000 (21:00 -0600)]
x86: coreboot: Rearrange arch_cpu_init()
Init errors in SPL are currently ignored by this function.
Change the code to init the CPU, reporting an error if something is wrong.
After that, look for the coreboot table.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 20 Sep 2023 03:00:03 +0000 (21:00 -0600)]
x86: coreboot: Enable standard boot
Enable bootstd options and provide instructions on how to boot a linux
distro using coreboot.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 20 Sep 2023 03:00:02 +0000 (21:00 -0600)]
x86: coreboot: Add IDE and SATA
Add these options to permit access to more disk types.
Add some documentation as well.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Sun, 10 Sep 2023 19:13:02 +0000 (13:13 -0600)]
x86: Update cbmem driver
This driver is not actually built since a Kconfig was never created for
it.
Add a Kconfig (which is already implied by COREBOOT) and update the
implementation to avoid using unnecessary memory. Drop the #ifdef at the
top since we can rely on Kconfig to get that right.
To enable it (in addition to serial and video), use:
setenv stdout serial,vidconsole,cbmem
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[Modified the comment about overflow a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Sun, 10 Sep 2023 19:13:01 +0000 (13:13 -0600)]
x86: coreboot: Document cbmem console struct
Coreboot changed a few years ago to include an overflow flag. Update the
structure to match this.
This comes from coreboot commit:
6f5ead14b4 ("mb/google/nissa/var/joxer: Update eMMC DLL settings")
Note: There are several implementations of this in coreboot. I have chosen
to follow the one in src/lib/cbmem_console.c
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Thu, 7 Sep 2023 15:58:21 +0000 (09:58 -0600)]
x86: doc: Update the list of supported Chromebooks
One is missing, so add it. Also mention the SoC used in each.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Thu, 7 Sep 2023 15:58:20 +0000 (09:58 -0600)]
x86: dm: Mark driver model as dead when disabling CAR
When turning off CAR, set the flag to make sure that nothing tries to use
driver model in SPL before jumping to U-Bot proper, since its tables are
in CAR.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Thu, 7 Sep 2023 15:58:19 +0000 (09:58 -0600)]
x86: broadwell: Set up MTRRs
The current condition does not handle the samus_tpl case where it sets
up the RAM in SPL but needs to commit the MTRRs in U-Boot proper.
Add another case to handle this and update the comment.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Thu, 7 Sep 2023 15:58:18 +0000 (09:58 -0600)]
x86: broadwell: Avoid initing the CPU twice
When TPL has already set up the CPU, don't do it again. This existing
code actually has this backwards, so fix it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Thu, 7 Sep 2023 15:58:17 +0000 (09:58 -0600)]
x86: spl: Change the condition for copying U-Boot to RAM
Make this depend on whether the address matches the offset, rather than
a particular board build. For samus_tpl we don't need to copy, for
example.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Thu, 7 Sep 2023 15:58:16 +0000 (09:58 -0600)]
x86: samus_tpl: Correct text base and alloc sizes
Make sure that CONFIG_X86_OFFSET_U_BOOT is the same as CONFIG_TEXT_BASE
as it is changing CONFIG_X86_OFFSET_U_BOOT
Samus boots into U-Boot proper in flash, not RAM. Also expand the SPL
malloc() size a little, to avoid an error.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Thu, 7 Sep 2023 15:58:15 +0000 (09:58 -0600)]
x86: Add some log categories
Add some missing log categories to a few files.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Thu, 7 Sep 2023 15:58:14 +0000 (09:58 -0600)]
x86: broadwell: Show the memory delay
Samus only takes 7 seconds but it is long enough to think it has hung. Add
a message about what it is doing, similar to the approach on coral.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Thu, 7 Sep 2023 15:58:13 +0000 (09:58 -0600)]
dm: core: Allow marking driver model as dead
On x86 devices we use CAR (Cache-As-RAM) to hold the malloc() region in
SPL, since SDRAM is not set up yet. This means that driver model stores
its tables in this region.
When preparing to jump from SPL to U-Boot proper, we must disable CAR, so
that the CPU can uses the caches normally. This means that driver model
tables become inaccessible. From there until we jump to U-Boot proper, we
must avoid using driver model.
This is only a problem on boards which operate this way, for example
chromebook_link64
Add a flag to indicate that driver model is dead and should not be used.
It can be used in SPL to avoid hanging the machine.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Fri, 1 Sep 2023 18:08:23 +0000 (12:08 -0600)]
x86: doc: Document the -cdrom issues I ran into
Add a note about using -cdrom with QEMU.
Suggested-by: Bin Meng <bmeng@tinylab.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng@tinylab.org>