fsl-qoriq: Fixes related to env, spi, usb, crypto, configs, distro-boot
for Layerscape Boards like lx2, sl28, ls2088ardb.
powerpc: Fixes for t208xrdb revd board and cortina related configs
update for T208xRDB, T4240RDB.
Samuel Holland [Sun, 22 Aug 2021 00:25:43 +0000 (19:25 -0500)]
i2c: i2c-gpio: Support the named GPIO binding
To avoid confusion about the order of the GPIOs, the i2c-gpio binding
was updated to use a separate property for each GPIO instead of an
array. However, the driver only supports the old binding. Add support
for the new binding as well, so the driver continues to work as device
trees are updated.
Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Heiko Schocher <hs@denx.de>
Introduce driver for I2C based MCP230xx GPIO chips, which are
quite common and already well supported by the Linux kernel.
Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Add function to apply a bitmask to an i2c register, so
that specific bits can be cleared and/or set.
Suggested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Reviewed-by: Simon Glass <sjg@chromium.org>
tiny-printf variant doesn't know how to handle %llu format string, but both
tiny-printf and print_size can meet in SPL when TFTP is used to obtain main
u-boot image. This is known to lead to critical boot issue at AM335x platform
when printf is catched in infinite loop.
To avoid such issues and make print_size function tiny-printf friendly, use %u
instead of %luu. Note, that the size value is guaranteed to be less than 1024
in this conditional branch, so the cast to unsigned int is safe.
Signed-off-by: Matwey V. Kornilov <matwey.kornilov@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
tiny-printf: Handle %pM format when CONFIG_SPL_NET_SUPPORT is enabled
%pM format string is used to print MAC-address and this is required while SPL
network boot.
This patch fixes the SPL boot issues like the following:
Trying to boot from USB eth
## Error: flags type check failure for "ethaddr" <= "40309614M" (type: m)
## Error inserting "ethaddr" variable, errno=1
eth0: eth_cpsw## Error: flags type check failure for "eth1addr" <=
"81f01114M" (type: m)
## Error inserting "eth1addr" variable, errno=1
, eth1: usb_ether
eth_cpsw Waiting for PHY auto negotiation to complete......... TIMEOUT !
Problem booting with BOOTP
SPL: failed to boot from all boot devices
### ERROR ### Please RESET the board ###
Signed-off-by: Matwey V. Kornilov <matwey.kornilov@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Oleh Kravchenko [Wed, 19 May 2021 10:31:31 +0000 (13:31 +0300)]
Fix flashing of eMMC user area with Fastboot
'gpt' and 'mmc0' fastboot partitions have been treated as the same device,
but it is wrong.
Fill disk_partition structure with eMMC user partition info
to properly flash data.
Signed-off-by: Oleh Kravchenko <oleg@kaa.org.ua> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: Marek Vasut <marex@denx.de> Cc: Sean Anderson <sean.anderson@seco.com> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Sean Anderson <sean.anderson@seco.com>
Oleh Kravchenko [Fri, 14 May 2021 21:06:21 +0000 (00:06 +0300)]
Fix flash and erase of eMMC Boot2 with Fastboot
The current U-Boot version has the next matches for boot partitions:
> mmc0boot0 to EMMC_BOOT1
> mmc0boot1 to EMMC_BOOT1 (should be EMMC_BOOT2)
This patch fixes a typo for the boot partition number.
Signed-off-by: Oleh Kravchenko <oleg@kaa.org.ua> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: Marek Vasut <marex@denx.de> Reviewed-by: Sean Anderson <sean.anderson@seco.com>
One of the "dma_addr_t" instances was left out when
converting to "caam_dma_addr_t".
Fixes: 2ff17d2f74c5 ("crypto: fsl: refactor for 32 bit version CAAM support on ARM64") Signed-off-by: Horia Geantă <horia.geanta@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
T4240RDB supports booting from 2 nor banks(default and altbank). The
corresponding defconfig can only have one entry defined and therefore,
extend cs4340_get_fw_addr() function to overwrite firmware address which
will be later used in cortina firmware.
T2080RDB supports booting from 2 nor banks(default and altbank). The
corresponding defconfig can only have one entry defined and therefore,
extend cs4340_get_fw_addr() function to overwrite firmware address which
will be later used in cortina firmware.
LS2088A-RDB supports TFA boot source and has 2 nor banks(default and
altbank) and QSPI as boot source. The corresponding defconfig can only
have one entry defined and therefore, extend cs4340_get_fw_addr()
function to overwrite firmware address which will be later used in
cortina firmware.
Kuldeep Singh [Tue, 10 Aug 2021 05:50:08 +0000 (11:20 +0530)]
net: cortina: Add support for tfa boot in cortina firmware
Add support for boards supporting TFA boot separately in cortina
firmware. Please note, a weak function is defined to retrieve firmware
address values as CONFIG_CORTINA_FW_ADDR is now defined in defconfig and
can only have one possible value defined. This weak function will help
in overwrting the values to get proper addresses as per boot source.
Kuldeep Singh [Tue, 10 Aug 2021 05:50:06 +0000 (11:20 +0530)]
env: Kconfig: Add default option for PHY_CORTINA
Add PHY_CORTINA as default option in SYS_MMC_ENV_DEV Kconfig entry as
PHY_CORTINA require SYS_MMC_ENV_DEV value similar to FMAN_ENET or QE.
This helps in resolving compilation failure.
Wasim Khan [Mon, 2 Aug 2021 08:34:52 +0000 (10:34 +0200)]
armv8: fsl : create bootcmd and mcinitcmd as per boot source
NXP platforms expect custom bootcmd and mcinitcmd to be
updated as per boot source with default environment.
Check env variable fsl_bootcmd_mcinitcmd_set to prepare
bootcmd and mcinitcmd
Fixes: cbf77d201870 (armv8: fsl-layerscape: Fix automatic
setting of bootmcd with TF-A)
Free dynamically allocated memory before every return statement
in calc_img_key_hash() and calc_esbchdr_esbc_hash() function.
Verified the secure boot changes using ls1046afrwy board.
Michael Walle [Mon, 26 Jul 2021 19:35:28 +0000 (21:35 +0200)]
spi: nxp_fspi: Ensure width is respected in spi-mem operations
Import linux commit 007773e16a6f ("spi: nxp-fspi: Ensure width is
respected in spi-mem operations") to fix SPI access on boards which
don't have all SPI I/O lines connected to the flash.
Since commit 71025f013ccb ("mtd: spi-nor-core: Rework hwcaps selection")
u-boot figures out the capabilities by looking at spi_mem_supports_op().
The FlexSPI driver doesn't take the board layout into account. Fix that.
Fixes: 383fded70c4f ("spi: nxp_fspi: new driver for the FlexSPI controller") Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Pratyush Yadav <p.yadav@ti.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Zong Li [Tue, 27 Jul 2021 09:06:59 +0000 (17:06 +0800)]
board: sifive: overwrite board_fdt_blob_setup in u-boot proper
Add board_fdt_blob_setup to return the device tree location which is
passed by prior stage in u-boot proper. The generic board_fdt_blob_setup
always returns _end, it mignt be ok because u-boot SPL would currently
put the dtb there, but it would be broken if we put the dtb to another
place and assigned the location into a1 register for u-boot proper. Use
the location passed by prior stage would make more sence, because we
actually pass the location to u-boot proper and want to use that one,
rather than the dtb which in _end.
We can't use CONFIG_OF_PRIOR_STAGE because it doens't distinguish the
implementation of u-boot SPL and u-boot proper, so u-boot SPL need to
reply on the prior stage to pass device tree location as well, but we
don't pass the DT from boot rom now. In addition, when
CONFIG_OF_PRIOR_STAGE is enabled, the u-boot-spl.bin and u-boot.itb won't
include the device tree.
Signed-off-by: Zong Li <zong.li@sifive.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Zong Li [Tue, 27 Jul 2021 09:06:58 +0000 (17:06 +0800)]
board: sifive: compile stuff only related to SPL in SPL build
As (3581811dc26f "riscv: sifive/fu540: Move SPL related functions to spl.c"),
we put the SPL stuff in spl.c, we don't need to compile unleashed.c and
unmatched.c in SPL build.
Signed-off-by: Zong Li <zong.li@sifive.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Commit 37304aaf60bf ("Convert CONFIG_USE_PREBOOT and CONFIG_PREBOOT to
Kconfig") removed preboot commands in RISC-V targets and broke
extlinux support as reported by Fu Wei <wefu@redhat.com>.
The patch finishes migration of CONFIG_USE_PREBOOT and CONFIG_REBOOT
to Kconfig.
Fixes: 37304aaf60bf ("Convert CONFIG_USE_PREBOOT and CONFIG_PREBOOT to Kconfig") Reported-By: Fu Wei <wefu@redhat.com> Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com> Signed-off-by: Dimitri John Ledkov <dimitri.ledkov@canonical.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Marcel Ziswiler [Wed, 11 Aug 2021 13:12:56 +0000 (15:12 +0200)]
board: apalis-tk1: launch toradex easy installer in usb recovery
The USB recovery mode is used by Toradex to load the Toradex Easy
Installer image which supports further system images installation.
Prepare for loading and launching the Toradex Easy Installer if the
USB Recovery mode is activated.
Highlights:
- Handle TF-A boot with FIP for STM32MP1
- Fix board_get_usable_ram_top(0) for STM32MP1
- DT alignement with kernel v5.14 for STM32MP1
- SPI-NOR DT update for DHSOM
- Add UCLASS API for ECDSA singnature and implement it for STM32MP1
This test verifies that ECDSA_UCLASS is implemented, and that
ecdsa_verify() works as expected. The definition of "expected" is
"does not find a device, and returns -ENODEV".
The lack of a hardware-independent ECDSA implementation prevents us
from having one in the sandbox, for now.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Kconfig: FIT_SIGNATURE should not select RSA_VERIFY
FIT signatures can now be implemented with ECDSA. The assumption that
all FIT images are signed with RSA is no longer valid. Thus, instead
of 'select'ing RSA, only 'imply' it. This doesn't change the defaults,
but allows one to explicitly disable RSA support.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Igor Opaniuk <igor.opaniuk@foundries.io> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
lib: ecdsa: Implement UCLASS_ECDSA verification on target
Implement the crypto_algo .verify() function for ecdsa256. Because
it backends on UCLASS_ECDSA, this change is focused on parsing the
keys from devicetree and passing this information to the specific
UCLASS driver.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
dm: crypto: Define UCLASS API for ECDSA signature verification
Define a UCLASS API for verifying ECDSA signatures. Unlike
UCLASS_MOD_EXP, which focuses strictly on modular exponentiation,
the ECDSA class focuses on verification. This is done so that it
better aligns with mach-specific implementations, such as stm32mp.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Marek Vasut [Mon, 9 Aug 2021 12:06:04 +0000 (14:06 +0200)]
ARM: dts: stm32: Reduce DHCOR SPI NOR frequency to 50 MHz
The SPI NOR is a bit further away from the SoC on DHCOR than on DHCOM,
which causes additional signal delay. At 108 MHz, this delay triggers
a sporadic issue where the first bit of RX data is not received by the
QSPI controller.
There are two options of addressing this problem, either by using the
DLYB block to compensate the extra delay, or by reducing the QSPI bus
clock frequency. The former requires calibration and that is overly
complex for SPL, so opt for the second option. This incurs 20ms delay
during boot, when SPL loads U-Boot to DRAM.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Patrick Delaunay [Tue, 27 Jul 2021 10:15:12 +0000 (12:15 +0200)]
arm: dts: stm32mp15: alignment with v5.14
Device tree alignment with Linux kernel v5.14-rc3
- ARM: dts: stm32: move stmmac axi config in ethernet node on stm32mp15
- ARM: dts: stm32: Configure qspi's mdma transfer to block for stm32mp151
- ARM: dts: stm32: add a new DCMI pins group on stm32mp15
- ARM: dts: stm32: fix ltdc pinctrl on microdev2.0-of7
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
The function board_get_usable_ram_top can be called after relocation
with total_size = 0 to get the uppermost pointer that is valid to access
in U-Boot.
When total_size = 0, the reserved memory should be not take in account
with lmb library and 'gd->ram_base + gd->ram_size' can be used.
It is the case today in lib/efi_loader/efi_memory.c:efi_add_known_memory()
and this patch avoids that the reserved memory for OP-TEE is not part of
the EFI available memory regions.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Patrick Delaunay [Mon, 26 Jul 2021 09:21:38 +0000 (11:21 +0200)]
stm32mp1: stm32prog: remove stm32prog_get_tee_partitions with FIP
The MTD tee partitions used to save the OP-TEE binary are needed when
TF-A doesn't use the FIP container to load binaries.
This patch puts under CONFIG_STM32MP15x_STM32IMAGE flag the associated
code in U-Boot binary and prepare the code cleanup when
CONFIG_STM32MP15x_STM32IMAGE support will be removed after TF-A migration
to FIP support.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Patrick Delaunay [Mon, 26 Jul 2021 09:21:36 +0000 (11:21 +0200)]
arm: stm32mp: add defconfig for trusted boot with FIP
Add TF-A FIP support for trusted boot on STM32MP15x,
when STM32MP15x_STM32IMAGE is not activated.
With FIP support the SSBL partition is named "fip" and its size is 4MB,
so the ENV partition name in device tree (for SD card or eMMC)
or offset in defconfig (CONFIG_ENV_OFFSET / CONFIG_ENV_OFFSET_REDUND)
need to be modified.
With FIP the TEE MTD partitions are removed because the OP-TEE binray are
included in the FIP containers.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Patrick Delaunay [Mon, 26 Jul 2021 09:21:35 +0000 (11:21 +0200)]
arm: stm32mp: handle the OP-TEE nodes in DT with FIP support
With FIP support in TF-A (when CONFIG_STM32MP15x_STM32IMAGE
is not activated), the DT nodes needed by OP-TEE are added by OP-TEE
firmware in U-Boot device tree, present in FIP.
These nodes are only required in trusted boot, when TF-A load the file
u-boot.stm32, including the U-Boot device tree with STM32IMAGE header,
in this case OP-TEE can't update the U-Boot device tree.
Moreover in trusted boot mode with FIP, as the OP-TEE nodes are present
in U-Boot device tree only when needed the function
stm32_fdt_disable_optee can be removed.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Patrick Delaunay [Mon, 26 Jul 2021 09:21:34 +0000 (11:21 +0200)]
arm: stm32mp: add config for STM32IMAGE support
By default for trusted boot with TF-A, U-Boot (u-boot-nodtb)
is located in FIP container with its device tree and with
the secure monitor (provided by TF-A or OP-TEE).
The FIP file is loaded by TF-A BL2 and each components is
extracted at the final location.
This patch add CONFIG_STM32MP15x_STM32IMAGE to request the
STM32 image generation for SOC STM32MP15x
when FIP container is not used (u-boot.stm32 is loaded by TF-A
as done previously to keep the backward compatibility).
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Patrick Delaunay [Fri, 16 Jul 2021 08:10:55 +0000 (10:10 +0200)]
clk: stm32mp1: add support of BSEC clock
Add the support of the BSEC clock used by the STM32MP misc driver
since the commit 622c956cada0 ("stm32mp: bsec: manage clock when present
in device tree") even if this clock is not yet defined in kernel device
tree stm32mp151.dtsi.
This patch avoids issue for basic boot when this secure clock are not
provided by secure world with SCMI.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Tom Rini [Sun, 15 Aug 2021 17:42:42 +0000 (13:42 -0400)]
Merge tag 'efi-2021-10-rc2-2' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request for efi-2021-10-rc2-2
Documentation:
* Require Sphinx >= 2.4.4 for 'make htmldocs'
* Move devicetree documentation to restructured text and update it
* Document stm32mp1 devicetree bindings
UEFI
* Extend measurement to UEFI variables and ExitBootServices()
* Support Uri() node in devicetree to text protocol
* Add Linux magic token to RISC-V EFI test binaries
Masahisa Kojima [Fri, 13 Aug 2021 07:12:41 +0000 (16:12 +0900)]
efi_loader: add ExitBootServices() measurement
TCG PC Client PFP spec requires to measure
"Exit Boot Services Invocation" if ExitBootServices() is invoked.
Depending upon the return code from the ExitBootServices() call,
"Exit Boot Services Returned with Success" or "Exit Boot Services
Returned with Failure" is also measured.
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Swap two ifs in efi_exit_boot_services().
efi_tcg2_notify_exit_boot_services must have EFIAPI signature. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Masahisa Kojima [Fri, 13 Aug 2021 07:12:40 +0000 (16:12 +0900)]
efi_loader: add boot variable measurement
TCG PC Client PFP spec requires to measure "Boot####"
and "BootOrder" variables, EV_SEPARATOR event prior
to the Ready to Boot invocation.
Since u-boot does not implement Ready to Boot event,
these measurements are performed when efi_start_image() is called.
TCG spec also requires to measure "Calling EFI Application from
Boot Option" for each boot attempt, and "Returning from EFI
Application from Boot Option" if a boot device returns control
back to the Boot Manager.
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Masahisa Kojima [Fri, 13 Aug 2021 07:12:39 +0000 (16:12 +0900)]
efi_loader: add secure boot variable measurement
TCG PC Client PFP spec requires to measure the secure
boot policy before validating the UEFI image.
This commit adds the secure boot variable measurement
of "SecureBoot", "PK", "KEK", "db", "dbx", "dbt", and "dbr".
Note that this implementation assumes that secure boot
variables are pre-configured and not be set/updated in runtime.
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Add the Linux magic to the EFI file header to allow running our test
programs with GRUB's linux command.
MajorImageVersion = 1 indicates a kernel that can consume the
EFI_LOAD_FILE2_PROTOCOL. This allows to dump the GRUB provided intird with
our initrddump.efi tool.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
With device tree binding migration to yaml it is difficult to synchronize
the binding from Linux kernel to U-Boot.
Instead of maintaining the same dt bindings, this patch adds in the U-Boot
documentation the path to the device tree bindings in Linux kernel for
STMicroelectronics devices, when they are used without modification.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Add links for referenced text files. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Simon Glass [Mon, 2 Aug 2021 00:57:11 +0000 (18:57 -0600)]
doc: Update devicedocs including how to add tweaks
This file is about 10 years old and the updates have not covered
everything that has changed, particularly in the last few years. Update
the information and add mention of the u-boot.dtsi files.
Signed-off-by: Simon Glass <sjg@chromium.org>
Fix typos. Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Jon Lin [Thu, 5 Aug 2021 08:27:53 +0000 (16:27 +0800)]
rockchip: px30: Support configure SFC
Make px30 SFC clock configurable
Signed-off-by: Jon Lin <jon.lin@rock-chips.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Chris Morgan [Thu, 5 Aug 2021 08:27:52 +0000 (16:27 +0800)]
rockchip: px30: add support for SFC for Odroid Go Advance
The Odroid Go Advance uses a Rockchip Serial Flash Controller with an
XT25F128B SPI NOR flash chip. This adds support for both. Note that
while both the controller and chip support quad mode, only two lines
are connected to the chip. Changing the pinctrl to bus2 and setting tx
and rx lines to 2 for this reason.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Signed-off-by: Jon Lin <jon.lin@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Chris Morgan [Thu, 5 Aug 2021 08:26:41 +0000 (16:26 +0800)]
mtd: spi-nor-ids: Add XTX XT25F128B
Adds support for XT25F128B used on Odroid Go Advance. Unfortunately
this chip uses a continuation code which I cannot seem to parse, so
there are possibly going to be collisions with chips that use the same
manufacturer/ID.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Signed-off-by: Jon Lin <jon.lin@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Chris Morgan [Thu, 5 Aug 2021 08:26:40 +0000 (16:26 +0800)]
rockchip: px30: add the serial flash controller
Add the serial flash controller to the devicetree for the PX30.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Signed-off-by: Jon Lin <jon.lin@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Chris Morgan [Thu, 5 Aug 2021 08:26:39 +0000 (16:26 +0800)]
rockchip: px30: Add support for using SFC
This patch adds support for setting the correct pin configuration
for the Rockchip Serial Flash Controller found on the PX30.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Signed-off-by: Jon Lin <jon.lin@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Chris Morgan [Thu, 5 Aug 2021 08:26:38 +0000 (16:26 +0800)]
spi: rockchip_sfc: add support for Rockchip SFC
This patch adds support for the Rockchip serial flash controller
found on the PX30 SoC. It should work for versions 3-5 of the SFC
IP, however I am only able to test it on v3.
This is adapted from the WIP SPI-MEM driver for the SFC on mainline
Linux. Note that the main difference between this and earlier versions
of the driver is that this one does not support DMA. In testing
the performance difference (performing a dual mode read on a 128Mb
chip) is negligible. DMA, if used, must also be disabled in SPL
mode when using A-TF anyway.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Signed-off-by: Jon Lin <jon.lin@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Johan Gunnarsson [Sun, 25 Jul 2021 14:25:58 +0000 (16:25 +0200)]
rockchip: Fix u-boot-rockchip.bin build
Currently there are a few arm32 rockchip board configs that don't
generate u-boot-rockchip.bin when running make because CONFIG_BINMAN
is not enabled. This patch changes CONFIG_ARCH_ROCKCHIP to also select
CONFIG_BINMAN if CONFIG_SPL and !CONFIG_ARM64.
Example builds that don't generate u-boot-rockchip.bin without this
patch:
export ARCH=arm
export CROSS_COMPILE=/usr/bin/arm-linux-gnueabihf-
make kylin-rk3036_defconfig
make
export ARCH=arm
export CROSS_COMPILE=/usr/bin/arm-linux-gnueabihf-
make rock_defconfig
make
export ARCH=arm
export CROSS_COMPILE=/usr/bin/arm-linux-gnueabihf-
make tinker-rk3288_defconfig
make
Signed-off-by: Johan Gunnarsson <johan.gunnarsson@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
- Convert GoFlex Home Ethernet and SATA to Driver Model (Tony)
- mvebu: Automatically detect CONFIG_SYS_TCLK (Pavel)
- mvebu: sata_mv: Fix HDD identication during cold start (Tony)
- a37xx: pci: Fix handling PIO config error responses (Pavel)
- Other minor misc changes and board maintainer updates
Tom Rini [Wed, 11 Aug 2021 12:31:13 +0000 (08:31 -0400)]
Merge tag 'u-boot-amlogic-20210810' of https://source.denx.de/u-boot/custodians/u-boot-amlogic
- odroid-n2: fix fdtfile suffix for n2-plus
- sei610 & meson64_android cleanups to prepare android 11 boot support
- use Android BCB mechanism for reboot reason instead of HW reboot flag
- Switch meson64_android boot flow to use abootimg for A/B, AVB and DTBO support
Yifeng Zhao [Tue, 29 Jun 2021 08:24:41 +0000 (16:24 +0800)]
mmc: rockchip_sdhci: add phy and clock config for rk3399
Add clock, phy and other configuration, it is convenient to support
new controller. Here a short summary of the changes:
- Add mmc_of_parse to parse dts config.
- Remove OF_PLATDATA related code.
- Reorder header inclusion.
- Add phy ops.
- add ops set_ios_post to modify the parameters of phy when the
clock changes.
- Add execute tuning api for hs200 tuning.
Johan Jonker [Fri, 25 Jun 2021 13:26:33 +0000 (15:26 +0200)]
ARM: dts: rockchip: update rk3188-radxarock.dts
In the Linux DT the file rk3xxx.dtsi is shared between
rk3066 and rk3188. Both rk3xxx.dtsi and rk3188.dtsi have recently
had some updates.
For a future rk3066 support in U-boot this file must also update.
Move U-boot specific things in a rk3188-radxarock-u-boot.dtsi file.
Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Johan Jonker [Fri, 25 Jun 2021 13:26:32 +0000 (15:26 +0200)]
ARM: dts: rockchip: update rk3188.dtsi
In the Linux DT the file rk3xxx.dtsi is shared between
rk3066 and rk3188. Both rk3xxx.dtsi and rk3188.dtsi have recently
had some updates.
For a future rk3066 support in U-boot this file must also update.
Move U-boot specific things in a rk3188-u-boot.dtsi file.
Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Johan Jonker [Fri, 25 Jun 2021 13:26:30 +0000 (15:26 +0200)]
ARM: dts: rockchip: update rk3xxx.dtsi
In the Linux DT the file rk3xxx.dtsi is shared between
rk3066 and rk3188. This file has recently had some updates.
For a future rk3066 support in U-boot this file must also update.
Move U-boot specific things in a rk3xxx-u-boot.dtsi file.
Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Artem Lapkin [Wed, 26 May 2021 09:32:27 +0000 (17:32 +0800)]
rk3399: boot_devices fix spinor node name
Problem: board_spl_was_booted_from return wrong boot_devices[3] value
/spi@ff1d0000 and same-as-spl dont work properly for SPINOR flash
because arch/arm/mach-rockchip/spl-boot-order.c spl_node_to_boot_device
need parse SPINOR flash node as UCLASS_SPI_FLASH
spl-boot-order: same-as-spl > *** BOOT_SOURCE_ID 3 (2:emmc 3:spi 5:sd ...
/spi@ff1d0000 > board_boot_order: could not map node @618 to a boot-device
/sdhci@fe330000 > /mmc@fe320000
Alex Bee [Thu, 17 Jun 2021 09:01:12 +0000 (11:01 +0200)]
rockchip: Fix MMC boot order
Basically all, i.e. rk3036.dtsi, rk3128.dtsi, rk3xxx.dtsi, rk322x.dtsi,
rk3288.dtsi, rk3308-u-boot.dtsi, rk3328-u-boot.dtsi, rk3399-u-boot.dtsi
and px30-u-boot.dtsi Rockchip SoC devicetrees which have mmc indexes
are defining eMMC as mmc0 and sdmmc as mmc1.
This means that the rule to try to boot from the SD card first is ignored,
which as per comment is what we want and is important for distros, which
rely on that.
Fix this by setting the correct mmc index, i.e. first from mmc1 (SD card),
second from mmc0 (eMMC).
Signed-off-by: Alex Bee <knaerzche@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Bin Meng [Sat, 7 Aug 2021 05:00:00 +0000 (13:00 +0800)]
mtd: kconfig: Fix CFI_FLASH dependency
The DM version CFI flash driver is in driver/mtd/cfi_flash.c, which
only gets built when FLASH_CFI_DRIVER is on. If CFI_FLASH is on but
FLASH_CFI_DRIVER is not, nothing is enabled at all.
Fix this dependency by selecting FLASH_CFI_DRIVER when CFI_FLASH is
enabled.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
projects / u-boot.git / log
