Simon Glass [Wed, 25 Sep 2019 14:56:22 +0000 (08:56 -0600)]
binman: Take account of skip-at-start with image-header
The image-header currently sets it offset assuming that skip-at-start is
zero. This does not work on x86 where offsets end at 4GB. Add in this
value so that the offset is correct.
Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 25 Sep 2019 14:56:21 +0000 (08:56 -0600)]
binman: Handle reading data for end-at-4gb sections
Some x86 sections have special offsets which currently result in empty
data being returned from the 'extract' command. Fix this by taking account
of the skip-at-start property.
Add a little more debugging while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 25 Sep 2019 14:56:20 +0000 (08:56 -0600)]
binman: Add a base implementation of Entry.ReadChildData()
At present this function is not present in the Entry base class so it is
hard to find the documentation for it. Move the docs from the section
class and expand it a little.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 16 Sep 2019 00:10:36 +0000 (18:10 -0600)]
binman: Allow verbose output with all commands
At present the verbose flag only works for the 'build' command. This is
not intended, nor is it useful. Update the code to support the verbose
flag and make use of a command exception handler.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: rebase the patch against u-boot-x86/next to get it applied cleanly] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 25 Sep 2019 14:56:18 +0000 (08:56 -0600)]
serial: ns16550: Add a PCI device/function field
When this UART is used early in boot (before PCI is set up) it is
convenient to store the PCI BDF of the UART so that it can be manually
configured. This is useful when it is used as a debug UART, for example.
Add a new field to hold this information, so that drivers can simply use
the existing platform data.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Sun, 15 Sep 2019 18:08:58 +0000 (12:08 -0600)]
dm: pci: Add a function to read a PCI BAR
At present PCI address transaction is not supported so drivers must
manually read the correct BAR after reading the device tree info. The
ns16550 has a suitable implementation, so move this code into the core
DM support.
Note that there is no live-tree equivalent at present.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: correct the unclear comments in test.dts] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 25 Sep 2019 14:56:16 +0000 (08:56 -0600)]
pci: Show a message if PCI autoconfig fails
At present this fails silently which can be confusing since some devices
on the PCI bus may not work correctly. Show a message in this case.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: add a '\n' in the PCI autoconfig fail message] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 25 Sep 2019 14:56:15 +0000 (08:56 -0600)]
pci: Add more debug detail when resources are exhausted
If PCI auto-config runs out of memory, show a few more details to help
diagnose the problem.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: change %x to %llx to avoid build warnings on some platforms] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 25 Sep 2019 14:56:13 +0000 (08:56 -0600)]
pci: Disable autoconfig in SPL
At present U-Boot runs autoconfig in SPL but this is best left to U-Boot
proper. For TPL and SPL we can normally used fixed BARs and save code size
and time.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Sat, 31 Aug 2019 23:59:32 +0000 (17:59 -0600)]
pci: sandbox: Probe PCI emulation devices when used
At present PCI emulation devices are not probed before use, since they
used to be children of the device that used them, and children cannot be
probed before their parents.
Now that PCI emulation devices are attached to the root node, we can
simply probe them, and avoid using the internal function.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: rebase the patch against u-boot-x86/next to get it applied cleanly] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
In this case the emulation device is attached to pci device on address
f800 (device 1f, function 0) and provides the swap-case functionality.
However this is not ideal, since every device on a PCI bus has a child
device. This is only really the case for sandbox, but we want to avoid
special-case code for sandbox.
Worse, child devices cannot be probed before their parents. This forces
us to use 'find' rather than 'get' to obtain the emulator device. In fact
the emulator devices are never probed. There is code in
sandbox_pci_emul_post_probe() which tries to track when emulators are
active, but at present this does not work.
A better approach seems to be to add a separate node elsewhere in the
device tree, an 'emulation parent'. This could be given a bogus address
(such as -1) to hide the emulators away from the 'pci' command, but it
seems better to keep it at the root node to avoid such hacks.
Then we can use a phandle to point from the device to the correct
emulator, and only on sandbox. The code to find an emulator does not
interfere with normal pci operation.
Add a new UCLASS_PCI_EMUL_PARENT uclass which allows finding an emulator
given a bus, and finding a bus given an emulator. Update the existing
device trees and the code for finding an emulator.
This brings PCI emulators more into line with I2C.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: fix 3 typos in the commit message;
encode bus number in the labels of swap_case_emul nodes;
mention commit 4345998ae9df in sandbox_pci_get_emul()] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 25 Sep 2019 14:56:09 +0000 (08:56 -0600)]
sandbox: Allow use of real I/O with readl(), etc.
At present these functions are stubbed out. For more comprehensive testing
with PCI devices it is useful to be able to fully emulate I/O access. Add
simple implementations for these.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: change to use 'const void *' in sandbox_write();
cast 'addr' in read/write macros in arch/sandbox/include/asm/io.h;
remove the unnecessary cast in readq/writeq in nvme.h] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 25 Sep 2019 14:56:07 +0000 (08:56 -0600)]
sandbox: Add a -T flag to use the test device tree
U-Boot already supports using -D to indicate that it should use the normal
device tree. It is sometimes useful to run with the test device tree, e.g.
when running a test. Add a -T option for this along with some
documentation.
It can be used like this:
/tmp/b/sandbox/u-boot -T -c "ut dm pci_busdev"
(this will use /tmp/b/sandbox/arch/sandbox/dts/test.dtb as the DT)
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 25 Sep 2019 14:56:00 +0000 (08:56 -0600)]
sandbox: mmc: Fix up MMC emulator for valgrind
At present running sandbox with valgrind produces some warnings due to the
MMC emulator not filling in all the expected fields. Fix it.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: use sizeof() instead of hardcoded 16] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 25 Sep 2019 14:55:59 +0000 (08:55 -0600)]
sandbox: spmi: Add ranges property for address translation
At present address translation does not work since there is no ranges
property in the spmi nodes. Add empty ranges properties and a little more
logging so that this shows the error:
Simon Glass [Wed, 25 Sep 2019 14:55:57 +0000 (08:55 -0600)]
dm: test: Correct a stray backslash in dm_test_destroy()
This should perhaps be a period.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: add the ending period and reword the commit message] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 25 Sep 2019 14:55:53 +0000 (08:55 -0600)]
dm: core: Call ofdata_to_platdata() with of-platdata
At present this function is never called when of-platdata is enabled since
we never have a device tree. However, this function is responsible for
copying over the of-platdata, so we must call it. Otherwise the probe()
method would have to be used.
Correct this and fix the sandbox serial driver to not read from the device
tree and try to write to what is read-only platdata on some platforms.
Fixes: 396e343b3d (dm: core: Allow binding a device from a live tree) Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 25 Sep 2019 14:55:52 +0000 (08:55 -0600)]
dm: test: Don't fail when tests are skipped due to build
At present tests that are marked as only for livetree fail when executed
on sandbox_flattree. They cannot actually be executed, but we should not
resport them as 'not found', since this causes errors. Instead, they
should be silently skipped.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 25 Sep 2019 14:55:51 +0000 (08:55 -0600)]
dm: test: Fix running of multiple test from command line
At present when multiple 'ut dm' commands are executed, all but the first
is run with a flat tree, even if live tree is enabled. This is because the
live tree node pointer is set to NULL and never restored.
This does not affect normal test running, which just runs all the test in
one go, but can be confusing when several individual tests are run during
the same U-Boot run.
Correct this by restoring the pointer.
Fixes: c166c47ba3 (dm: test: Add support for running tests with livetree) Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 25 Sep 2019 14:55:48 +0000 (08:55 -0600)]
dm: core: Add documentation on how to debug driver model
Sometimes devices don't appear and it can be confusing. Add a few notes to
help with this situation.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: fix 2 issues in the doc and include the doc in the index.rst] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 25 Sep 2019 14:55:47 +0000 (08:55 -0600)]
dm: core: Drop a few early returns
Two functions in this file return early for no good reason. Adjust the
code to match the standard DM style of returning 0 at the end of the
function on success.
Oddly enough this save 12 bytes of code size on ARM.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 25 Sep 2019 14:11:47 +0000 (08:11 -0600)]
x86: Rename turbo ratio MSR to MSR_TURBO_RATIO_LIMIT
This MSR number is used on most modern Intel processors, so drop the
confusing NHM prefix (which might mean Nehalem).
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: drop MSR_IVT_TURBO_RATIO_LIMIT as no code uses it] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 25 Sep 2019 14:11:43 +0000 (08:11 -0600)]
x86: Change condition for using CAR
At present we assume that CAR (Cache-as-RAM) is used if HOBs (Hand-off
blocks) are not, since HOBs typically indicate that an FSP is in use, and
FSPs handle the CAR init.
However this is a bit indirect, and for FSP2 machines which use their own
CAR implementation (such as apollolake) but use the FSP for other
functions, the logic is wrong.
To fix this, add a dedicated Kconfig option to indicate when CAR is used.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: fix a typo in the commit message] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 25 Sep 2019 14:11:41 +0000 (08:11 -0600)]
x86: fsp: Save usable RAM and hob_list in the handoff area
The useable RAM is calculated when the RAM is inited. Save this value so
that it can be easily used in U-Boot proper.
Also save a pointer to the hob list so that it is accessible (before
relocation only) in U-Boot proper. This avoids having to scan it in SPL,
for everything U-Boot proper might need later.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: guard handoff_arch_save() with IS_ENABLED(CONFIG_USE_HOB)] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 25 Sep 2019 14:11:40 +0000 (08:11 -0600)]
x86: spl: Move broadwell-specific code out of generic x86 spl
When TPL is running, broadwell needs to do different init from SPL. There
is no need for this code to be in the generic x86 SPL file, so move it to
arch_cpu_init().
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 25 Sep 2019 14:11:39 +0000 (08:11 -0600)]
x86: spl: Reduce priority of the basic SPL image loader
This image loader works on systems where the flash is directly mapped to
the last part of the 32-bit address space. On recent Intel systems (such
as apollolake) this is not the case.
Reduce the priority of this loader so that another one can override it.
While we are here, rename the loader to BOOT_DEVICE_SPI_MMAP since
BOOT_DEVICE_BOARD is not very descriptive.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 25 Sep 2019 14:11:36 +0000 (08:11 -0600)]
x86: Add binman symbols to the image
It is useful in SPL and TPL to access symbols from binman, such as the
position and size of an entry in the ROM. Collect these symbols together
in the SPL binaries.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 25 Sep 2019 14:11:35 +0000 (08:11 -0600)]
x86: Move common Intel CPU info code into a function
Add cpu_intel_get_info() to find out the CPU info on modern Intel CPUs.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: add parameter and return value descriptions] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 25 Sep 2019 14:11:34 +0000 (08:11 -0600)]
x86: fsp: Add access to variable MRC data
With FSP2 the non-volatile storage used by the FSP to init memory can be
split into a fixed piece (determined at compile time) and a variable piece
(determined at run time). Add support for reading the latter.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 25 Sep 2019 14:11:32 +0000 (08:11 -0600)]
efi: Move inline functions to unconditional part of header
At present these two functions are defined in efi_loader.h but only if
CONFIG_EFI_LOADER is enabled. But these are functions that are useful to
other code, such as that which deals with Intel Handoff Blocks (HOBs).
Move these to the top of the function.
Possibly ascii2unicode() should not be an inline function, since this
might impact code size.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Sat, 24 Aug 2019 20:10:32 +0000 (14:10 -0600)]
x86: fsp: Move common dram functions into a common file
Most of the DRAM functionality can be shared between FSP1 and FSP2. Move
it into a shared file.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: rebase the patch against u-boot-x86/next to get it applied cleanly] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 25 Sep 2019 14:11:27 +0000 (08:11 -0600)]
x86: fsp: Use if() instead of #ifdef
Update a few #ifdefs to if() to improve build coverage.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: recover the codes that got wrongly deleted in dram_init()] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Sat, 24 Aug 2019 20:19:05 +0000 (14:19 -0600)]
x86: fsp: Create a common fsp_support.h header
Many support functions are common between FSP1 and FSP2. Add a new header
to handle this.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: remove forward declarations in fsp_support.h] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 25 Sep 2019 14:11:24 +0000 (08:11 -0600)]
x86: sysreset: Allow reset driver to be included in SPL/TPL
At present this driver is always included in SPL and TPL, if U-Boot proper
enables it. Update the Makefile to provide full control using the existing
Kconfig options.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: make the Kconfig help text a little bit clearer] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 25 Sep 2019 14:11:20 +0000 (08:11 -0600)]
spl: Add a function to determine the U-Boot phase
U-Boot is built in three phases: TPL, SPL and U-Boot proper. Sometimes
it is necessary to use different init code depending on the phase. For
example, TPL might do very basic CPU init, SPL might do a little more
and U-Boot proper might bring the CPU up to full speed and enable all
cores.
Add a function which allows easy determination of the current phase being
built.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 25 Sep 2019 14:11:19 +0000 (08:11 -0600)]
spl: Set up the bloblist in board_init_r()
At present the bloblist is set up in spl_common_init() which can be called
from spl_early_init(), i.e. before SDRAM is ready. This prevents the
bloblist from being located in SDRAM, which is useful on some platforms
where SRAM is inaccessible after U-Boot relocates (e.g. x86 CAR region).
It doesn't serve much purpose to have the bloblist available early, since
very little is known about the platform then, and the handoff info is
written when SPL is about to jump to U-Boot.
Move the code to board_init_r() to avoid any restrictions.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 25 Sep 2019 14:11:18 +0000 (08:11 -0600)]
spl: Add an arch-specific hook for writing to SPL handoff
At present there is an arch-specific area in the SPL handoff area intended
for use by arch-specific code, but there is no explicit call to fill in
this data. Add a hook for this.
Also use the hook to remove the sandbox-specific test code from
write_spl_handoff().
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 25 Sep 2019 14:11:16 +0000 (08:11 -0600)]
spl: Avoid checking for Ctrl-C in SPL with print_buffer()
We don't have a console in SPL so it doesn't make sense to check for
Ctrl-C when printing a memory dump. Skip this so that print_buffer() can
be used in SPL.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 25 Sep 2019 14:11:14 +0000 (08:11 -0600)]
serial: ns16550: Allow serial to enabled/disabled in SPL
At present this driver uses the wrong condition for including the code and
drivers in SPL/TPL. Update it so that the code is only included if
DM_SERIAL is enabled for SPL/TPL.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 25 Sep 2019 14:11:13 +0000 (08:11 -0600)]
mtd: spi: Add 'struct spi_flash {' to the code
At present spi_flash is defined to be spi_nor which is confusing since it
is not possible to find the 'spi_flash' by normal text search. Add a
comment to help with this.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 2 Oct 2019 00:26:41 +0000 (08:26 +0800)]
x86: Move fsp_infoheader.h to the generic fsp directory
This header file is the same for FSP v1 and v2. Move it into the general
fsp directory.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: move rename of fsp_infoheader.h from previous patch to this one] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 2 Oct 2019 00:25:10 +0000 (08:25 +0800)]
x86: Move fsp_hob.h to the generic fsp directory
This header file is the same for FSP v1 and v2. Move it into the general
fsp directory.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: remove inclusion of fsp_hob.h in fsp_support.h] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 25 Sep 2019 14:00:13 +0000 (08:00 -0600)]
x86: Create a new fsp_arch.h header
At present fsp_support.h includes fsp_vpd.h which is an FPSv1 concept
(VPD means Vital Product Data). For FSPv2 only UPD (Updatable Product
Data) is used.
To avoid mangling header files, put these two includes in a separate
header which we can adjust as necessary for FSPv2.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 25 Sep 2019 14:00:12 +0000 (08:00 -0600)]
x86: Move fsp_azalia.h to the generic fsp directory
This header file is the same for FSP v1 and v2. Move it into the general
fsp directory.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: remove forward declarations in fsp_support.h] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 25 Sep 2019 14:00:11 +0000 (08:00 -0600)]
x86: Rename existing FSP code to fsp1
Since there is now a new version of the FSP and it is incompatible with
the existing version, move the code into an fsp1 directory. This will
allow us to put FSP v2 code into an fsp2 directory.
Add a Kconfig which defines which version is in use.
Some of the code in this new fsp1/ directory is generic across both FSPv1
and FSPv2. Future patches will address this.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
Eugeniy Paltsev [Mon, 7 Oct 2019 16:10:50 +0000 (19:10 +0300)]
NET: DW: fix regression for ARC boards
The commit 642b80d256e ("net: designware: drop compatible altr, socfpga-stmmac")
breaks designware ethernet for all ARC boards. It removes
"altr, socfpga-stmmac" compatible from "drivers/net/designware.c"
without changing compatible in the boards which use it.
Fix that by adding "snps,arc-dwmac-3.70a" compatible string to
"drivers/net/designware.c" and using it in ARC boards device tree.
AKASHI Takahiro [Thu, 22 Aug 2019 07:47:39 +0000 (16:47 +0900)]
cmd: host: fix seg fault at "host info"
With the patch below applied, host_block_dev structure was switched
to be placed in platdata rather than priv. The command "host info"
must be aligned with this change. Otherwise, we will see "Segmentation
Fault."
Fixes: 8f994c860d91 ("sandbox: blk: Switch to use platdata_auto_alloc_size for the driver data") Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Tom Rini [Fri, 4 Oct 2019 16:22:43 +0000 (12:22 -0400)]
Merge branch '2019-10-04-master-imports'
- Assorted TI platform fixes
- Revert the change that broke environment flag validation
- Assorted typo fixes
- Assorted Kconfig dependency fixes
- Other minor bug fixes
Adam Ford [Wed, 7 Aug 2019 15:16:33 +0000 (10:16 -0500)]
ARM: dts: imx6q-logicpd: Add missing imx6q-logicpd-u-boot for SPL
The SPL device tree is missing the entires for gpio1, uart1, usdhc1 and
usdhc2. This creates the missing imx6q-logicpd-u-boot.dtsi file
which will enable these functions so SPL can properly setup UART, detect
microSD card, and startup.
Fixes: 8f4691e31a18 ("ARM: imx6q_logic: With SPL_OF_CONTROL enabled,
remove MMC init")
At this point we are using part number sub-command to retrieve UUID
of the partition using it's name.
e.g.:
part number mmc $mmcdev system_a system_a_index
part uuid mmc $mmcdev:${system_a_index} system_a_uuid
Since 'part uuid' sub-command expects partition index in hex format and
'part number' returns decimal value, 'part uuid' command will provide
wrong UUID or fail.
The memory allocated to store the FIT image containing SYSFW and board
configuration data is statically defined to the largest size expected.
This was 269000 bytes but now needs to be grown to 276000 to make room
for the signatures attached to the board configuration data on High
Security devices.
Simon Glass [Wed, 25 Sep 2019 14:55:50 +0000 (08:55 -0600)]
dm: core: Correct bad cast in ofnode_get_addr_size_index()
At present this code passes an fdt_addr_t pointer as a u64 pointer which
is not safe, since sizeof(fdt_addr_t) may be 4, e.g. with sandbox. Correct
this to avoid a stack corruption problem.
Fixes: e679d03b08 (core: ofnode: Add ofnode_get_addr_size_index) Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: correct one typo in the commit message] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 25 Sep 2019 14:55:46 +0000 (08:55 -0600)]
dm: core: Correct low cell in ofnode_read_pci_addr()
This reads the low cell of the PCI address from the wrong cell. Fix it.
Also fix the function that this code came from.
Fixes: 9e51204527 (dm: core: Add operations on device tree references) Fixes: 4ea5243a3a (fdt: fix fdtdec_get_pci_addr() for CONFIG_PHYS_64BIT) Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
projects / u-boot.git / log
